[PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Samin Guo]

This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.

The first patch adds ethernet nodes for jh7110 SoC, the second patch
adds ethernet nodes for visionfive 2 SBCs.

This series relies on xingyu's syscon patch[1].
For more information and support, you can visit RVspace wiki[2].

[1]: https://patchwork.kernel.org/project/linux-riscv/patch/20230704020239.288500-7-xingyu.wu@starfivetech.com
[2]: https://wiki.rvspace.org


Samin Guo (2):
  riscv: dts: starfive: jh7110: Add ethernet device nodes
  riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

 .../jh7110-starfive-visionfive-2-v1.2a.dts    | 13 ++++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 31 +++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 34 +++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 69 +++++++++++++++++++
 4 files changed, 147 insertions(+)


base-commit: 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5
prerequisite-patch-id: 06c3560d00fe0f65a09c09002b46cd7c1c59facc
-- 
2.17.1

[PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Samin Guo]

This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.

The first patch adds ethernet nodes for jh7110 SoC, the second patch
adds ethernet nodes for visionfive 2 SBCs.

This series relies on xingyu's syscon patch[1].
For more information and support, you can visit RVspace wiki[2].

[1]: https://patchwork.kernel.org/project/linux-riscv/patch/20230704020239.288500-7-xingyu.wu@starfivetech.com
[2]: https://wiki.rvspace.org


Samin Guo (2):
  riscv: dts: starfive: jh7110: Add ethernet device nodes
  riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

 .../jh7110-starfive-visionfive-2-v1.2a.dts    | 13 ++++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 31 +++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 34 +++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 69 +++++++++++++++++++
 4 files changed, 147 insertions(+)


base-commit: 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5
prerequisite-patch-id: 06c3560d00fe0f65a09c09002b46cd7c1c59facc
-- 
2.17.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

[PATCH v1 1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Samin Guo]

Add JH7110 ethernet device node to support gmac driver for the JH7110
RISC-V SoC.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 69 ++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 06a08c39c671..857e61a216ac 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -263,6 +263,13 @@
 		#clock-cells = <0>;
 	};
 
+	stmmac_axi_setup: stmmac-axi-config {
+		snps,lpi_en;
+		snps,wr_osr_lmt = <4>;
+		snps,rd_osr_lmt = <4>;
+		snps,blen = <256 128 64 32 0 0 0>;
+	};
+
 	tdm_ext: tdm-ext-clock {
 		compatible = "fixed-clock";
 		clock-output-names = "tdm_ext";
@@ -522,6 +529,68 @@
 				 <&syscrg JH7110_SYSRST_WDT_CORE>;
 		};
 
+		gmac0: ethernet@16030000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16030000 0x0 0x10000>;
+			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <7>, <6>, <5>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&aon_syscon 0xc 0x12>;
+			status = "disabled";
+		};
+
+		gmac1: ethernet@16040000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16040000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <78>, <77>, <76>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&sys_syscon 0x90 0x2>;
+			status = "disabled";
+		};
+
 		aoncrg: clock-controller@17000000 {
 			compatible = "starfive,jh7110-aoncrg";
 			reg = <0x0 0x17000000 0x0 0x10000>;
-- 
2.17.1

[PATCH v1 1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Samin Guo]

Add JH7110 ethernet device node to support gmac driver for the JH7110
RISC-V SoC.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 69 ++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 06a08c39c671..857e61a216ac 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -263,6 +263,13 @@
 		#clock-cells = <0>;
 	};
 
+	stmmac_axi_setup: stmmac-axi-config {
+		snps,lpi_en;
+		snps,wr_osr_lmt = <4>;
+		snps,rd_osr_lmt = <4>;
+		snps,blen = <256 128 64 32 0 0 0>;
+	};
+
 	tdm_ext: tdm-ext-clock {
 		compatible = "fixed-clock";
 		clock-output-names = "tdm_ext";
@@ -522,6 +529,68 @@
 				 <&syscrg JH7110_SYSRST_WDT_CORE>;
 		};
 
+		gmac0: ethernet@16030000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16030000 0x0 0x10000>;
+			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <7>, <6>, <5>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&aon_syscon 0xc 0x12>;
+			status = "disabled";
+		};
+
+		gmac1: ethernet@16040000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16040000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <78>, <77>, <76>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&sys_syscon 0x90 0x2>;
+			status = "disabled";
+		};
+
 		aoncrg: clock-controller@17000000 {
 			compatible = "starfive,jh7110-aoncrg";
 			reg = <0x0 0x17000000 0x0 0x10000>;
-- 
2.17.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

[PATCH v1 2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

[Samin Guo]

v1.3B:
  v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
  inverse configurations.
  The tx_clk of v1.3B uses an external clock and needs to be
  switched to an external clock source.

v1.2A:
  v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
  configurations.
  v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
  switch rx and rx to external clock sources.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../jh7110-starfive-visionfive-2-v1.2a.dts    | 13 +++++++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 31 +++++++++++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 34 +++++++++++++++++++
 3 files changed, 78 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
index 4af3300f3cf3..205a13d8c8b1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
@@ -11,3 +11,16 @@
 	model = "StarFive VisionFive 2 v1.2A";
 	compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
 };
+
+&gmac1 {
+	phy-mode = "rmii";
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
+			  <&syscrg JH7110_SYSCLK_GMAC1_RX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1350>;
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
index 9230cc3d8946..36f74d4eda01 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -11,3 +11,34 @@
 	model = "StarFive VisionFive 2 v1.3B";
 	compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
 };
+
+&gmac0 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+};
+
+&gmac1 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,tx-clk-1000-inverted;
+	motorcomm,rx-clk-driver-strength = <3970>;
+	motorcomm,rx-data-driver-strength = <2910>;
+	rx-internal-delay-ps = <1500>;
+	tx-internal-delay-ps = <1500>;
+};
+
+&phy1 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,rx-clk-driver-strength = <3970>;
+	motorcomm,rx-data-driver-strength = <2910>;
+	rx-internal-delay-ps = <300>;
+	tx-internal-delay-ps = <0>;
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..fcb45db42df5 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -11,6 +11,8 @@
 
 / {
 	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		i2c0 = &i2c0;
 		i2c2 = &i2c2;
 		i2c5 = &i2c5;
@@ -86,6 +88,38 @@
 	clock-frequency = <49152000>;
 };
 
+&gmac0 {
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+};
+
+&gmac1 {
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy1: ethernet-phy@1 {
+			reg = <0>;
+		};
+	};
+};
+
 &i2c0 {
 	clock-frequency = <100000>;
 	i2c-sda-hold-time-ns = <300>;
-- 
2.17.1

[PATCH v1 2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

[Samin Guo]

v1.3B:
  v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
  inverse configurations.
  The tx_clk of v1.3B uses an external clock and needs to be
  switched to an external clock source.

v1.2A:
  v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
  configurations.
  v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
  switch rx and rx to external clock sources.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../jh7110-starfive-visionfive-2-v1.2a.dts    | 13 +++++++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 31 +++++++++++++++++
 .../jh7110-starfive-visionfive-2.dtsi         | 34 +++++++++++++++++++
 3 files changed, 78 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
index 4af3300f3cf3..205a13d8c8b1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
@@ -11,3 +11,16 @@
 	model = "StarFive VisionFive 2 v1.2A";
 	compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
 };
+
+&gmac1 {
+	phy-mode = "rmii";
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
+			  <&syscrg JH7110_SYSCLK_GMAC1_RX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1350>;
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
index 9230cc3d8946..36f74d4eda01 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -11,3 +11,34 @@
 	model = "StarFive VisionFive 2 v1.3B";
 	compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
 };
+
+&gmac0 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+};
+
+&gmac1 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,tx-clk-1000-inverted;
+	motorcomm,rx-clk-driver-strength = <3970>;
+	motorcomm,rx-data-driver-strength = <2910>;
+	rx-internal-delay-ps = <1500>;
+	tx-internal-delay-ps = <1500>;
+};
+
+&phy1 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,rx-clk-driver-strength = <3970>;
+	motorcomm,rx-data-driver-strength = <2910>;
+	rx-internal-delay-ps = <300>;
+	tx-internal-delay-ps = <0>;
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..fcb45db42df5 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -11,6 +11,8 @@
 
 / {
 	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		i2c0 = &i2c0;
 		i2c2 = &i2c2;
 		i2c5 = &i2c5;
@@ -86,6 +88,38 @@
 	clock-frequency = <49152000>;
 };
 
+&gmac0 {
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+};
+
+&gmac1 {
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy1: ethernet-phy@1 {
+			reg = <0>;
+		};
+	};
+};
+
 &i2c0 {
 	clock-frequency = <100000>;
 	i2c-sda-hold-time-ns = <300>;
-- 
2.17.1


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Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
> 
> The first patch adds ethernet nodes for jh7110 SoC, the second patch
> adds ethernet nodes for visionfive 2 SBCs.
> 
> This series relies on xingyu's syscon patch[1].
> For more information and support, you can visit RVspace wiki[2].
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
      https://git.kernel.org/conor/c/1ff166c97972
[2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
      https://git.kernel.org/conor/c/b15a73c358d1

Thanks,
Conor.

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
> 
> The first patch adds ethernet nodes for jh7110 SoC, the second patch
> adds ethernet nodes for visionfive 2 SBCs.
> 
> This series relies on xingyu's syscon patch[1].
> For more information and support, you can visit RVspace wiki[2].
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
      https://git.kernel.org/conor/c/1ff166c97972
[2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
      https://git.kernel.org/conor/c/b15a73c358d1

Thanks,
Conor.

_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
From: Conor Dooley <conor@kernel.org>
收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
日期: 2023/7/21

> From: Conor Dooley <conor.dooley@microchip.com>
> 
> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>
>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>> adds ethernet nodes for visionfive 2 SBCs.
>>
>> This series relies on xingyu's syscon patch[1].
>> For more information and support, you can visit RVspace wiki[2].
>>
>> [...]
> 
> Applied to riscv-dt-for-next, thanks!
> 
> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>       https://git.kernel.org/conor/c/1ff166c97972
> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>       https://git.kernel.org/conor/c/b15a73c358d1
> 
> Thanks,
> Conor.


Hi Conor，

Thank you so much！ 

There is a question about the configuration of phy that I would like to consult you.

Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.

Should I submit another pacthes based on riscv-dt-for-next? 

[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com

 
Best regards,
Samin

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
From: Conor Dooley <conor@kernel.org>
收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
日期: 2023/7/21

> From: Conor Dooley <conor.dooley@microchip.com>
> 
> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>
>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>> adds ethernet nodes for visionfive 2 SBCs.
>>
>> This series relies on xingyu's syscon patch[1].
>> For more information and support, you can visit RVspace wiki[2].
>>
>> [...]
> 
> Applied to riscv-dt-for-next, thanks!
> 
> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>       https://git.kernel.org/conor/c/1ff166c97972
> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>       https://git.kernel.org/conor/c/b15a73c358d1
> 
> Thanks,
> Conor.


Hi Conor，

Thank you so much！ 

There is a question about the configuration of phy that I would like to consult you.

Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.

Should I submit another pacthes based on riscv-dt-for-next? 

[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com

 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
>
>
>-------- 原始信息 --------
>主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>From: Conor Dooley <conor@kernel.org>
>收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
>日期: 2023/7/21
>
>> From: Conor Dooley <conor.dooley@microchip.com>
>> 
>> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>>
>>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>>> adds ethernet nodes for visionfive 2 SBCs.
>>>
>>> This series relies on xingyu's syscon patch[1].
>>> For more information and support, you can visit RVspace wiki[2].
>>>
>>> [...]
>> 
>> Applied to riscv-dt-for-next, thanks!
>> 
>> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>>       https://git.kernel.org/conor/c/1ff166c97972
>> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>>       https://git.kernel.org/conor/c/b15a73c358d1
>> 
>> Thanks,
>> Conor.
>
>
>Hi Conor，
>
>Thank you so much！ 
>
>There is a question about the configuration of phy that I would like to consult you.
>
>Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>
>Should I submit another pacthes based on riscv-dt-for-next? 

Huh, dtbs_check passed for these patches,
I didn't realise changes to the motorcomm stuff
were a dep. for this. I'll take a look later.

>
>[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
>
> 
>Best regards,
>Samin

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
>
>
>-------- 原始信息 --------
>主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>From: Conor Dooley <conor@kernel.org>
>收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
>日期: 2023/7/21
>
>> From: Conor Dooley <conor.dooley@microchip.com>
>> 
>> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>>
>>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>>> adds ethernet nodes for visionfive 2 SBCs.
>>>
>>> This series relies on xingyu's syscon patch[1].
>>> For more information and support, you can visit RVspace wiki[2].
>>>
>>> [...]
>> 
>> Applied to riscv-dt-for-next, thanks!
>> 
>> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>>       https://git.kernel.org/conor/c/1ff166c97972
>> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>>       https://git.kernel.org/conor/c/b15a73c358d1
>> 
>> Thanks,
>> Conor.
>
>
>Hi Conor，
>
>Thank you so much！ 
>
>There is a question about the configuration of phy that I would like to consult you.
>
>Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>
>Should I submit another pacthes based on riscv-dt-for-next? 

Huh, dtbs_check passed for these patches,
I didn't realise changes to the motorcomm stuff
were a dep. for this. I'll take a look later.

>
>[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
>
> 
>Best regards,
>Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
From: Conor Dooley <conor@kernel.org>
收件人: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
日期: 2023/7/21

> 
> 
> On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
>>
>>
>> -------- 原始信息 --------
>> 主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>> From: Conor Dooley <conor@kernel.org>
>> 收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
>> 日期: 2023/7/21
>>
>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>
>>> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>>>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>>>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>>>
>>>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>>>> adds ethernet nodes for visionfive 2 SBCs.
>>>>
>>>> This series relies on xingyu's syscon patch[1].
>>>> For more information and support, you can visit RVspace wiki[2].
>>>>
>>>> [...]
>>>
>>> Applied to riscv-dt-for-next, thanks!
>>>
>>> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>>>       https://git.kernel.org/conor/c/1ff166c97972
>>> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>>>       https://git.kernel.org/conor/c/b15a73c358d1
>>>
>>> Thanks,
>>> Conor.
>>
>>
>> Hi Conor，
>>
>> Thank you so much！ 
>>
>> There is a question about the configuration of phy that I would like to consult you.
>>
>> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>>
>> Should I submit another pacthes based on riscv-dt-for-next? 
> 
> Huh, dtbs_check passed for these patches,
> I didn't realise changes to the motorcomm stuff
> were a dep. for this. I'll take a look later.
>
Hi Conor,

Thanks for taking the time to follow this.

After discussing with HAL, I have prepared the code and considered adding the following patch to 
Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
which will then send patches based on linux-next. What do you think? @Andrew @Conor

[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com



--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -28,8 +28,8 @@
        motorcomm,tx-clk-adj-enabled;
        motorcomm,tx-clk-100-inverted;
        motorcomm,tx-clk-1000-inverted;
-       motorcomm,rx-clk-driver-strength = <3970>;
-       motorcomm,rx-data-driver-strength = <2910>;
+       motorcomm,rx-clk-drv-microamp = <3970>;
+       motorcomm,rx-data-drv-microamp = <2910>;
        rx-internal-delay-ps = <1500>;
        tx-internal-delay-ps = <1500>;
 };
@@ -37,8 +37,8 @@
 &phy1 {
        motorcomm,tx-clk-adj-enabled;
        motorcomm,tx-clk-100-inverted;
-       motorcomm,rx-clk-driver-strength = <3970>;
-       motorcomm,rx-data-driver-strength = <2910>;
+       motorcomm,rx-clk-drv-microamp = <3970>;
+       motorcomm,rx-data-drv-microamp = <2910>;
        rx-internal-delay-ps = <300>;
        tx-internal-delay-ps = <0>;
 };


Best regards,
Samin

>>
>> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
>>
>>
>> Best regards,
>> Samin

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
From: Conor Dooley <conor@kernel.org>
收件人: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
日期: 2023/7/21

> 
> 
> On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
>>
>>
>> -------- 原始信息 --------
>> 主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>> From: Conor Dooley <conor@kernel.org>
>> 收件人: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Samin Guo <samin.guo@starfivetech.com>
>> 日期: 2023/7/21
>>
>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>
>>> On Fri, 14 Jul 2023 18:45:19 +0800, Samin Guo wrote:
>>>> This series adds ethernet nodes for StarFive JH7110 RISC-V SoC,
>>>> and has been tested on StarFive VisionFive-2 v1.2A and v1.3B SBC boards.
>>>>
>>>> The first patch adds ethernet nodes for jh7110 SoC, the second patch
>>>> adds ethernet nodes for visionfive 2 SBCs.
>>>>
>>>> This series relies on xingyu's syscon patch[1].
>>>> For more information and support, you can visit RVspace wiki[2].
>>>>
>>>> [...]
>>>
>>> Applied to riscv-dt-for-next, thanks!
>>>
>>> [1/2] riscv: dts: starfive: jh7110: Add ethernet device nodes
>>>       https://git.kernel.org/conor/c/1ff166c97972
>>> [2/2] riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
>>>       https://git.kernel.org/conor/c/b15a73c358d1
>>>
>>> Thanks,
>>> Conor.
>>
>>
>> Hi Conor，
>>
>> Thank you so much！ 
>>
>> There is a question about the configuration of phy that I would like to consult you.
>>
>> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>>
>> Should I submit another pacthes based on riscv-dt-for-next? 
> 
> Huh, dtbs_check passed for these patches,
> I didn't realise changes to the motorcomm stuff
> were a dep. for this. I'll take a look later.
>
Hi Conor,

Thanks for taking the time to follow this.

After discussing with HAL, I have prepared the code and considered adding the following patch to 
Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
which will then send patches based on linux-next. What do you think? @Andrew @Conor

[1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com



--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -28,8 +28,8 @@
        motorcomm,tx-clk-adj-enabled;
        motorcomm,tx-clk-100-inverted;
        motorcomm,tx-clk-1000-inverted;
-       motorcomm,rx-clk-driver-strength = <3970>;
-       motorcomm,rx-data-driver-strength = <2910>;
+       motorcomm,rx-clk-drv-microamp = <3970>;
+       motorcomm,rx-data-drv-microamp = <2910>;
        rx-internal-delay-ps = <1500>;
        tx-internal-delay-ps = <1500>;
 };
@@ -37,8 +37,8 @@
 &phy1 {
        motorcomm,tx-clk-adj-enabled;
        motorcomm,tx-clk-100-inverted;
-       motorcomm,rx-clk-driver-strength = <3970>;
-       motorcomm,rx-data-driver-strength = <2910>;
+       motorcomm,rx-clk-drv-microamp = <3970>;
+       motorcomm,rx-data-drv-microamp = <2910>;
        rx-internal-delay-ps = <300>;
        tx-internal-delay-ps = <0>;
 };


Best regards,
Samin

>>
>> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
>>
>>
>> Best regards,
>> Samin


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Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

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On Fri, Jul 21, 2023 at 03:27:33PM +0800, Guo Samin wrote:

> -------- 原始信息 --------
> 主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
> From: Conor Dooley <conor@kernel.org>

> 收件人: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
> 日期: 2023/7/21

btw, please try and remove this stuff from your mails.

> > On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:

> >> There is a question about the configuration of phy that I would like to consult you.
> >>
> >> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
> >> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
> >> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
> >>
> >> Should I submit another pacthes based on riscv-dt-for-next? 
> > 
> > Huh, dtbs_check passed for these patches,
> > I didn't realise changes to the motorcomm stuff
> > were a dep. for this. I'll take a look later.

> After discussing with HAL, I have prepared the code and considered adding the following patch to 
> Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
> which will then send patches based on linux-next. What do you think? @Andrew @Conor

I think you are better off just sending the dts patch to me, adding a
dts patch that will not apply to net-next to your motorcomm driver series
will only really cause problems for the netdev patchwork automation.

> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com

I meant to ack this yesterday, but it wasn't in my dt-binding review
queue. I'll go do that now.

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Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Conor Dooley]

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On Fri, Jul 21, 2023 at 03:27:33PM +0800, Guo Samin wrote:

> -------- 原始信息 --------
> 主题: Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
> From: Conor Dooley <conor@kernel.org>

> 收件人: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
> 日期: 2023/7/21

btw, please try and remove this stuff from your mails.

> > On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:

> >> There is a question about the configuration of phy that I would like to consult you.
> >>
> >> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
> >> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
> >> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
> >>
> >> Should I submit another pacthes based on riscv-dt-for-next? 
> > 
> > Huh, dtbs_check passed for these patches,
> > I didn't realise changes to the motorcomm stuff
> > were a dep. for this. I'll take a look later.

> After discussing with HAL, I have prepared the code and considered adding the following patch to 
> Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
> which will then send patches based on linux-next. What do you think? @Andrew @Conor

I think you are better off just sending the dts patch to me, adding a
dts patch that will not apply to net-next to your motorcomm driver series
will only really cause problems for the netdev patchwork automation.

> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com

I meant to ack this yesterday, but it wasn't in my dt-binding review
queue. I'll go do that now.

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Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

on 2023/7/21 17:16:41, Conor Dooley wrote:
> On Fri, Jul 21, 2023 at 03:27:33PM +0800, Guo Samin wrote:
> 
>> Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>> From: Conor Dooley <conor@kernel.org>
> 
>> to: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
>> data: 2023/7/21
> 
> btw, please try and remove this stuff from your mails.
>

Sure
 
>>> On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
> 
>>>> There is a question about the configuration of phy that I would like to consult you.
>>>>
>>>> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>>>> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>>>> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>>>>
>>>> Should I submit another pacthes based on riscv-dt-for-next? 
>>>
>>> Huh, dtbs_check passed for these patches,
>>> I didn't realise changes to the motorcomm stuff
>>> were a dep. for this. I'll take a look later.
> 
>> After discussing with HAL, I have prepared the code and considered adding the following patch to 
>> Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
>> which will then send patches based on linux-next. What do you think? @Andrew @Conor
> 
> I think you are better off just sending the dts patch to me, adding a
> dts patch that will not apply to net-next to your motorcomm driver series
> will only really cause problems for the netdev patchwork automation.
>

Okay, I'll send you DTS separately.
 
>> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
> 
> I meant to ack this yesterday, but it wasn't in my dt-binding review
> queue. I'll go do that now.


Best regards,
Samin

Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC

[Guo Samin]

on 2023/7/21 17:16:41, Conor Dooley wrote:
> On Fri, Jul 21, 2023 at 03:27:33PM +0800, Guo Samin wrote:
> 
>> Re: [PATCH v1 0/2] Add ethernet nodes for StarFive JH7110 SoC
>> From: Conor Dooley <conor@kernel.org>
> 
>> to: Guo Samin <samin.guo@starfivetech.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org
>> data: 2023/7/21
> 
> btw, please try and remove this stuff from your mails.
>

Sure
 
>>> On 21 July 2023 03:09:19 IST, Guo Samin <samin.guo@starfivetech.com> wrote:
> 
>>>> There is a question about the configuration of phy that I would like to consult you.
>>>>
>>>> Latest on motorcomm PHY V5[1]: Follow Rob Herring's advice
>>>> motorcomm,rx-xxx-driver-strength Changed to motorcomm,rx-xxx-drv-microamp .
>>>> V5 has already received a reviewed-by from Andrew Lunn, and it should not change again.
>>>>
>>>> Should I submit another pacthes based on riscv-dt-for-next? 
>>>
>>> Huh, dtbs_check passed for these patches,
>>> I didn't realise changes to the motorcomm stuff
>>> were a dep. for this. I'll take a look later.
> 
>> After discussing with HAL, I have prepared the code and considered adding the following patch to 
>> Motorcomm's patchsetes v6. (To fix some spelling errors in v5[1])
>> which will then send patches based on linux-next. What do you think? @Andrew @Conor
> 
> I think you are better off just sending the dts patch to me, adding a
> dts patch that will not apply to net-next to your motorcomm driver series
> will only really cause problems for the netdev patchwork automation.
>

Okay, I'll send you DTS separately.
 
>> [1] https://patchwork.kernel.org/project/netdevbpf/cover/20230720111509.21843-1-samin.guo@starfivetech.com
> 
> I meant to ack this yesterday, but it wasn't in my dt-binding review
> queue. I'll go do that now.


Best regards,
Samin

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