All of lore.kernel.org
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: Luwei Kang <luwei.kang@intel.com>, kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, rkrcmar@redhat.com, linux-kernel@vger.kernel.org,
	joro@8bytes.org, Chao Peng <chao.p.peng@linux.intel.com>
Subject: Re: [PATCH v3 4/9] KVM: x86: Add Intel Processor Trace cpuid emulation
Date: Thu, 30 Nov 2017 13:17:01 +0100	[thread overview]
Message-ID: <46f714d9-a8be-4f62-1f92-21b2a3f12009@redhat.com> (raw)
In-Reply-To: <1511814242-12949-5-git-send-email-luwei.kang@intel.com>

On 27/11/2017 21:23, Luwei Kang wrote:
> +		int t, times = entry->eax & 0xffffffff;

This AND is not necessary.

Paolo

> +
> +		if (!f_intel_pt)
> +			break;
> +
> +		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
> +		for (t = 1; t <= times; ++t) {
> +			if (*nent >= maxnent)
> +				goto out;
> +			do_cpuid_1_ent(&entry[t], function, t);
> +			entry[t].flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
> +			++*nent;
> +		}
> +		break;
> +	}

  parent reply	other threads:[~2017-11-30 12:17 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-27 20:23 [PATCH v3 0/9] Intel Processor Trace virtulization enabling Luwei Kang
2017-11-27 20:23 ` [PATCH v3 1/9] perf/x86/intel/pt: Move Intel-PT MSR bit definitions to a public header Luwei Kang
2017-11-27 20:23 ` [PATCH v3 2/9] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2017-11-27 20:23 ` [PATCH v3 3/9] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2017-11-30 12:25   ` Paolo Bonzini
2017-11-27 20:23 ` [PATCH v3 4/9] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2017-11-30 12:14   ` Paolo Bonzini
2017-11-30 12:17   ` Paolo Bonzini [this message]
2017-11-27 20:23 ` [PATCH v3 5/9] KVM: x86: Add a function to disable/enable Intel PT MSRs intercept Luwei Kang
2017-11-27 20:23 ` [PATCH v3 6/9] KVM: x86: Add Intel processor trace context for each vcpu Luwei Kang
2017-11-27 20:24 ` [PATCH v3 7/9] KVM: x86: Implement Intel Processor Trace MSRs read/write Luwei Kang
2017-11-30 12:20   ` Paolo Bonzini
2017-12-01  6:40     ` Kang, Luwei
2017-12-01  8:33       ` Paolo Bonzini
2017-12-04  1:21         ` Kang, Luwei
2017-11-27 20:24 ` [PATCH v3 8/9] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
2017-11-30 12:22   ` Paolo Bonzini
2017-11-27 20:24 ` [PATCH v3 9/9] KVM: x86: Implement Intel Processor Trace context switch Luwei Kang
2017-11-30 12:27   ` Paolo Bonzini
2017-11-30 12:27 ` [PATCH v3 0/9] Intel Processor Trace virtulization enabling Paolo Bonzini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=46f714d9-a8be-4f62-1f92-21b2a3f12009@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=chao.p.peng@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=joro@8bytes.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luwei.kang@intel.com \
    --cc=mingo@redhat.com \
    --cc=rkrcmar@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.