* [PATCH v4 0/5] Rework MPC5121 DIU support (for 2.6.36)
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Support for MPC5121 DIU in mainline kernel is currently
brocken. The intention of this patch series is to provide
working 5121 DIU support in v2.6.36.
This patch series rework DIU support patches submitted
previously. Comments to the previos patch series have
been addressed, not related changes are dropped and some
changes are split out to separate patches to simplify
review. Furthermore a patch has been added to support
setting display mode using EDID block in the device tree.
v4 series is rebased to apply on current tree. Timur did
some testing of patches from previous version to ensure
that these do not break DIU support for MPC8610 HPCD.
He then has send his Acked-by, so I added it to the
related patches.
The first patch is changed to provide another complete
workaround to the observed issue as suggested by Freescale
technical support.
Anatolij Gustschin (5):
fsl-diu-fb: fix issue with re-enabling DIU area descriptor
fsl-diu-fb: move fsl-diu-fb.h to include/linux
powerpc/mpc5121: shared DIU framebuffer support
powerpc: doc/dts-bindings: update doc of FSL DIU bindings
fsl-diu-fb: Support setting display mode using EDID
Documentation/powerpc/dts-bindings/fsl/diu.txt | 20 ++-
arch/powerpc/include/asm/mpc5121.h | 32 +++
arch/powerpc/platforms/512x/mpc5121_ads.c | 2 +
arch/powerpc/platforms/512x/mpc5121_generic.c | 2 +
arch/powerpc/platforms/512x/mpc512x.h | 2 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 284 ++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 1 +
drivers/video/Kconfig | 1 +
drivers/video/fsl-diu-fb.c | 137 ++++++++++--
{drivers/video => include/linux}/fsl-diu-fb.h | 0
10 files changed, 455 insertions(+), 26 deletions(-)
rename {drivers/video => include/linux}/fsl-diu-fb.h (100%)
^ permalink raw reply [flat|nested] 42+ messages in thread* [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
2010-07-23 14:00 ` Anatolij Gustschin
@ 2010-07-23 14:00 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
by writing new descriptor address doesn't always work.
As a result, DIU continues to display using old area descriptor
even if the new one has been written to the descriptor register of
the plane.
Add the code from Freescale MPC5121EADS BSP for writing descriptor
addresses properly. This fixes the problem for Rev 2.0 silicon.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
v4:
- use workaround code as suggested by FSL technical support.
v3:
- no changes since v1
drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
1 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 27455ce..9b8c991 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
free_pages_exact(virt, size);
}
+/*
+ * Workaround for failed writing desc register of planes.
+ * Needed with MPC5121 DIU rev 2.0 silicon.
+ */
+void wr_reg_wa(u32 *reg, u32 val)
+{
+ do {
+ out_be32(reg, val);
+ } while (in_be32(reg) != val);
+}
+
static int fsl_diu_enable_panel(struct fb_info *info)
{
struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
@@ -330,7 +341,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
switch (mfbi->index) {
case 0: /* plane 0 */
if (hw->desc[0] != ad->paddr)
- out_be32(&hw->desc[0], ad->paddr);
+ wr_reg_wa(&hw->desc[0], ad->paddr);
break;
case 1: /* plane 1 AOI 0 */
cmfbi = machine_data->fsl_diu_info[2]->par;
@@ -340,7 +351,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
cpu_to_le32(cmfbi->ad->paddr);
else
ad->next_ad = 0;
- out_be32(&hw->desc[1], ad->paddr);
+ wr_reg_wa(&hw->desc[1], ad->paddr);
}
break;
case 3: /* plane 2 AOI 0 */
@@ -351,14 +362,14 @@ static int fsl_diu_enable_panel(struct fb_info *info)
cpu_to_le32(cmfbi->ad->paddr);
else
ad->next_ad = 0;
- out_be32(&hw->desc[2], ad->paddr);
+ wr_reg_wa(&hw->desc[2], ad->paddr);
}
break;
case 2: /* plane 1 AOI 1 */
pmfbi = machine_data->fsl_diu_info[1]->par;
ad->next_ad = 0;
if (hw->desc[1] == machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[1], ad->paddr);
+ wr_reg_wa(&hw->desc[1], ad->paddr);
else /* AOI0 open */
pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
break;
@@ -366,7 +377,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
pmfbi = machine_data->fsl_diu_info[3]->par;
ad->next_ad = 0;
if (hw->desc[2] == machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[2], ad->paddr);
+ wr_reg_wa(&hw->desc[2], ad->paddr);
else /* AOI0 was open */
pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
break;
@@ -390,27 +401,24 @@ static int fsl_diu_disable_panel(struct fb_info *info)
switch (mfbi->index) {
case 0: /* plane 0 */
if (hw->desc[0] != machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[0],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
break;
case 1: /* plane 1 AOI 0 */
cmfbi = machine_data->fsl_diu_info[2]->par;
if (cmfbi->count > 0) /* AOI1 is open */
- out_be32(&hw->desc[1], cmfbi->ad->paddr);
+ wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
/* move AOI1 to the first */
else /* AOI1 was closed */
- out_be32(&hw->desc[1],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
/* close AOI 0 */
break;
case 3: /* plane 2 AOI 0 */
cmfbi = machine_data->fsl_diu_info[4]->par;
if (cmfbi->count > 0) /* AOI1 is open */
- out_be32(&hw->desc[2], cmfbi->ad->paddr);
+ wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
/* move AOI1 to the first */
else /* AOI1 was closed */
- out_be32(&hw->desc[2],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
/* close AOI 0 */
break;
case 2: /* plane 1 AOI 1 */
@@ -421,7 +429,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
/* AOI0 is open, must be the first */
pmfbi->ad->next_ad = 0;
} else /* AOI1 is the first in the chain */
- out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
/* close AOI 1 */
break;
case 4: /* plane 2 AOI 1 */
@@ -432,7 +440,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
/* AOI0 is open, must be the first */
pmfbi->ad->next_ad = 0;
} else /* AOI1 is the first in the chain */
- out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
/* close AOI 1 */
break;
default:
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
by writing new descriptor address doesn't always work.
As a result, DIU continues to display using old area descriptor
even if the new one has been written to the descriptor register of
the plane.
Add the code from Freescale MPC5121EADS BSP for writing descriptor
addresses properly. This fixes the problem for Rev 2.0 silicon.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
v4:
- use workaround code as suggested by FSL technical support.
v3:
- no changes since v1
drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
1 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 27455ce..9b8c991 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
free_pages_exact(virt, size);
}
+/*
+ * Workaround for failed writing desc register of planes.
+ * Needed with MPC5121 DIU rev 2.0 silicon.
+ */
+void wr_reg_wa(u32 *reg, u32 val)
+{
+ do {
+ out_be32(reg, val);
+ } while (in_be32(reg) != val);
+}
+
static int fsl_diu_enable_panel(struct fb_info *info)
{
struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
@@ -330,7 +341,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
switch (mfbi->index) {
case 0: /* plane 0 */
if (hw->desc[0] != ad->paddr)
- out_be32(&hw->desc[0], ad->paddr);
+ wr_reg_wa(&hw->desc[0], ad->paddr);
break;
case 1: /* plane 1 AOI 0 */
cmfbi = machine_data->fsl_diu_info[2]->par;
@@ -340,7 +351,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
cpu_to_le32(cmfbi->ad->paddr);
else
ad->next_ad = 0;
- out_be32(&hw->desc[1], ad->paddr);
+ wr_reg_wa(&hw->desc[1], ad->paddr);
}
break;
case 3: /* plane 2 AOI 0 */
@@ -351,14 +362,14 @@ static int fsl_diu_enable_panel(struct fb_info *info)
cpu_to_le32(cmfbi->ad->paddr);
else
ad->next_ad = 0;
- out_be32(&hw->desc[2], ad->paddr);
+ wr_reg_wa(&hw->desc[2], ad->paddr);
}
break;
case 2: /* plane 1 AOI 1 */
pmfbi = machine_data->fsl_diu_info[1]->par;
ad->next_ad = 0;
if (hw->desc[1] = machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[1], ad->paddr);
+ wr_reg_wa(&hw->desc[1], ad->paddr);
else /* AOI0 open */
pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
break;
@@ -366,7 +377,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
pmfbi = machine_data->fsl_diu_info[3]->par;
ad->next_ad = 0;
if (hw->desc[2] = machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[2], ad->paddr);
+ wr_reg_wa(&hw->desc[2], ad->paddr);
else /* AOI0 was open */
pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
break;
@@ -390,27 +401,24 @@ static int fsl_diu_disable_panel(struct fb_info *info)
switch (mfbi->index) {
case 0: /* plane 0 */
if (hw->desc[0] != machine_data->dummy_ad->paddr)
- out_be32(&hw->desc[0],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
break;
case 1: /* plane 1 AOI 0 */
cmfbi = machine_data->fsl_diu_info[2]->par;
if (cmfbi->count > 0) /* AOI1 is open */
- out_be32(&hw->desc[1], cmfbi->ad->paddr);
+ wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
/* move AOI1 to the first */
else /* AOI1 was closed */
- out_be32(&hw->desc[1],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
/* close AOI 0 */
break;
case 3: /* plane 2 AOI 0 */
cmfbi = machine_data->fsl_diu_info[4]->par;
if (cmfbi->count > 0) /* AOI1 is open */
- out_be32(&hw->desc[2], cmfbi->ad->paddr);
+ wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
/* move AOI1 to the first */
else /* AOI1 was closed */
- out_be32(&hw->desc[2],
- machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
/* close AOI 0 */
break;
case 2: /* plane 1 AOI 1 */
@@ -421,7 +429,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
/* AOI0 is open, must be the first */
pmfbi->ad->next_ad = 0;
} else /* AOI1 is the first in the chain */
- out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
/* close AOI 1 */
break;
case 4: /* plane 2 AOI 1 */
@@ -432,7 +440,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
/* AOI0 is open, must be the first */
pmfbi->ad->next_ad = 0;
} else /* AOI1 is the first in the chain */
- out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
+ wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
/* close AOI 1 */
break;
default:
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
2010-07-23 14:00 ` Anatolij Gustschin
(?)
@ 2010-07-28 7:02 ` Grant Likely
-1 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-07-28 7:02 UTC (permalink / raw)
To: Anatolij Gustschin
Cc: linuxppc-dev, linux-fbdev, devicetree-discuss, Detlev Zundel,
Wolfgang Denk
On Fri, Jul 23, 2010 at 8:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
> by writing new descriptor address doesn't always work.
> As a result, DIU continues to display using old area descriptor
> even if the new one has been written to the descriptor register of
> the plane.
>
> Add the code from Freescale MPC5121EADS BSP for writing descriptor
> addresses properly. This fixes the problem for Rev 2.0 silicon.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> v4:
> - use workaround code as suggested by FSL technical support.
>
> v3:
> - no changes since v1
>
> drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
> 1 files changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> index 27455ce..9b8c991 100644
> --- a/drivers/video/fsl-diu-fb.c
> +++ b/drivers/video/fsl-diu-fb.c
> @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> free_pages_exact(virt, size);
> }
>
> +/*
> + * Workaround for failed writing desc register of planes.
> + * Needed with MPC5121 DIU rev 2.0 silicon.
> + */
> +void wr_reg_wa(u32 *reg, u32 val)
> +{
> + do {
> + out_be32(reg, val);
> + } while (in_be32(reg) != val);
> +}
I'll apply this one, but it looks like a potential problem. What
happens if the write never succeeds? The kernel then gets stuck in a
forever busy loop. You should look at reworking it.
g.
> +
> static int fsl_diu_enable_panel(struct fb_info *info)
> {
> struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
> @@ -330,7 +341,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> switch (mfbi->index) {
> case 0: /* plane 0 */
> if (hw->desc[0] != ad->paddr)
> - out_be32(&hw->desc[0], ad->paddr);
> + wr_reg_wa(&hw->desc[0], ad->paddr);
> break;
> case 1: /* plane 1 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[2]->par;
> @@ -340,7 +351,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> cpu_to_le32(cmfbi->ad->paddr);
> else
> ad->next_ad = 0;
> - out_be32(&hw->desc[1], ad->paddr);
> + wr_reg_wa(&hw->desc[1], ad->paddr);
> }
> break;
> case 3: /* plane 2 AOI 0 */
> @@ -351,14 +362,14 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> cpu_to_le32(cmfbi->ad->paddr);
> else
> ad->next_ad = 0;
> - out_be32(&hw->desc[2], ad->paddr);
> + wr_reg_wa(&hw->desc[2], ad->paddr);
> }
> break;
> case 2: /* plane 1 AOI 1 */
> pmfbi = machine_data->fsl_diu_info[1]->par;
> ad->next_ad = 0;
> if (hw->desc[1] == machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[1], ad->paddr);
> + wr_reg_wa(&hw->desc[1], ad->paddr);
> else /* AOI0 open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> break;
> @@ -366,7 +377,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> pmfbi = machine_data->fsl_diu_info[3]->par;
> ad->next_ad = 0;
> if (hw->desc[2] == machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[2], ad->paddr);
> + wr_reg_wa(&hw->desc[2], ad->paddr);
> else /* AOI0 was open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> break;
> @@ -390,27 +401,24 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> switch (mfbi->index) {
> case 0: /* plane 0 */
> if (hw->desc[0] != machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[0],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
> break;
> case 1: /* plane 1 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[2]->par;
> if (cmfbi->count > 0) /* AOI1 is open */
> - out_be32(&hw->desc[1], cmfbi->ad->paddr);
> + wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - out_be32(&hw->desc[1],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> /* close AOI 0 */
> break;
> case 3: /* plane 2 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[4]->par;
> if (cmfbi->count > 0) /* AOI1 is open */
> - out_be32(&hw->desc[2], cmfbi->ad->paddr);
> + wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - out_be32(&hw->desc[2],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> /* close AOI 0 */
> break;
> case 2: /* plane 1 AOI 1 */
> @@ -421,7 +429,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> /* close AOI 1 */
> break;
> case 4: /* plane 2 AOI 1 */
> @@ -432,7 +440,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> /* close AOI 1 */
> break;
> default:
> --
> 1.7.0.4
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
@ 2010-07-28 7:02 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-07-28 7:02 UTC (permalink / raw)
To: Anatolij Gustschin
Cc: linuxppc-dev, linux-fbdev, devicetree-discuss, Detlev Zundel,
Wolfgang Denk
On Fri, Jul 23, 2010 at 8:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
> by writing new descriptor address doesn't always work.
> As a result, DIU continues to display using old area descriptor
> even if the new one has been written to the descriptor register of
> the plane.
>
> Add the code from Freescale MPC5121EADS BSP for writing descriptor
> addresses properly. This fixes the problem for Rev 2.0 silicon.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> v4:
> =A0- use workaround code as suggested by FSL technical support.
>
> v3:
> =A0- no changes since v1
>
> =A0drivers/video/fsl-diu-fb.c | =A0 38 +++++++++++++++++++++++-----------=
----
> =A01 files changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> index 27455ce..9b8c991 100644
> --- a/drivers/video/fsl-diu-fb.c
> +++ b/drivers/video/fsl-diu-fb.c
> @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0free_pages_exact(virt, size);
> =A0}
>
> +/*
> + * Workaround for failed writing desc register of planes.
> + * Needed with MPC5121 DIU rev 2.0 silicon.
> + */
> +void wr_reg_wa(u32 *reg, u32 val)
> +{
> + =A0 =A0 =A0 do {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(reg, val);
> + =A0 =A0 =A0 } while (in_be32(reg) !=3D val);
> +}
I'll apply this one, but it looks like a potential problem. What
happens if the write never succeeds? The kernel then gets stuck in a
forever busy loop. You should look at reworking it.
g.
> +
> =A0static int fsl_diu_enable_panel(struct fb_info *info)
> =A0{
> =A0 =A0 =A0 =A0struct mfb_info *pmfbi, *cmfbi, *mfbi =3D info->par;
> @@ -330,7 +341,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0switch (mfbi->index) {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0case 0: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (hw->desc[0] !=3D ad->p=
addr)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&h=
w->desc[0], ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&=
hw->desc[0], ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0case 1: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 1 AOI 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0cmfbi =3D machine_data->fs=
l_diu_info[2]->par;
> @@ -340,7 +351,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0cpu_to_le32(cmfbi->ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0ad->next_ad =3D 0;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&h=
w->desc[1], ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&=
hw->desc[1], ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0}
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0case 3: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 2 AOI 0 */
> @@ -351,14 +362,14 @@ static int fsl_diu_enable_panel(struct fb_info *inf=
o)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0cpu_to_le32(cmfbi->ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0ad->next_ad =3D 0;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&h=
w->desc[2], ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&=
hw->desc[2], ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0}
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0case 2: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 1 AOI 1 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi =3D machine_data->fs=
l_diu_info[1]->par;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ad->next_ad =3D 0;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (hw->desc[1] =3D=3D mac=
hine_data->dummy_ad->paddr)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&h=
w->desc[1], ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&=
hw->desc[1], ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* AOI0 open */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi->ad-=
>next_ad =3D cpu_to_le32(ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> @@ -366,7 +377,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi =3D machine_data->fs=
l_diu_info[3]->par;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ad->next_ad =3D 0;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (hw->desc[2] =3D=3D mac=
hine_data->dummy_ad->paddr)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&h=
w->desc[2], ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&=
hw->desc[2], ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* AOI0 was open */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi->ad-=
>next_ad =3D cpu_to_le32(ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> @@ -390,27 +401,24 @@ static int fsl_diu_disable_panel(struct fb_info *in=
fo)
> =A0 =A0 =A0 =A0switch (mfbi->index) {
> =A0 =A0 =A0 =A0case 0: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (hw->desc[0] !=3D machine_data->dummy_a=
d->paddr)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[0],
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 machine_dat=
a->dummy_ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[0], mac=
hine_data->dummy_ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0case 1: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 1 AOI 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0cmfbi =3D machine_data->fsl_diu_info[2]->p=
ar;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (cmfbi->count > 0) =A0 /* AOI1 is open =
*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[1], cmfb=
i->ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[1], cmf=
bi->ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* move AOI1 to the first */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0/* AOI1 was closed */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[1],
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 machine_dat=
a->dummy_ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[1], mac=
hine_data->dummy_ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* close AOI 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0case 3: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 2 AOI 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0cmfbi =3D machine_data->fsl_diu_info[4]->p=
ar;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (cmfbi->count > 0) =A0 /* AOI1 is open =
*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[2], cmfb=
i->ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[2], cmf=
bi->ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* move AOI1 to the first */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0/* AOI1 was closed */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[2],
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 machine_dat=
a->dummy_ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[2], mac=
hine_data->dummy_ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* close AOI 0 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0case 2: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 1 AOI 1 */
> @@ -421,7 +429,7 @@ static int fsl_diu_disable_panel(struct fb_info *info=
)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* AOI0 is open, must be the first */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi->ad-=
>next_ad =3D 0;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0} else =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
/* AOI1 is the first in the chain */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[1], mach=
ine_data->dummy_ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[1], mac=
hine_data->dummy_ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0/* close AOI 1 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0case 4: =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 /* plane 2 AOI 1 */
> @@ -432,7 +440,7 @@ static int fsl_diu_disable_panel(struct fb_info *info=
)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* AOI0 is=
open, must be the first */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pmfbi->ad-=
>next_ad =3D 0;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0} else =A0 =A0 =A0 =A0 =A0/* AOI1 is the f=
irst in the chain */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(&hw->desc[2], mach=
ine_data->dummy_ad->paddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wr_reg_wa(&hw->desc[2], mac=
hine_data->dummy_ad->paddr);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* close A=
OI 1 */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0break;
> =A0 =A0 =A0 =A0default:
> --
> 1.7.0.4
>
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area
@ 2010-07-28 7:02 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-07-28 7:02 UTC (permalink / raw)
To: Anatolij Gustschin
Cc: linuxppc-dev, linux-fbdev, devicetree-discuss, Detlev Zundel,
Wolfgang Denk
On Fri, Jul 23, 2010 at 8:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
> by writing new descriptor address doesn't always work.
> As a result, DIU continues to display using old area descriptor
> even if the new one has been written to the descriptor register of
> the plane.
>
> Add the code from Freescale MPC5121EADS BSP for writing descriptor
> addresses properly. This fixes the problem for Rev 2.0 silicon.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> v4:
> - use workaround code as suggested by FSL technical support.
>
> v3:
> - no changes since v1
>
> drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
> 1 files changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> index 27455ce..9b8c991 100644
> --- a/drivers/video/fsl-diu-fb.c
> +++ b/drivers/video/fsl-diu-fb.c
> @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> free_pages_exact(virt, size);
> }
>
> +/*
> + * Workaround for failed writing desc register of planes.
> + * Needed with MPC5121 DIU rev 2.0 silicon.
> + */
> +void wr_reg_wa(u32 *reg, u32 val)
> +{
> + do {
> + out_be32(reg, val);
> + } while (in_be32(reg) != val);
> +}
I'll apply this one, but it looks like a potential problem. What
happens if the write never succeeds? The kernel then gets stuck in a
forever busy loop. You should look at reworking it.
g.
> +
> static int fsl_diu_enable_panel(struct fb_info *info)
> {
> struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
> @@ -330,7 +341,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> switch (mfbi->index) {
> case 0: /* plane 0 */
> if (hw->desc[0] != ad->paddr)
> - out_be32(&hw->desc[0], ad->paddr);
> + wr_reg_wa(&hw->desc[0], ad->paddr);
> break;
> case 1: /* plane 1 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[2]->par;
> @@ -340,7 +351,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> cpu_to_le32(cmfbi->ad->paddr);
> else
> ad->next_ad = 0;
> - out_be32(&hw->desc[1], ad->paddr);
> + wr_reg_wa(&hw->desc[1], ad->paddr);
> }
> break;
> case 3: /* plane 2 AOI 0 */
> @@ -351,14 +362,14 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> cpu_to_le32(cmfbi->ad->paddr);
> else
> ad->next_ad = 0;
> - out_be32(&hw->desc[2], ad->paddr);
> + wr_reg_wa(&hw->desc[2], ad->paddr);
> }
> break;
> case 2: /* plane 1 AOI 1 */
> pmfbi = machine_data->fsl_diu_info[1]->par;
> ad->next_ad = 0;
> if (hw->desc[1] = machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[1], ad->paddr);
> + wr_reg_wa(&hw->desc[1], ad->paddr);
> else /* AOI0 open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> break;
> @@ -366,7 +377,7 @@ static int fsl_diu_enable_panel(struct fb_info *info)
> pmfbi = machine_data->fsl_diu_info[3]->par;
> ad->next_ad = 0;
> if (hw->desc[2] = machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[2], ad->paddr);
> + wr_reg_wa(&hw->desc[2], ad->paddr);
> else /* AOI0 was open */
> pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
> break;
> @@ -390,27 +401,24 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> switch (mfbi->index) {
> case 0: /* plane 0 */
> if (hw->desc[0] != machine_data->dummy_ad->paddr)
> - out_be32(&hw->desc[0],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
> break;
> case 1: /* plane 1 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[2]->par;
> if (cmfbi->count > 0) /* AOI1 is open */
> - out_be32(&hw->desc[1], cmfbi->ad->paddr);
> + wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - out_be32(&hw->desc[1],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> /* close AOI 0 */
> break;
> case 3: /* plane 2 AOI 0 */
> cmfbi = machine_data->fsl_diu_info[4]->par;
> if (cmfbi->count > 0) /* AOI1 is open */
> - out_be32(&hw->desc[2], cmfbi->ad->paddr);
> + wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
> /* move AOI1 to the first */
> else /* AOI1 was closed */
> - out_be32(&hw->desc[2],
> - machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> /* close AOI 0 */
> break;
> case 2: /* plane 1 AOI 1 */
> @@ -421,7 +429,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
> /* close AOI 1 */
> break;
> case 4: /* plane 2 AOI 1 */
> @@ -432,7 +440,7 @@ static int fsl_diu_disable_panel(struct fb_info *info)
> /* AOI0 is open, must be the first */
> pmfbi->ad->next_ad = 0;
> } else /* AOI1 is the first in the chain */
> - out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
> + wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
> /* close AOI 1 */
> break;
> default:
> --
> 1.7.0.4
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 42+ messages in thread[parent not found: <AANLkTikkLVCxU4ZC_nmUhKTQogUNeQzxOX6KqgZcxiYr-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
[not found] ` <AANLkTikkLVCxU4ZC_nmUhKTQogUNeQzxOX6KqgZcxiYr-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-07-28 7:56 ` [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area Anatolij Gustschin
@ 2010-07-28 7:56 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-28 7:56 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Detlev Zundel,
Wolfgang Denk
On Wed, 28 Jul 2010 01:02:59 -0600
Grant Likely <grant.likely@secretlab.ca> wrote:
...
> > drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
> > 1 files changed, 23 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> > index 27455ce..9b8c991 100644
> > --- a/drivers/video/fsl-diu-fb.c
> > +++ b/drivers/video/fsl-diu-fb.c
> > @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> > free_pages_exact(virt, size);
> > }
> >
> > +/*
> > + * Workaround for failed writing desc register of planes.
> > + * Needed with MPC5121 DIU rev 2.0 silicon.
> > + */
> > +void wr_reg_wa(u32 *reg, u32 val)
> > +{
> > + do {
> > + out_be32(reg, val);
> > + } while (in_be32(reg) != val);
> > +}
>
> I'll apply this one, but it looks like a potential problem. What
> happens if the write never succeeds? The kernel then gets stuck in a
> forever busy loop. You should look at reworking it.
I'll submit an incremental patch that prevents looping forever in
the case if the write never succeeds. Thanks!
Anatolij
_______________________________________________
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
@ 2010-07-28 7:56 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-28 7:56 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev, linux-fbdev, devicetree-discuss, Detlev Zundel,
Wolfgang Denk
On Wed, 28 Jul 2010 01:02:59 -0600
Grant Likely <grant.likely@secretlab.ca> wrote:
...
> > =C2=A0drivers/video/fsl-diu-fb.c | =C2=A0 38 +++++++++++++++++++++++---=
------------
> > =C2=A01 files changed, 23 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> > index 27455ce..9b8c991 100644
> > --- a/drivers/video/fsl-diu-fb.c
> > +++ b/drivers/video/fsl-diu-fb.c
> > @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0free_pages_exact=
(virt, size);
> > =C2=A0}
> >
> > +/*
> > + * Workaround for failed writing desc register of planes.
> > + * Needed with MPC5121 DIU rev 2.0 silicon.
> > + */
> > +void wr_reg_wa(u32 *reg, u32 val)
> > +{
> > + =C2=A0 =C2=A0 =C2=A0 do {
> > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 out_be32(reg, val);
> > + =C2=A0 =C2=A0 =C2=A0 } while (in_be32(reg) !=3D val);
> > +}
>=20
> I'll apply this one, but it looks like a potential problem. What
> happens if the write never succeeds? The kernel then gets stuck in a
> forever busy loop. You should look at reworking it.
I'll submit an incremental patch that prevents looping forever in
the case if the write never succeeds. Thanks!
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area
@ 2010-07-28 7:56 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-28 7:56 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Detlev Zundel,
Wolfgang Denk
On Wed, 28 Jul 2010 01:02:59 -0600
Grant Likely <grant.likely@secretlab.ca> wrote:
...
> > drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
> > 1 files changed, 23 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
> > index 27455ce..9b8c991 100644
> > --- a/drivers/video/fsl-diu-fb.c
> > +++ b/drivers/video/fsl-diu-fb.c
> > @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
> > free_pages_exact(virt, size);
> > }
> >
> > +/*
> > + * Workaround for failed writing desc register of planes.
> > + * Needed with MPC5121 DIU rev 2.0 silicon.
> > + */
> > +void wr_reg_wa(u32 *reg, u32 val)
> > +{
> > + do {
> > + out_be32(reg, val);
> > + } while (in_be32(reg) != val);
> > +}
>
> I'll apply this one, but it looks like a potential problem. What
> happens if the write never succeeds? The kernel then gets stuck in a
> forever busy loop. You should look at reworking it.
I'll submit an incremental patch that prevents looping forever in
the case if the write never succeeds. Thanks!
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread
[parent not found: <AANLkTikkLVCxU4ZC_nmUhKTQogUNeQzxOX6KqgZcxiYr__2540.83384429595$1280300644$gmane$org@mail.gmail.com>]
* Re: [PATCH v4 1/5] fsl-diu-fb: fix issue with re-enabling DIU area descriptor
[not found] ` <AANLkTikkLVCxU4ZC_nmUhKTQogUNeQzxOX6KqgZcxiYr__2540.83384429595$1280300644$gmane$org@mail.gmail.com>
@ 2010-07-29 11:48 ` Detlev Zundel
0 siblings, 0 replies; 42+ messages in thread
From: Detlev Zundel @ 2010-07-29 11:48 UTC (permalink / raw)
To: linuxppc-dev
Hi Grant,
> On Fri, Jul 23, 2010 at 8:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
>> On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
>> by writing new descriptor address doesn't always work.
>> As a result, DIU continues to display using old area descriptor
>> even if the new one has been written to the descriptor register of
>> the plane.
>>
>> Add the code from Freescale MPC5121EADS BSP for writing descriptor
>> addresses properly. This fixes the problem for Rev 2.0 silicon.
>>
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>> ---
>> v4:
>> - use workaround code as suggested by FSL technical support.
>>
>> v3:
>> - no changes since v1
>>
>> drivers/video/fsl-diu-fb.c | 38 +++++++++++++++++++++++---------------
>> 1 files changed, 23 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
>> index 27455ce..9b8c991 100644
>> --- a/drivers/video/fsl-diu-fb.c
>> +++ b/drivers/video/fsl-diu-fb.c
>> @@ -317,6 +317,17 @@ static void fsl_diu_free(void *virt, size_t size)
>> free_pages_exact(virt, size);
>> }
>>
>> +/*
>> + * Workaround for failed writing desc register of planes.
>> + * Needed with MPC5121 DIU rev 2.0 silicon.
>> + */
>> +void wr_reg_wa(u32 *reg, u32 val)
>> +{
>> + do {
>> + out_be32(reg, val);
>> + } while (in_be32(reg) != val);
>> +}
>
> I'll apply this one, but it looks like a potential problem. What
> happens if the write never succeeds? The kernel then gets stuck in a
> forever busy loop. You should look at reworking it.
We would surely like to do this "the correct way(tm)". Unfortunately
this commit reflects what we have been told by Freescale support and it
fixes a real observed problem. We fail to find a better solution
without any insight into the internal workings of the functional block.
Cheers
Detlev
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu@denx.de
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v4 2/5] fsl-diu-fb: move fsl-diu-fb.h to include/linux
2010-07-23 14:00 ` Anatolij Gustschin
@ 2010-07-23 14:00 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Some DIU structures will be used in platform code in
subsequent MPC5121 DIU patch, so we move this header
to be able to include it elsewhere.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
---
v4:
- added ack tag
v3:
- no changes since v1
drivers/video/fsl-diu-fb.c | 2 +-
{drivers/video => include/linux}/fsl-diu-fb.h | 0
2 files changed, 1 insertions(+), 1 deletions(-)
rename {drivers/video => include/linux}/fsl-diu-fb.h (100%)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 9b8c991..48905d5 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -34,7 +34,7 @@
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
-#include "fsl-diu-fb.h"
+#include <linux/fsl-diu-fb.h>
/*
* These parameters give default parameters
diff --git a/drivers/video/fsl-diu-fb.h b/include/linux/fsl-diu-fb.h
similarity index 100%
rename from drivers/video/fsl-diu-fb.h
rename to include/linux/fsl-diu-fb.h
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v4 2/5] fsl-diu-fb: move fsl-diu-fb.h to include/linux
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Some DIU structures will be used in platform code in
subsequent MPC5121 DIU patch, so we move this header
to be able to include it elsewhere.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
---
v4:
- added ack tag
v3:
- no changes since v1
drivers/video/fsl-diu-fb.c | 2 +-
{drivers/video => include/linux}/fsl-diu-fb.h | 0
2 files changed, 1 insertions(+), 1 deletions(-)
rename {drivers/video => include/linux}/fsl-diu-fb.h (100%)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 9b8c991..48905d5 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -34,7 +34,7 @@
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
-#include "fsl-diu-fb.h"
+#include <linux/fsl-diu-fb.h>
/*
* These parameters give default parameters
diff --git a/drivers/video/fsl-diu-fb.h b/include/linux/fsl-diu-fb.h
similarity index 100%
rename from drivers/video/fsl-diu-fb.h
rename to include/linux/fsl-diu-fb.h
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
@ 2010-07-23 14:00 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
MPC5121 DIU configuration/setup as initialized by the boot
loader currently will get lost while booting Linux. As a
result displaying the boot splash is not possible through
the boot process.
To prevent this we reserve configured DIU frame buffer
address range while booting and preserve AOI descriptor
and gamma table so that DIU continues displaying through
the whole boot process. On first open from user space
DIU frame buffer driver releases the reserved frame
buffer area and continues to operate as usual.
Signed-off-by: John Rigby <jcrigby@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
---
v4:
- rebased to apply on current tree
- added ack tag
v3:
- remove generic wrappers for early_init() and
setup_arch() and assign needed callbacks directly
as requested by Timur
- add comment explaning the reason for using
reserve_bootmem()
- use less confusing name for "speed" variable in
mpc512x_set_pixel_clock() and add a comment. Also
initialize "err" variable to LONG_MAX.
v1 -> v2:
- use struct for CCM register access, don't use offset macros,
so CCM struct definition is added now
- use struct for DIU descriptors access
- simplify code and correct variable types as suggested by Timur
arch/powerpc/include/asm/mpc5121.h | 32 +++
arch/powerpc/platforms/512x/mpc5121_ads.c | 2 +
arch/powerpc/platforms/512x/mpc5121_generic.c | 2 +
arch/powerpc/platforms/512x/mpc512x.h | 2 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 284 +++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 1 +
drivers/video/fsl-diu-fb.c | 17 ++-
7 files changed, 338 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
index e6a30bb..8c0ab2c 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -21,4 +21,36 @@ struct mpc512x_reset_module {
u32 rcer; /* Reset Control Enable Register */
};
+/*
+ * Clock Control Module
+ */
+struct mpc512x_ccm {
+ u32 spmr; /* System PLL Mode Register */
+ u32 sccr1; /* System Clock Control Register 1 */
+ u32 sccr2; /* System Clock Control Register 2 */
+ u32 scfr1; /* System Clock Frequency Register 1 */
+ u32 scfr2; /* System Clock Frequency Register 2 */
+ u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
+ u32 bcr; /* Bread Crumb Register */
+ u32 p0ccr; /* PSC0 Clock Control Register */
+ u32 p1ccr; /* PSC1 CCR */
+ u32 p2ccr; /* PSC2 CCR */
+ u32 p3ccr; /* PSC3 CCR */
+ u32 p4ccr; /* PSC4 CCR */
+ u32 p5ccr; /* PSC5 CCR */
+ u32 p6ccr; /* PSC6 CCR */
+ u32 p7ccr; /* PSC7 CCR */
+ u32 p8ccr; /* PSC8 CCR */
+ u32 p9ccr; /* PSC9 CCR */
+ u32 p10ccr; /* PSC10 CCR */
+ u32 p11ccr; /* PSC11 CCR */
+ u32 spccr; /* SPDIF Clock Control Register */
+ u32 cccr; /* CFM Clock Control Register */
+ u32 dccr; /* DIU Clock Control Register */
+ u32 m1ccr; /* MSCAN1 CCR */
+ u32 m2ccr; /* MSCAN2 CCR */
+ u32 m3ccr; /* MSCAN3 CCR */
+ u32 m4ccr; /* MSCAN4 CCR */
+ u8 res[0x98]; /* Reserved */
+};
#endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index ee6ae12..dcef6ad 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -42,6 +42,7 @@ static void __init mpc5121_ads_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc5121-pci")
mpc83xx_add_bridge(np);
#endif
+ mpc512x_setup_diu();
}
static void __init mpc5121_ads_init_IRQ(void)
@@ -65,6 +66,7 @@ define_machine(mpc5121_ads) {
.probe = mpc5121_ads_probe,
.setup_arch = mpc5121_ads_setup_arch,
.init = mpc512x_init,
+ .init_early = mpc512x_init_diu,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
index a6c0e3a..e487eb0 100644
--- a/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -52,6 +52,8 @@ define_machine(mpc5121_generic) {
.name = "MPC5121 generic",
.probe = mpc5121_generic_probe,
.init = mpc512x_init,
+ .init_early = mpc512x_init_diu,
+ .setup_arch = mpc512x_setup_diu,
.init_IRQ = mpc512x_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
index b2daca0..1ab6d11 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -16,4 +16,6 @@ extern void __init mpc512x_init(void);
extern int __init mpc5121_clk_init(void);
void __init mpc512x_declare_of_platform_devices(void);
extern void mpc512x_restart(char *cmd);
+extern void mpc512x_init_diu(void);
+extern void mpc512x_setup_diu(void);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 707e572..e41ebbd 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -16,7 +16,11 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of_platform.h>
+#include <linux/fsl-diu-fb.h>
+#include <linux/bootmem.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/cacheflush.h>
#include <asm/machdep.h>
#include <asm/ipic.h>
#include <asm/prom.h>
@@ -54,6 +58,286 @@ void mpc512x_restart(char *cmd)
;
}
+struct fsl_diu_shared_fb {
+ u8 gamma[0x300]; /* 32-bit aligned! */
+ struct diu_ad ad0; /* 32-bit aligned! */
+ phys_addr_t fb_phys;
+ size_t fb_len;
+ bool in_use;
+};
+
+unsigned int mpc512x_get_pixel_format(unsigned int bits_per_pixel,
+ int monitor_port)
+{
+ switch (bits_per_pixel) {
+ case 32:
+ return 0x88883316;
+ case 24:
+ return 0x88082219;
+ case 16:
+ return 0x65053118;
+ }
+ return 0x00000400;
+}
+
+void mpc512x_set_gamma_table(int monitor_port, char *gamma_table_base)
+{
+}
+
+void mpc512x_set_monitor_port(int monitor_port)
+{
+}
+
+#define DIU_DIV_MASK 0x000000ff
+void mpc512x_set_pixel_clock(unsigned int pixclock)
+{
+ unsigned long bestval, bestfreq, speed, busfreq;
+ unsigned long minpixclock, maxpixclock, pixval;
+ struct mpc512x_ccm __iomem *ccm;
+ struct device_node *np;
+ u32 temp;
+ long err;
+ int i;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
+ if (!np) {
+ pr_err("Can't find clock control module.\n");
+ return;
+ }
+
+ ccm = of_iomap(np, 0);
+ of_node_put(np);
+ if (!ccm) {
+ pr_err("Can't map clock control module reg.\n");
+ return;
+ }
+
+ np = of_find_node_by_type(NULL, "cpu");
+ if (np) {
+ const unsigned int *prop =
+ of_get_property(np, "bus-frequency", NULL);
+
+ of_node_put(np);
+ if (prop) {
+ busfreq = *prop;
+ } else {
+ pr_err("Can't get bus-frequency property\n");
+ return;
+ }
+ } else {
+ pr_err("Can't find 'cpu' node.\n");
+ return;
+ }
+
+ /* Pixel Clock configuration */
+ pr_debug("DIU: Bus Frequency = %lu\n", busfreq);
+ speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
+
+ /* Calculate the pixel clock with the smallest error */
+ /* calculate the following in steps to avoid overflow */
+ pr_debug("DIU pixclock in ps - %d\n", pixclock);
+ temp = (1000000000 / pixclock) * 1000;
+ pixclock = temp;
+ pr_debug("DIU pixclock freq - %u\n", pixclock);
+
+ temp = temp / 20; /* pixclock * 0.05 */
+ pr_debug("deviation = %d\n", temp);
+ minpixclock = pixclock - temp;
+ maxpixclock = pixclock + temp;
+ pr_debug("DIU minpixclock - %lu\n", minpixclock);
+ pr_debug("DIU maxpixclock - %lu\n", maxpixclock);
+ pixval = speed/pixclock;
+ pr_debug("DIU pixval = %lu\n", pixval);
+
+ err = LONG_MAX;
+ bestval = pixval;
+ pr_debug("DIU bestval = %lu\n", bestval);
+
+ bestfreq = 0;
+ for (i = -1; i <= 1; i++) {
+ temp = speed / (pixval+i);
+ pr_debug("DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n",
+ i, pixval, temp);
+ if ((temp < minpixclock) || (temp > maxpixclock))
+ pr_debug("DIU exceeds monitor range (%lu to %lu)\n",
+ minpixclock, maxpixclock);
+ else if (abs(temp - pixclock) < err) {
+ pr_debug("Entered the else if block %d\n", i);
+ err = abs(temp - pixclock);
+ bestval = pixval + i;
+ bestfreq = temp;
+ }
+ }
+
+ pr_debug("DIU chose = %lx\n", bestval);
+ pr_debug("DIU error = %ld\n NomPixClk ", err);
+ pr_debug("DIU: Best Freq = %lx\n", bestfreq);
+ /* Modify DIU_DIV in CCM SCFR1 */
+ temp = in_be32(&ccm->scfr1);
+ pr_debug("DIU: Current value of SCFR1: 0x%08x\n", temp);
+ temp &= ~DIU_DIV_MASK;
+ temp |= (bestval & DIU_DIV_MASK);
+ out_be32(&ccm->scfr1, temp);
+ pr_debug("DIU: Modified value of SCFR1: 0x%08x\n", temp);
+ iounmap(ccm);
+}
+
+ssize_t mpc512x_show_monitor_port(int monitor_port, char *buf)
+{
+ return sprintf(buf, "0 - 5121 LCD\n");
+}
+
+int mpc512x_set_sysfs_monitor_port(int val)
+{
+ return 0;
+}
+
+static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb;
+
+#if defined(CONFIG_FB_FSL_DIU) || \
+ defined(CONFIG_FB_FSL_DIU_MODULE)
+static inline void mpc512x_free_bootmem(struct page *page)
+{
+ __ClearPageReserved(page);
+ BUG_ON(PageTail(page));
+ BUG_ON(atomic_read(&page->_count) > 1);
+ atomic_set(&page->_count, 1);
+ __free_page(page);
+ totalram_pages++;
+}
+
+void mpc512x_release_bootmem(void)
+{
+ unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK;
+ unsigned long size = diu_shared_fb.fb_len;
+ unsigned long start, end;
+
+ if (diu_shared_fb.in_use) {
+ start = PFN_UP(addr);
+ end = PFN_DOWN(addr + size);
+
+ for (; start < end; start++)
+ mpc512x_free_bootmem(pfn_to_page(start));
+
+ diu_shared_fb.in_use = false;
+ }
+ diu_ops.release_bootmem = NULL;
+}
+#endif
+
+/*
+ * Check if DIU was pre-initialized. If so, perform steps
+ * needed to continue displaying through the whole boot process.
+ * Move area descriptor and gamma table elsewhere, they are
+ * destroyed by bootmem allocator otherwise. The frame buffer
+ * address range will be reserved in setup_arch() after bootmem
+ * allocator is up.
+ */
+void __init mpc512x_init_diu(void)
+{
+ struct device_node *np;
+ struct diu __iomem *diu_reg;
+ phys_addr_t desc;
+ void __iomem *vaddr;
+ unsigned long mode, pix_fmt, res, bpp;
+ unsigned long dst;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu");
+ if (!np) {
+ pr_err("No DIU node\n");
+ return;
+ }
+
+ diu_reg = of_iomap(np, 0);
+ of_node_put(np);
+ if (!diu_reg) {
+ pr_err("Can't map DIU\n");
+ return;
+ }
+
+ mode = in_be32(&diu_reg->diu_mode);
+ if (mode != MFB_MODE1) {
+ pr_info("%s: DIU OFF\n", __func__);
+ goto out;
+ }
+
+ desc = in_be32(&diu_reg->desc[0]);
+ vaddr = ioremap(desc, sizeof(struct diu_ad));
+ if (!vaddr) {
+ pr_err("Can't map DIU area desc.\n");
+ goto out;
+ }
+ memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
+ /* flush fb area descriptor */
+ dst = (unsigned long)&diu_shared_fb.ad0;
+ flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
+
+ res = in_be32(&diu_reg->disp_size);
+ pix_fmt = in_le32(vaddr);
+ bpp = ((pix_fmt >> 16) & 0x3) + 1;
+ diu_shared_fb.fb_phys = in_le32(vaddr + 4);
+ diu_shared_fb.fb_len = ((res & 0xfff0000) >> 16) * (res & 0xfff) * bpp;
+ diu_shared_fb.in_use = true;
+ iounmap(vaddr);
+
+ desc = in_be32(&diu_reg->gamma);
+ vaddr = ioremap(desc, sizeof(diu_shared_fb.gamma));
+ if (!vaddr) {
+ pr_err("Can't map DIU area desc.\n");
+ diu_shared_fb.in_use = false;
+ goto out;
+ }
+ memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma));
+ /* flush gamma table */
+ dst = (unsigned long)&diu_shared_fb.gamma;
+ flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1);
+
+ iounmap(vaddr);
+ out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
+ out_be32(&diu_reg->desc[1], 0);
+ out_be32(&diu_reg->desc[2], 0);
+ out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0));
+
+out:
+ iounmap(diu_reg);
+}
+
+void __init mpc512x_setup_diu(void)
+{
+ int ret;
+
+ /*
+ * We do not allocate and configure new area for bitmap buffer
+ * because it would requere copying bitmap data (splash image)
+ * and so negatively affect boot time. Instead we reserve the
+ * already configured frame buffer area so that it won't be
+ * destroyed. The starting address of the area to reserve and
+ * also it's length is passed to reserve_bootmem(). It will be
+ * freed later on first open of fbdev, when splash image is not
+ * needed any more.
+ */
+ if (diu_shared_fb.in_use) {
+ ret = reserve_bootmem(diu_shared_fb.fb_phys,
+ diu_shared_fb.fb_len,
+ BOOTMEM_EXCLUSIVE);
+ if (ret) {
+ pr_err("%s: reserve bootmem failed\n", __func__);
+ diu_shared_fb.in_use = false;
+ }
+ }
+
+#if defined(CONFIG_FB_FSL_DIU) || \
+ defined(CONFIG_FB_FSL_DIU_MODULE)
+ diu_ops.get_pixel_format = mpc512x_get_pixel_format;
+ diu_ops.set_gamma_table = mpc512x_set_gamma_table;
+ diu_ops.set_monitor_port = mpc512x_set_monitor_port;
+ diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
+ diu_ops.show_monitor_port = mpc512x_show_monitor_port;
+ diu_ops.set_sysfs_monitor_port = mpc512x_set_sysfs_monitor_port;
+ diu_ops.release_bootmem = mpc512x_release_bootmem;
+#endif
+}
+
void __init mpc512x_init_IRQ(void)
{
struct device_node *np;
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 42381bb..5360948 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -30,6 +30,7 @@ struct platform_diu_data_ops {
void (*set_pixel_clock) (unsigned int pixclock);
ssize_t (*show_monitor_port) (int monitor_port, char *buf);
int (*set_sysfs_monitor_port) (int val);
+ void (*release_bootmem) (void);
};
extern struct platform_diu_data_ops diu_ops;
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 48905d5..db3e360 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -1108,6 +1108,10 @@ static int fsl_diu_open(struct fb_info *info, int user)
struct mfb_info *mfbi = info->par;
int res = 0;
+ /* free boot splash memory on first /dev/fb0 open */
+ if (!mfbi->index && diu_ops.release_bootmem)
+ diu_ops.release_bootmem();
+
spin_lock(&diu_lock);
mfbi->count++;
if (mfbi->count == 1) {
@@ -1435,6 +1439,7 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
int ret, i, error = 0;
struct resource res;
struct fsl_diu_data *machine_data;
+ int diu_mode;
machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
if (!machine_data)
@@ -1471,7 +1476,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
goto error2;
}
- out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
+ diu_mode = in_be32(&dr.diu_reg->diu_mode);
+ if (diu_mode != MFB_MODE1)
+ out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
/* Get the IRQ of the DIU */
machine_data->irq = irq_of_parse_and_map(np, 0);
@@ -1519,7 +1526,13 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
machine_data->dummy_ad->offset_xyd = 0;
machine_data->dummy_ad->next_ad = 0;
- out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
+ /*
+ * Let DIU display splash screen if it was pre-initialized
+ * by the bootloader, set dummy area descriptor otherwise.
+ */
+ if (diu_mode != MFB_MODE1)
+ out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
+
out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
MPC5121 DIU configuration/setup as initialized by the boot
loader currently will get lost while booting Linux. As a
result displaying the boot splash is not possible through
the boot process.
To prevent this we reserve configured DIU frame buffer
address range while booting and preserve AOI descriptor
and gamma table so that DIU continues displaying through
the whole boot process. On first open from user space
DIU frame buffer driver releases the reserved frame
buffer area and continues to operate as usual.
Signed-off-by: John Rigby <jcrigby@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
---
v4:
- rebased to apply on current tree
- added ack tag
v3:
- remove generic wrappers for early_init() and
setup_arch() and assign needed callbacks directly
as requested by Timur
- add comment explaning the reason for using
reserve_bootmem()
- use less confusing name for "speed" variable in
mpc512x_set_pixel_clock() and add a comment. Also
initialize "err" variable to LONG_MAX.
v1 -> v2:
- use struct for CCM register access, don't use offset macros,
so CCM struct definition is added now
- use struct for DIU descriptors access
- simplify code and correct variable types as suggested by Timur
arch/powerpc/include/asm/mpc5121.h | 32 +++
arch/powerpc/platforms/512x/mpc5121_ads.c | 2 +
arch/powerpc/platforms/512x/mpc5121_generic.c | 2 +
arch/powerpc/platforms/512x/mpc512x.h | 2 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 284 +++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 1 +
drivers/video/fsl-diu-fb.c | 17 ++-
7 files changed, 338 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
index e6a30bb..8c0ab2c 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -21,4 +21,36 @@ struct mpc512x_reset_module {
u32 rcer; /* Reset Control Enable Register */
};
+/*
+ * Clock Control Module
+ */
+struct mpc512x_ccm {
+ u32 spmr; /* System PLL Mode Register */
+ u32 sccr1; /* System Clock Control Register 1 */
+ u32 sccr2; /* System Clock Control Register 2 */
+ u32 scfr1; /* System Clock Frequency Register 1 */
+ u32 scfr2; /* System Clock Frequency Register 2 */
+ u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
+ u32 bcr; /* Bread Crumb Register */
+ u32 p0ccr; /* PSC0 Clock Control Register */
+ u32 p1ccr; /* PSC1 CCR */
+ u32 p2ccr; /* PSC2 CCR */
+ u32 p3ccr; /* PSC3 CCR */
+ u32 p4ccr; /* PSC4 CCR */
+ u32 p5ccr; /* PSC5 CCR */
+ u32 p6ccr; /* PSC6 CCR */
+ u32 p7ccr; /* PSC7 CCR */
+ u32 p8ccr; /* PSC8 CCR */
+ u32 p9ccr; /* PSC9 CCR */
+ u32 p10ccr; /* PSC10 CCR */
+ u32 p11ccr; /* PSC11 CCR */
+ u32 spccr; /* SPDIF Clock Control Register */
+ u32 cccr; /* CFM Clock Control Register */
+ u32 dccr; /* DIU Clock Control Register */
+ u32 m1ccr; /* MSCAN1 CCR */
+ u32 m2ccr; /* MSCAN2 CCR */
+ u32 m3ccr; /* MSCAN3 CCR */
+ u32 m4ccr; /* MSCAN4 CCR */
+ u8 res[0x98]; /* Reserved */
+};
#endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index ee6ae12..dcef6ad 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -42,6 +42,7 @@ static void __init mpc5121_ads_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc5121-pci")
mpc83xx_add_bridge(np);
#endif
+ mpc512x_setup_diu();
}
static void __init mpc5121_ads_init_IRQ(void)
@@ -65,6 +66,7 @@ define_machine(mpc5121_ads) {
.probe = mpc5121_ads_probe,
.setup_arch = mpc5121_ads_setup_arch,
.init = mpc512x_init,
+ .init_early = mpc512x_init_diu,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
index a6c0e3a..e487eb0 100644
--- a/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -52,6 +52,8 @@ define_machine(mpc5121_generic) {
.name = "MPC5121 generic",
.probe = mpc5121_generic_probe,
.init = mpc512x_init,
+ .init_early = mpc512x_init_diu,
+ .setup_arch = mpc512x_setup_diu,
.init_IRQ = mpc512x_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
index b2daca0..1ab6d11 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -16,4 +16,6 @@ extern void __init mpc512x_init(void);
extern int __init mpc5121_clk_init(void);
void __init mpc512x_declare_of_platform_devices(void);
extern void mpc512x_restart(char *cmd);
+extern void mpc512x_init_diu(void);
+extern void mpc512x_setup_diu(void);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 707e572..e41ebbd 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -16,7 +16,11 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of_platform.h>
+#include <linux/fsl-diu-fb.h>
+#include <linux/bootmem.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/cacheflush.h>
#include <asm/machdep.h>
#include <asm/ipic.h>
#include <asm/prom.h>
@@ -54,6 +58,286 @@ void mpc512x_restart(char *cmd)
;
}
+struct fsl_diu_shared_fb {
+ u8 gamma[0x300]; /* 32-bit aligned! */
+ struct diu_ad ad0; /* 32-bit aligned! */
+ phys_addr_t fb_phys;
+ size_t fb_len;
+ bool in_use;
+};
+
+unsigned int mpc512x_get_pixel_format(unsigned int bits_per_pixel,
+ int monitor_port)
+{
+ switch (bits_per_pixel) {
+ case 32:
+ return 0x88883316;
+ case 24:
+ return 0x88082219;
+ case 16:
+ return 0x65053118;
+ }
+ return 0x00000400;
+}
+
+void mpc512x_set_gamma_table(int monitor_port, char *gamma_table_base)
+{
+}
+
+void mpc512x_set_monitor_port(int monitor_port)
+{
+}
+
+#define DIU_DIV_MASK 0x000000ff
+void mpc512x_set_pixel_clock(unsigned int pixclock)
+{
+ unsigned long bestval, bestfreq, speed, busfreq;
+ unsigned long minpixclock, maxpixclock, pixval;
+ struct mpc512x_ccm __iomem *ccm;
+ struct device_node *np;
+ u32 temp;
+ long err;
+ int i;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
+ if (!np) {
+ pr_err("Can't find clock control module.\n");
+ return;
+ }
+
+ ccm = of_iomap(np, 0);
+ of_node_put(np);
+ if (!ccm) {
+ pr_err("Can't map clock control module reg.\n");
+ return;
+ }
+
+ np = of_find_node_by_type(NULL, "cpu");
+ if (np) {
+ const unsigned int *prop + of_get_property(np, "bus-frequency", NULL);
+
+ of_node_put(np);
+ if (prop) {
+ busfreq = *prop;
+ } else {
+ pr_err("Can't get bus-frequency property\n");
+ return;
+ }
+ } else {
+ pr_err("Can't find 'cpu' node.\n");
+ return;
+ }
+
+ /* Pixel Clock configuration */
+ pr_debug("DIU: Bus Frequency = %lu\n", busfreq);
+ speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
+
+ /* Calculate the pixel clock with the smallest error */
+ /* calculate the following in steps to avoid overflow */
+ pr_debug("DIU pixclock in ps - %d\n", pixclock);
+ temp = (1000000000 / pixclock) * 1000;
+ pixclock = temp;
+ pr_debug("DIU pixclock freq - %u\n", pixclock);
+
+ temp = temp / 20; /* pixclock * 0.05 */
+ pr_debug("deviation = %d\n", temp);
+ minpixclock = pixclock - temp;
+ maxpixclock = pixclock + temp;
+ pr_debug("DIU minpixclock - %lu\n", minpixclock);
+ pr_debug("DIU maxpixclock - %lu\n", maxpixclock);
+ pixval = speed/pixclock;
+ pr_debug("DIU pixval = %lu\n", pixval);
+
+ err = LONG_MAX;
+ bestval = pixval;
+ pr_debug("DIU bestval = %lu\n", bestval);
+
+ bestfreq = 0;
+ for (i = -1; i <= 1; i++) {
+ temp = speed / (pixval+i);
+ pr_debug("DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n",
+ i, pixval, temp);
+ if ((temp < minpixclock) || (temp > maxpixclock))
+ pr_debug("DIU exceeds monitor range (%lu to %lu)\n",
+ minpixclock, maxpixclock);
+ else if (abs(temp - pixclock) < err) {
+ pr_debug("Entered the else if block %d\n", i);
+ err = abs(temp - pixclock);
+ bestval = pixval + i;
+ bestfreq = temp;
+ }
+ }
+
+ pr_debug("DIU chose = %lx\n", bestval);
+ pr_debug("DIU error = %ld\n NomPixClk ", err);
+ pr_debug("DIU: Best Freq = %lx\n", bestfreq);
+ /* Modify DIU_DIV in CCM SCFR1 */
+ temp = in_be32(&ccm->scfr1);
+ pr_debug("DIU: Current value of SCFR1: 0x%08x\n", temp);
+ temp &= ~DIU_DIV_MASK;
+ temp |= (bestval & DIU_DIV_MASK);
+ out_be32(&ccm->scfr1, temp);
+ pr_debug("DIU: Modified value of SCFR1: 0x%08x\n", temp);
+ iounmap(ccm);
+}
+
+ssize_t mpc512x_show_monitor_port(int monitor_port, char *buf)
+{
+ return sprintf(buf, "0 - 5121 LCD\n");
+}
+
+int mpc512x_set_sysfs_monitor_port(int val)
+{
+ return 0;
+}
+
+static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb;
+
+#if defined(CONFIG_FB_FSL_DIU) || \
+ defined(CONFIG_FB_FSL_DIU_MODULE)
+static inline void mpc512x_free_bootmem(struct page *page)
+{
+ __ClearPageReserved(page);
+ BUG_ON(PageTail(page));
+ BUG_ON(atomic_read(&page->_count) > 1);
+ atomic_set(&page->_count, 1);
+ __free_page(page);
+ totalram_pages++;
+}
+
+void mpc512x_release_bootmem(void)
+{
+ unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK;
+ unsigned long size = diu_shared_fb.fb_len;
+ unsigned long start, end;
+
+ if (diu_shared_fb.in_use) {
+ start = PFN_UP(addr);
+ end = PFN_DOWN(addr + size);
+
+ for (; start < end; start++)
+ mpc512x_free_bootmem(pfn_to_page(start));
+
+ diu_shared_fb.in_use = false;
+ }
+ diu_ops.release_bootmem = NULL;
+}
+#endif
+
+/*
+ * Check if DIU was pre-initialized. If so, perform steps
+ * needed to continue displaying through the whole boot process.
+ * Move area descriptor and gamma table elsewhere, they are
+ * destroyed by bootmem allocator otherwise. The frame buffer
+ * address range will be reserved in setup_arch() after bootmem
+ * allocator is up.
+ */
+void __init mpc512x_init_diu(void)
+{
+ struct device_node *np;
+ struct diu __iomem *diu_reg;
+ phys_addr_t desc;
+ void __iomem *vaddr;
+ unsigned long mode, pix_fmt, res, bpp;
+ unsigned long dst;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu");
+ if (!np) {
+ pr_err("No DIU node\n");
+ return;
+ }
+
+ diu_reg = of_iomap(np, 0);
+ of_node_put(np);
+ if (!diu_reg) {
+ pr_err("Can't map DIU\n");
+ return;
+ }
+
+ mode = in_be32(&diu_reg->diu_mode);
+ if (mode != MFB_MODE1) {
+ pr_info("%s: DIU OFF\n", __func__);
+ goto out;
+ }
+
+ desc = in_be32(&diu_reg->desc[0]);
+ vaddr = ioremap(desc, sizeof(struct diu_ad));
+ if (!vaddr) {
+ pr_err("Can't map DIU area desc.\n");
+ goto out;
+ }
+ memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
+ /* flush fb area descriptor */
+ dst = (unsigned long)&diu_shared_fb.ad0;
+ flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
+
+ res = in_be32(&diu_reg->disp_size);
+ pix_fmt = in_le32(vaddr);
+ bpp = ((pix_fmt >> 16) & 0x3) + 1;
+ diu_shared_fb.fb_phys = in_le32(vaddr + 4);
+ diu_shared_fb.fb_len = ((res & 0xfff0000) >> 16) * (res & 0xfff) * bpp;
+ diu_shared_fb.in_use = true;
+ iounmap(vaddr);
+
+ desc = in_be32(&diu_reg->gamma);
+ vaddr = ioremap(desc, sizeof(diu_shared_fb.gamma));
+ if (!vaddr) {
+ pr_err("Can't map DIU area desc.\n");
+ diu_shared_fb.in_use = false;
+ goto out;
+ }
+ memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma));
+ /* flush gamma table */
+ dst = (unsigned long)&diu_shared_fb.gamma;
+ flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1);
+
+ iounmap(vaddr);
+ out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
+ out_be32(&diu_reg->desc[1], 0);
+ out_be32(&diu_reg->desc[2], 0);
+ out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0));
+
+out:
+ iounmap(diu_reg);
+}
+
+void __init mpc512x_setup_diu(void)
+{
+ int ret;
+
+ /*
+ * We do not allocate and configure new area for bitmap buffer
+ * because it would requere copying bitmap data (splash image)
+ * and so negatively affect boot time. Instead we reserve the
+ * already configured frame buffer area so that it won't be
+ * destroyed. The starting address of the area to reserve and
+ * also it's length is passed to reserve_bootmem(). It will be
+ * freed later on first open of fbdev, when splash image is not
+ * needed any more.
+ */
+ if (diu_shared_fb.in_use) {
+ ret = reserve_bootmem(diu_shared_fb.fb_phys,
+ diu_shared_fb.fb_len,
+ BOOTMEM_EXCLUSIVE);
+ if (ret) {
+ pr_err("%s: reserve bootmem failed\n", __func__);
+ diu_shared_fb.in_use = false;
+ }
+ }
+
+#if defined(CONFIG_FB_FSL_DIU) || \
+ defined(CONFIG_FB_FSL_DIU_MODULE)
+ diu_ops.get_pixel_format = mpc512x_get_pixel_format;
+ diu_ops.set_gamma_table = mpc512x_set_gamma_table;
+ diu_ops.set_monitor_port = mpc512x_set_monitor_port;
+ diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
+ diu_ops.show_monitor_port = mpc512x_show_monitor_port;
+ diu_ops.set_sysfs_monitor_port = mpc512x_set_sysfs_monitor_port;
+ diu_ops.release_bootmem = mpc512x_release_bootmem;
+#endif
+}
+
void __init mpc512x_init_IRQ(void)
{
struct device_node *np;
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 42381bb..5360948 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -30,6 +30,7 @@ struct platform_diu_data_ops {
void (*set_pixel_clock) (unsigned int pixclock);
ssize_t (*show_monitor_port) (int monitor_port, char *buf);
int (*set_sysfs_monitor_port) (int val);
+ void (*release_bootmem) (void);
};
extern struct platform_diu_data_ops diu_ops;
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 48905d5..db3e360 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -1108,6 +1108,10 @@ static int fsl_diu_open(struct fb_info *info, int user)
struct mfb_info *mfbi = info->par;
int res = 0;
+ /* free boot splash memory on first /dev/fb0 open */
+ if (!mfbi->index && diu_ops.release_bootmem)
+ diu_ops.release_bootmem();
+
spin_lock(&diu_lock);
mfbi->count++;
if (mfbi->count = 1) {
@@ -1435,6 +1439,7 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
int ret, i, error = 0;
struct resource res;
struct fsl_diu_data *machine_data;
+ int diu_mode;
machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
if (!machine_data)
@@ -1471,7 +1476,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
goto error2;
}
- out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
+ diu_mode = in_be32(&dr.diu_reg->diu_mode);
+ if (diu_mode != MFB_MODE1)
+ out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
/* Get the IRQ of the DIU */
machine_data->irq = irq_of_parse_and_map(np, 0);
@@ -1519,7 +1526,13 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
machine_data->dummy_ad->offset_xyd = 0;
machine_data->dummy_ad->next_ad = 0;
- out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
+ /*
+ * Let DIU display splash screen if it was pre-initialized
+ * by the bootloader, set dummy area descriptor otherwise.
+ */
+ if (diu_mode != MFB_MODE1)
+ out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
+
out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* Re: [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
(?)
@ 2011-12-15 17:27 ` Tabi Timur-B04825
-1 siblings, 0 replies; 42+ messages in thread
From: Tabi Timur-B04825 @ 2011-12-15 17:27 UTC (permalink / raw)
To: linux-fbdev
On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> @@ -1471,7 +1476,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
> goto error2;
> }
>
> - out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
> + diu_mode = in_be32(&dr.diu_reg->diu_mode);
> + if (diu_mode != MFB_MODE1)
> + out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
Anatolij,
I know this patch is old, but I just noticed something odd about it
that I need your help with.
In the above snippet, you test for != MFB_MODE1. My understanding is
that U-boot only supports modes 0 and 1, never modes 2 or 3. So
diu_mode can only ever be 0 or 1. That means that that the above code
is equivalent to:
diu_mode = in_be32(&dr.diu_reg->diu_mode);
if (diu_mode = 0)
out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
which is silly, because now we're writing 0 to diu_mode only if it's already 0.
Am I missing something?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
(?)
(?)
@ 2011-12-15 21:26 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2011-12-15 21:26 UTC (permalink / raw)
To: linux-fbdev
On Thu, 15 Dec 2011 17:27:53 +0000
Tabi Timur-B04825 <B04825@freescale.com> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
>
> > @@ -1471,7 +1476,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
> > goto error2;
> > }
> >
> > - out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
> > + diu_mode = in_be32(&dr.diu_reg->diu_mode);
> > + if (diu_mode != MFB_MODE1)
> > + out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
>
> Anatolij,
>
> I know this patch is old, but I just noticed something odd about it
> that I need your help with.
>
> In the above snippet, you test for != MFB_MODE1. My understanding is
> that U-boot only supports modes 0 and 1, never modes 2 or 3. So
> diu_mode can only ever be 0 or 1. That means that that the above code
> is equivalent to:
>
> diu_mode = in_be32(&dr.diu_reg->diu_mode);
> if (diu_mode = 0)
> out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
>
> which is silly, because now we're writing 0 to diu_mode only if it's already 0.
>
> Am I missing something?
the intention of the above code snippet was:
not to disable DIU if it is in mode 1 (displaying splash screen)
and to disable DIU if it is in modes 2, 3 or 4 for some reason.
We cannot guarantee that the DIU is not in these modes. Even
if U-Boot didn't set these modes there is still a possibility
that such mode is configured. E.g. I've seen U-Boot binary
standalone applications for other display controllers initializing
the display controller.
But you are right. With this snippet, if the DIU is already
disabled, there will be not needed mode register access. So
the code should better look like:
diu_mode = in_be32(&dr.diu_reg->diu_mode);
if (diu_mode && diu_mode != MFB_MODE1)
out_be32(&dr.diu_reg->diu_mode, 0);
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
` (2 preceding siblings ...)
(?)
@ 2011-12-16 18:24 ` Timur Tabi
-1 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2011-12-16 18:24 UTC (permalink / raw)
To: linux-fbdev
Anatolij Gustschin wrote:
> We cannot guarantee that the DIU is not in these modes. Even
> if U-Boot didn't set these modes there is still a possibility
> that such mode is configured. E.g. I've seen U-Boot binary
> standalone applications for other display controllers initializing
> the display controller.
True, but modes 2 and 3 don't make any sense. 2 is just a color bar, and 3 writes back to memory (which means you need to have a reserved DMA buffer otherwise you'll crash). Have you really seen Linux boot with the DIU in either of these modes?
> But you are right. With this snippet, if the DIU is already
> disabled, there will be not needed mode register access. So
> the code should better look like:
>
> diu_mode = in_be32(&dr.diu_reg->diu_mode);
> if (diu_mode && diu_mode != MFB_MODE1)
> out_be32(&dr.diu_reg->diu_mode, 0);
Ok. I'm planning on cleaning up the driver so that it does not initialize the DIU until the .open call, and once that's done, I should be able to remove most of the code from your patch.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
` (3 preceding siblings ...)
(?)
@ 2011-12-16 22:59 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2011-12-16 22:59 UTC (permalink / raw)
To: linux-fbdev
On Fri, 16 Dec 2011 12:24:49 -0600
Timur Tabi <timur@freescale.com> wrote:
> Anatolij Gustschin wrote:
>
> > We cannot guarantee that the DIU is not in these modes. Even
> > if U-Boot didn't set these modes there is still a possibility
> > that such mode is configured. E.g. I've seen U-Boot binary
> > standalone applications for other display controllers initializing
> > the display controller.
>
> True, but modes 2 and 3 don't make any sense. 2 is just a color bar,
> and 3 writes back to memory (which means you need to have a reserved
> DMA buffer otherwise you'll crash). Have you really seen Linux boot
> with the DIU in either of these modes?
No, but it doesn't mean that it is not possible.
> > But you are right. With this snippet, if the DIU is already
> > disabled, there will be not needed mode register access. So
> > the code should better look like:
> >
> > diu_mode = in_be32(&dr.diu_reg->diu_mode);
> > if (diu_mode && diu_mode != MFB_MODE1)
> > out_be32(&dr.diu_reg->diu_mode, 0);
>
> Ok. I'm planning on cleaning up the driver so that it does not
> initialize the DIU until the .open call, and once that's done,
> I should be able to remove most of the code from your patch.
Will DIU splash screen functionality be preserved?
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 3/5] powerpc/mpc5121: shared DIU framebuffer support
2010-07-23 14:00 ` Anatolij Gustschin
` (4 preceding siblings ...)
(?)
@ 2011-12-16 23:00 ` Timur Tabi
-1 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2011-12-16 23:00 UTC (permalink / raw)
To: linux-fbdev
Anatolij Gustschin wrote:
> Will DIU splash screen functionality be preserved?
That's the idea. The root cause is that the drive initializes the DIU during the probe, which is too early. It shouldn't touch the hardware until the open. At that point, Linux (X, console, whatever) wants to draw something.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v4 4/5] powerpc: doc/dts-bindings: update doc of FSL DIU bindings
2010-07-23 14:00 ` Anatolij Gustschin
@ 2010-07-23 14:00 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Update compatible and interrupt properties description.
Furthermore an example for the MPC5121 has been added.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: devicetree-discuss@lists.ozlabs.org
---
v4:
- added ack tag
v2 and v3:
- no changes since v1
Documentation/powerpc/dts-bindings/fsl/diu.txt | 14 ++++++++++++--
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
index deb35de..326cddf 100644
--- a/Documentation/powerpc/dts-bindings/fsl/diu.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -4,10 +4,12 @@ The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
-- compatible : should be "fsl-diu".
+- compatible : should be "fsl,diu" or "fsl,mpc5121-diu".
- reg : should contain at least address and length of the DIU register
set.
-- Interrupts : one DIU interrupt should be describe here.
+- interrupts : one DIU interrupt should be described here.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
Example (MPC8610HPCD):
display@2c000 {
@@ -16,3 +18,11 @@ Example (MPC8610HPCD):
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};
+
+Example for MPC5121:
+ display@2100 {
+ compatible = "fsl,mpc5121-diu";
+ reg = <0x2100 0x100>;
+ interrupts = <64 0x8>;
+ interrupt-parent = <&ipic>;
+ };
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v4 4/5] powerpc: doc/dts-bindings: update doc of FSL DIU bindings
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Update compatible and interrupt properties description.
Furthermore an example for the MPC5121 has been added.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: devicetree-discuss@lists.ozlabs.org
---
v4:
- added ack tag
v2 and v3:
- no changes since v1
Documentation/powerpc/dts-bindings/fsl/diu.txt | 14 ++++++++++++--
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
index deb35de..326cddf 100644
--- a/Documentation/powerpc/dts-bindings/fsl/diu.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -4,10 +4,12 @@ The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
-- compatible : should be "fsl-diu".
+- compatible : should be "fsl,diu" or "fsl,mpc5121-diu".
- reg : should contain at least address and length of the DIU register
set.
-- Interrupts : one DIU interrupt should be describe here.
+- interrupts : one DIU interrupt should be described here.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
Example (MPC8610HPCD):
display@2c000 {
@@ -16,3 +18,11 @@ Example (MPC8610HPCD):
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};
+
+Example for MPC5121:
+ display@2100 {
+ compatible = "fsl,mpc5121-diu";
+ reg = <0x2100 0x100>;
+ interrupts = <64 0x8>;
+ interrupt-parent = <&ipic>;
+ };
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
2010-07-23 14:00 ` Anatolij Gustschin
@ 2010-07-23 14:00 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Adds support for encoding display mode information
in the device tree using verbatim EDID block.
If the EDID entry in the DIU node is present, the
driver will build mode database using EDID data
and allow setting the display modes from this database.
Otherwise display mode will be set using mode
entries from driver's internal database as usual.
This patch also updates device tree bindings.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: devicetree-discuss@lists.ozlabs.org
---
v4:
- rebased to apply on current tree
- added ack tag
v3:
- no changes
v1 -> v2:
- fix EDID property to be lower-case
- use u8 * type for EDID block pointer
- simplify "info->monspecs.modedb != NULL" condition test
Documentation/powerpc/dts-bindings/fsl/diu.txt | 6 ++
drivers/video/Kconfig | 1 +
drivers/video/fsl-diu-fb.c | 80 ++++++++++++++++++++++--
3 files changed, 81 insertions(+), 6 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
index 326cddf..b66cb6d 100644
--- a/Documentation/powerpc/dts-bindings/fsl/diu.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -11,6 +11,11 @@ Required properties:
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
+Optional properties:
+- edid : verbatim EDID data block describing attached display.
+ Data from the detailed timing descriptor will be used to
+ program the display controller.
+
Example (MPC8610HPCD):
display@2c000 {
compatible = "fsl,diu";
@@ -25,4 +30,5 @@ Example for MPC5121:
reg = <0x2100 0x100>;
interrupts = <64 0x8>;
interrupt-parent = <&ipic>;
+ edid = [edid-data];
};
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index a9f9e5e..c01b648 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1871,6 +1871,7 @@ config FB_MBX_DEBUG
config FB_FSL_DIU
tristate "Freescale DIU framebuffer support"
depends on FB && FSL_SOC
+ select FB_MODE_HELPERS
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index db3e360..e38ad22 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -35,6 +35,7 @@
#include <sysdev/fsl_soc.h>
#include <linux/fsl-diu-fb.h>
+#include "edid.h"
/*
* These parameters give default parameters
@@ -217,6 +218,7 @@ struct mfb_info {
int x_aoi_d; /* aoi display x offset to physical screen */
int y_aoi_d; /* aoi display y offset to physical screen */
struct fsl_diu_data *parent;
+ u8 *edid_data;
};
@@ -1185,18 +1187,30 @@ static int __devinit install_fb(struct fb_info *info)
int rc;
struct mfb_info *mfbi = info->par;
const char *aoi_mode, *init_aoi_mode = "320x240";
+ struct fb_videomode *db = fsl_diu_mode_db;
+ unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
+ int has_default_mode = 1;
if (init_fbinfo(info))
return -EINVAL;
- if (mfbi->index == 0) /* plane 0 */
+ if (mfbi->index == 0) { /* plane 0 */
+ if (mfbi->edid_data) {
+ /* Now build modedb from EDID */
+ fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
+ fb_videomode_to_modelist(info->monspecs.modedb,
+ info->monspecs.modedb_len,
+ &info->modelist);
+ db = info->monspecs.modedb;
+ dbsize = info->monspecs.modedb_len;
+ }
aoi_mode = fb_mode;
- else
+ } else {
aoi_mode = init_aoi_mode;
+ }
pr_debug("mode used = %s\n", aoi_mode);
- rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
- ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp);
-
+ rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize,
+ &fsl_diu_default_mode, default_bpp);
switch (rc) {
case 1:
pr_debug("using mode specified in @mode\n");
@@ -1214,10 +1228,50 @@ static int __devinit install_fb(struct fb_info *info)
default:
pr_debug("rc = %d\n", rc);
pr_debug("failed to find mode\n");
- return -EINVAL;
+ /*
+ * For plane 0 we continue and look into
+ * driver's internal modedb.
+ */
+ if (mfbi->index == 0 && mfbi->edid_data)
+ has_default_mode = 0;
+ else
+ return -EINVAL;
break;
}
+ if (!has_default_mode) {
+ rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
+ ARRAY_SIZE(fsl_diu_mode_db),
+ &fsl_diu_default_mode,
+ default_bpp);
+ if (rc > 0 && rc < 5)
+ has_default_mode = 1;
+ }
+
+ /* Still not found, use preferred mode from database if any */
+ if (!has_default_mode && info->monspecs.modedb) {
+ struct fb_monspecs *specs = &info->monspecs;
+ struct fb_videomode *modedb = &specs->modedb[0];
+
+ /*
+ * Get preferred timing. If not found,
+ * first mode in database will be used.
+ */
+ if (specs->misc & FB_MISC_1ST_DETAIL) {
+ int i;
+
+ for (i = 0; i < specs->modedb_len; i++) {
+ if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
+ modedb = &specs->modedb[i];
+ break;
+ }
+ }
+ }
+
+ info->var.bits_per_pixel = default_bpp;
+ fb_videomode_to_var(&info->var, modedb);
+ }
+
pr_debug("xres_virtual %d\n", info->var.xres_virtual);
pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
@@ -1256,6 +1310,9 @@ static void uninstall_fb(struct fb_info *info)
if (!mfbi->registered)
return;
+ if (mfbi->index == 0)
+ kfree(mfbi->edid_data);
+
unregister_framebuffer(info);
unmap_video_memory(info);
if (&info->cmap)
@@ -1456,6 +1513,17 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
mfbi = machine_data->fsl_diu_info[i]->par;
memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
mfbi->parent = machine_data;
+
+ if (mfbi->index == 0) {
+ const u8 *prop;
+ int len;
+
+ /* Get EDID */
+ prop = of_get_property(np, "edid", &len);
+ if (prop && len == EDID_LENGTH)
+ mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
+ GFP_KERNEL);
+ }
}
ret = of_address_to_resource(np, 0, &res);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread* [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-07-23 14:00 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-07-23 14:00 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, Wolfgang Denk, Detlev Zundel, devicetree-discuss,
Anatolij Gustschin
Adds support for encoding display mode information
in the device tree using verbatim EDID block.
If the EDID entry in the DIU node is present, the
driver will build mode database using EDID data
and allow setting the display modes from this database.
Otherwise display mode will be set using mode
entries from driver's internal database as usual.
This patch also updates device tree bindings.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Cc: devicetree-discuss@lists.ozlabs.org
---
v4:
- rebased to apply on current tree
- added ack tag
v3:
- no changes
v1 -> v2:
- fix EDID property to be lower-case
- use u8 * type for EDID block pointer
- simplify "info->monspecs.modedb != NULL" condition test
Documentation/powerpc/dts-bindings/fsl/diu.txt | 6 ++
drivers/video/Kconfig | 1 +
drivers/video/fsl-diu-fb.c | 80 ++++++++++++++++++++++--
3 files changed, 81 insertions(+), 6 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
index 326cddf..b66cb6d 100644
--- a/Documentation/powerpc/dts-bindings/fsl/diu.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -11,6 +11,11 @@ Required properties:
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
+Optional properties:
+- edid : verbatim EDID data block describing attached display.
+ Data from the detailed timing descriptor will be used to
+ program the display controller.
+
Example (MPC8610HPCD):
display@2c000 {
compatible = "fsl,diu";
@@ -25,4 +30,5 @@ Example for MPC5121:
reg = <0x2100 0x100>;
interrupts = <64 0x8>;
interrupt-parent = <&ipic>;
+ edid = [edid-data];
};
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index a9f9e5e..c01b648 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1871,6 +1871,7 @@ config FB_MBX_DEBUG
config FB_FSL_DIU
tristate "Freescale DIU framebuffer support"
depends on FB && FSL_SOC
+ select FB_MODE_HELPERS
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index db3e360..e38ad22 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -35,6 +35,7 @@
#include <sysdev/fsl_soc.h>
#include <linux/fsl-diu-fb.h>
+#include "edid.h"
/*
* These parameters give default parameters
@@ -217,6 +218,7 @@ struct mfb_info {
int x_aoi_d; /* aoi display x offset to physical screen */
int y_aoi_d; /* aoi display y offset to physical screen */
struct fsl_diu_data *parent;
+ u8 *edid_data;
};
@@ -1185,18 +1187,30 @@ static int __devinit install_fb(struct fb_info *info)
int rc;
struct mfb_info *mfbi = info->par;
const char *aoi_mode, *init_aoi_mode = "320x240";
+ struct fb_videomode *db = fsl_diu_mode_db;
+ unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
+ int has_default_mode = 1;
if (init_fbinfo(info))
return -EINVAL;
- if (mfbi->index = 0) /* plane 0 */
+ if (mfbi->index = 0) { /* plane 0 */
+ if (mfbi->edid_data) {
+ /* Now build modedb from EDID */
+ fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
+ fb_videomode_to_modelist(info->monspecs.modedb,
+ info->monspecs.modedb_len,
+ &info->modelist);
+ db = info->monspecs.modedb;
+ dbsize = info->monspecs.modedb_len;
+ }
aoi_mode = fb_mode;
- else
+ } else {
aoi_mode = init_aoi_mode;
+ }
pr_debug("mode used = %s\n", aoi_mode);
- rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
- ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp);
-
+ rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize,
+ &fsl_diu_default_mode, default_bpp);
switch (rc) {
case 1:
pr_debug("using mode specified in @mode\n");
@@ -1214,10 +1228,50 @@ static int __devinit install_fb(struct fb_info *info)
default:
pr_debug("rc = %d\n", rc);
pr_debug("failed to find mode\n");
- return -EINVAL;
+ /*
+ * For plane 0 we continue and look into
+ * driver's internal modedb.
+ */
+ if (mfbi->index = 0 && mfbi->edid_data)
+ has_default_mode = 0;
+ else
+ return -EINVAL;
break;
}
+ if (!has_default_mode) {
+ rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
+ ARRAY_SIZE(fsl_diu_mode_db),
+ &fsl_diu_default_mode,
+ default_bpp);
+ if (rc > 0 && rc < 5)
+ has_default_mode = 1;
+ }
+
+ /* Still not found, use preferred mode from database if any */
+ if (!has_default_mode && info->monspecs.modedb) {
+ struct fb_monspecs *specs = &info->monspecs;
+ struct fb_videomode *modedb = &specs->modedb[0];
+
+ /*
+ * Get preferred timing. If not found,
+ * first mode in database will be used.
+ */
+ if (specs->misc & FB_MISC_1ST_DETAIL) {
+ int i;
+
+ for (i = 0; i < specs->modedb_len; i++) {
+ if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
+ modedb = &specs->modedb[i];
+ break;
+ }
+ }
+ }
+
+ info->var.bits_per_pixel = default_bpp;
+ fb_videomode_to_var(&info->var, modedb);
+ }
+
pr_debug("xres_virtual %d\n", info->var.xres_virtual);
pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
@@ -1256,6 +1310,9 @@ static void uninstall_fb(struct fb_info *info)
if (!mfbi->registered)
return;
+ if (mfbi->index = 0)
+ kfree(mfbi->edid_data);
+
unregister_framebuffer(info);
unmap_video_memory(info);
if (&info->cmap)
@@ -1456,6 +1513,17 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
mfbi = machine_data->fsl_diu_info[i]->par;
memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
mfbi->parent = machine_data;
+
+ if (mfbi->index = 0) {
+ const u8 *prop;
+ int len;
+
+ /* Get EDID */
+ prop = of_get_property(np, "edid", &len);
+ if (prop && len = EDID_LENGTH)
+ mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
+ GFP_KERNEL);
+ }
}
ret = of_address_to_resource(np, 0, &res);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 42+ messages in thread[parent not found: <1279893639-24333-6-git-send-email-agust-ynQEQJNshbs@public.gmane.org>]
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
[not found] ` <1279893639-24333-6-git-send-email-agust-ynQEQJNshbs@public.gmane.org>
2010-12-16 16:47 ` Timur Tabi
@ 2010-12-16 16:47 ` Timur Tabi
0 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 16:47 UTC (permalink / raw)
To: Anatolij Gustschin
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org> wrote:
> Adds support for encoding display mode information
> in the device tree using verbatim EDID block.
>
> If the EDID entry in the DIU node is present, the
> driver will build mode database using EDID data
> and allow setting the display modes from this database.
> Otherwise display mode will be set using mode
> entries from driver's internal database as usual.
>
> This patch also updates device tree bindings.
>
> Signed-off-by: Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org>
> Acked-by: Timur Tabi <timur-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Anatolij,
I know this patch is old, but I'm now getting back to working on the
DIU driver. One question I have: why are you reading the EDID data
from the device tree? Why not just read it directly from the device
using I2C? Who is supposed to put the EDID data into the device tree
in the first place?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 16:47 ` Timur Tabi
0 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 16:47 UTC (permalink / raw)
To: Anatolij Gustschin; +Cc: linuxppc-dev, linux-fbdev, devicetree-discuss
On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> Adds support for encoding display mode information
> in the device tree using verbatim EDID block.
>
> If the EDID entry in the DIU node is present, the
> driver will build mode database using EDID data
> and allow setting the display modes from this database.
> Otherwise display mode will be set using mode
> entries from driver's internal database as usual.
>
> This patch also updates device tree bindings.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Acked-by: Timur Tabi <timur@freescale.com>
> Cc: devicetree-discuss@lists.ozlabs.org
Anatolij,
I know this patch is old, but I'm now getting back to working on the
DIU driver. One question I have: why are you reading the EDID data
from the device tree? Why not just read it directly from the device
using I2C? Who is supposed to put the EDID data into the device tree
in the first place?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 16:47 ` Timur Tabi
0 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 16:47 UTC (permalink / raw)
To: Anatolij Gustschin
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> Adds support for encoding display mode information
> in the device tree using verbatim EDID block.
>
> If the EDID entry in the DIU node is present, the
> driver will build mode database using EDID data
> and allow setting the display modes from this database.
> Otherwise display mode will be set using mode
> entries from driver's internal database as usual.
>
> This patch also updates device tree bindings.
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Acked-by: Timur Tabi <timur@freescale.com>
> Cc: devicetree-discuss@lists.ozlabs.org
Anatolij,
I know this patch is old, but I'm now getting back to working on the
DIU driver. One question I have: why are you reading the EDID data
from the device tree? Why not just read it directly from the device
using I2C? Who is supposed to put the EDID data into the device tree
in the first place?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
[parent not found: <AANLkTin-TL5_TKnyHYtZdixosfqpkPNoarSTC+K4tTUb-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
[not found] ` <AANLkTin-TL5_TKnyHYtZdixosfqpkPNoarSTC+K4tTUb-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2010-12-16 16:53 ` Grant Likely
@ 2010-12-16 16:53 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 16:53 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Thu, Dec 16, 2010 at 9:47 AM, Timur Tabi <timur-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org> wrote:
>> Adds support for encoding display mode information
>> in the device tree using verbatim EDID block.
>>
>> If the EDID entry in the DIU node is present, the
>> driver will build mode database using EDID data
>> and allow setting the display modes from this database.
>> Otherwise display mode will be set using mode
>> entries from driver's internal database as usual.
>>
>> This patch also updates device tree bindings.
>>
>> Signed-off-by: Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org>
>> Acked-by: Timur Tabi <timur-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>
> Anatolij,
>
> I know this patch is old, but I'm now getting back to working on the
> DIU driver. One question I have: why are you reading the EDID data
> from the device tree? Why not just read it directly from the device
> using I2C? Who is supposed to put the EDID data into the device tree
> in the first place?
This is for devices which don't have an i2c edid channel.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 16:53 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 16:53 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
On Thu, Dec 16, 2010 at 9:47 AM, Timur Tabi <timur@freescale.com> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote=
:
>> Adds support for encoding display mode information
>> in the device tree using verbatim EDID block.
>>
>> If the EDID entry in the DIU node is present, the
>> driver will build mode database using EDID data
>> and allow setting the display modes from this database.
>> Otherwise display mode will be set using mode
>> entries from driver's internal database as usual.
>>
>> This patch also updates device tree bindings.
>>
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>> Acked-by: Timur Tabi <timur@freescale.com>
>> Cc: devicetree-discuss@lists.ozlabs.org
>
> Anatolij,
>
> I know this patch is old, but I'm now getting back to working on the
> DIU driver. =A0One question I have: why are you reading the EDID data
> from the device tree? =A0Why not just read it directly from the device
> using I2C? =A0Who is supposed to put the EDID data into the device tree
> in the first place?
This is for devices which don't have an i2c edid channel.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 16:53 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 16:53 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Thu, Dec 16, 2010 at 9:47 AM, Timur Tabi <timur@freescale.com> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
>> Adds support for encoding display mode information
>> in the device tree using verbatim EDID block.
>>
>> If the EDID entry in the DIU node is present, the
>> driver will build mode database using EDID data
>> and allow setting the display modes from this database.
>> Otherwise display mode will be set using mode
>> entries from driver's internal database as usual.
>>
>> This patch also updates device tree bindings.
>>
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>> Acked-by: Timur Tabi <timur@freescale.com>
>> Cc: devicetree-discuss@lists.ozlabs.org
>
> Anatolij,
>
> I know this patch is old, but I'm now getting back to working on the
> DIU driver. One question I have: why are you reading the EDID data
> from the device tree? Why not just read it directly from the device
> using I2C? Who is supposed to put the EDID data into the device tree
> in the first place?
This is for devices which don't have an i2c edid channel.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
2010-12-16 16:53 ` Grant Likely
@ 2010-12-16 16:55 ` Timur Tabi
-1 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 16:55 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
Grant Likely wrote:
> This is for devices which don't have an i2c edid channel.
So are we expecting board-specific code in U-Boot to add the data to the device
tree?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using
@ 2010-12-16 16:55 ` Timur Tabi
0 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 16:55 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
Grant Likely wrote:
> This is for devices which don't have an i2c edid channel.
So are we expecting board-specific code in U-Boot to add the data to the device
tree?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
[parent not found: <4D0A446E.5020600-KZfg59tc24xl57MIdRCFDg@public.gmane.org>]
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
[not found] ` <4D0A446E.5020600-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2010-12-16 17:06 ` Grant Likely
@ 2010-12-16 17:06 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:06 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Thu, Dec 16, 2010 at 9:55 AM, Timur Tabi <timur-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> Grant Likely wrote:
>> This is for devices which don't have an i2c edid channel.
>
> So are we expecting board-specific code in U-Boot to add the data to the device
> tree?
No. It is a static property of the board/machine. It is expected it
to be encoded into the board's .dts file.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 17:06 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:06 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
On Thu, Dec 16, 2010 at 9:55 AM, Timur Tabi <timur@freescale.com> wrote:
> Grant Likely wrote:
>> This is for devices which don't have an i2c edid channel.
>
> So are we expecting board-specific code in U-Boot to add the data to the device
> tree?
No. It is a static property of the board/machine. It is expected it
to be encoded into the board's .dts file.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 17:06 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:06 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
On Thu, Dec 16, 2010 at 9:55 AM, Timur Tabi <timur@freescale.com> wrote:
> Grant Likely wrote:
>> This is for devices which don't have an i2c edid channel.
>
> So are we expecting board-specific code in U-Boot to add the data to the device
> tree?
No. It is a static property of the board/machine. It is expected it
to be encoded into the board's .dts file.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
2010-12-16 17:06 ` Grant Likely
@ 2010-12-16 17:28 ` Timur Tabi
-1 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 17:28 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
Grant Likely wrote:
> No. It is a static property of the board/machine. It is expected it
> to be encoded into the board's .dts file.
Ok, but that only makes sense if the monitor is hard-wired to the board itself.
If a user can attach any monitor he wants, then the EDID data can't be known at
compile time.
I guess it's no different than using hard-coded memory controller programming
instead of SPD. You can safely avoid SPD only if the DDR chips are soldered on
the board.
It looks like I need to add board-specific EDID reading to the DIU driver.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using
@ 2010-12-16 17:28 ` Timur Tabi
0 siblings, 0 replies; 42+ messages in thread
From: Timur Tabi @ 2010-12-16 17:28 UTC (permalink / raw)
To: Grant Likely
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
Grant Likely wrote:
> No. It is a static property of the board/machine. It is expected it
> to be encoded into the board's .dts file.
Ok, but that only makes sense if the monitor is hard-wired to the board itself.
If a user can attach any monitor he wants, then the EDID data can't be known at
compile time.
I guess it's no different than using hard-coded memory controller programming
instead of SPD. You can safely avoid SPD only if the DDR chips are soldered on
the board.
It looks like I need to add board-specific EDID reading to the DIU driver.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
2010-12-16 17:28 ` [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using Timur Tabi
(?)
@ 2010-12-16 17:42 ` Grant Likely
-1 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:42 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
On Thu, Dec 16, 2010 at 10:28 AM, Timur Tabi <timur@freescale.com> wrote:
> Grant Likely wrote:
>> No. It is a static property of the board/machine. It is expected it
>> to be encoded into the board's .dts file.
>
> Ok, but that only makes sense if the monitor is hard-wired to the board itself.
> If a user can attach any monitor he wants, then the EDID data can't be known at
> compile time.
>
> I guess it's no different than using hard-coded memory controller programming
> instead of SPD. You can safely avoid SPD only if the DDR chips are soldered on
> the board.
Correct, if a real EDID i2c channel exists, then an edid property
should *not* be specified in the device tree.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 17:42 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:42 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
On Thu, Dec 16, 2010 at 10:28 AM, Timur Tabi <timur@freescale.com> wrote:
> Grant Likely wrote:
>> No. =A0It is a static property of the board/machine. =A0It is expected i=
t
>> to be encoded into the board's .dts file.
>
> Ok, but that only makes sense if the monitor is hard-wired to the board i=
tself.
> =A0If a user can attach any monitor he wants, then the EDID data can't be=
known at
> compile time.
>
> I guess it's no different than using hard-coded memory controller program=
ming
> instead of SPD. =A0You can safely avoid SPD only if the DDR chips are sol=
dered on
> the board.
Correct, if a real EDID i2c channel exists, then an edid property
should *not* be specified in the device tree.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
@ 2010-12-16 17:42 ` Grant Likely
0 siblings, 0 replies; 42+ messages in thread
From: Grant Likely @ 2010-12-16 17:42 UTC (permalink / raw)
To: Timur Tabi
Cc: linuxppc-dev, linux-fbdev, Anatolij Gustschin, devicetree-discuss
On Thu, Dec 16, 2010 at 10:28 AM, Timur Tabi <timur@freescale.com> wrote:
> Grant Likely wrote:
>> No. It is a static property of the board/machine. It is expected it
>> to be encoded into the board's .dts file.
>
> Ok, but that only makes sense if the monitor is hard-wired to the board itself.
> If a user can attach any monitor he wants, then the EDID data can't be known at
> compile time.
>
> I guess it's no different than using hard-coded memory controller programming
> instead of SPD. You can safely avoid SPD only if the DDR chips are soldered on
> the board.
Correct, if a real EDID i2c channel exists, then an edid property
should *not* be specified in the device tree.
g.
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using EDID
2010-12-16 16:47 ` Timur Tabi
@ 2010-12-16 17:42 ` Anatolij Gustschin
-1 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-12-16 17:42 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, linux-fbdev, devicetree-discuss
On Thu, 16 Dec 2010 10:47:53 -0600
Timur Tabi <timur@freescale.com> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> > Adds support for encoding display mode information
> > in the device tree using verbatim EDID block.
> >
> > If the EDID entry in the DIU node is present, the
> > driver will build mode database using EDID data
> > and allow setting the display modes from this database.
> > Otherwise display mode will be set using mode
> > entries from driver's internal database as usual.
> >
> > This patch also updates device tree bindings.
> >
> > Signed-off-by: Anatolij Gustschin <agust@denx.de>
> > Acked-by: Timur Tabi <timur@freescale.com>
> > Cc: devicetree-discuss@lists.ozlabs.org
>
> Anatolij,
>
> I know this patch is old, but I'm now getting back to working on the
> DIU driver. One question I have: why are you reading the EDID data
> from the device tree? Why not just read it directly from the device
> using I2C? Who is supposed to put the EDID data into the device tree
> in the first place?
Many embedded boards only hard-wire a panel which does not provide
an i2c edid channel. For such boards the EDID data can be inserted
by the bootloader or encoded in the board's .dts. Look at pdm360ng
U-Boot board code, it inserts the EDID data into device tree using
fdt_add_edid().
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v4 5/5] fsl-diu-fb: Support setting display mode using
@ 2010-12-16 17:42 ` Anatolij Gustschin
0 siblings, 0 replies; 42+ messages in thread
From: Anatolij Gustschin @ 2010-12-16 17:42 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, linux-fbdev, devicetree-discuss
On Thu, 16 Dec 2010 10:47:53 -0600
Timur Tabi <timur@freescale.com> wrote:
> On Fri, Jul 23, 2010 at 9:00 AM, Anatolij Gustschin <agust@denx.de> wrote:
> > Adds support for encoding display mode information
> > in the device tree using verbatim EDID block.
> >
> > If the EDID entry in the DIU node is present, the
> > driver will build mode database using EDID data
> > and allow setting the display modes from this database.
> > Otherwise display mode will be set using mode
> > entries from driver's internal database as usual.
> >
> > This patch also updates device tree bindings.
> >
> > Signed-off-by: Anatolij Gustschin <agust@denx.de>
> > Acked-by: Timur Tabi <timur@freescale.com>
> > Cc: devicetree-discuss@lists.ozlabs.org
>
> Anatolij,
>
> I know this patch is old, but I'm now getting back to working on the
> DIU driver. One question I have: why are you reading the EDID data
> from the device tree? Why not just read it directly from the device
> using I2C? Who is supposed to put the EDID data into the device tree
> in the first place?
Many embedded boards only hard-wire a panel which does not provide
an i2c edid channel. For such boards the EDID data can be inserted
by the bootloader or encoded in the board's .dts. Look at pdm360ng
U-Boot board code, it inserts the EDID data into device tree using
fdt_add_edid().
Anatolij
^ permalink raw reply [flat|nested] 42+ messages in thread