From: Devarsh Thakkar <devarsht@ti.com> To: Sebastian Fricke <sebastian.fricke@collabora.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, NXP Linux Team <linux-imx@nxp.com>, Conor Dooley <conor+dt@kernel.org>, Mauro Carvalho Chehab <mchehab@kernel.org>, Jackson Lee <jackson.lee@chipsnmedia.com>, Hans Verkuil <hverkuil@xs4all.nl>, Sascha Hauer <s.hauer@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Pengutronix Kernel Team <kernel@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Nas Chung <nas.chung@chipsnmedia.com>, Fabio Estevam <festevam@gmail.com> Cc: <linux-media@vger.kernel.org>, Tomasz Figa <tfiga@chromium.org>, <linux-kernel@vger.kernel.org>, Nicolas Dufresne <nicolas.dufresne@collabora.com>, <kernel@collabora.com>, Robert Beckett <bob.beckett@collabora.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Darren Etheridge <detheridge@ti.com>, "Bajjuri, Praneeth" <praneeth@ti.com>, "Raghavendra, Vignesh" <vigneshr@ti.com>, "Bhatia, Aradhya" <a-bhatia1@ti.com>, "Luthra, Jai" <j-luthra@ti.com>, "Bajjuri, Praneeth" <praneeth@ti.com>, "Brnich, Brandon" <b-brnich@ti.com>, "Pothukuchi, Vijay" <vijayp@ti.com> Subject: Re: [PATCH v13 6/8] media: dt-bindings: wave5: add Chips&Media 521c codec IP support Date: Tue, 17 Oct 2023 19:09:15 +0530 [thread overview] Message-ID: <4c557cbd-33e9-a0df-3431-04ade12b6f07@ti.com> (raw) In-Reply-To: <20230929-wave5_v13_media_master-v13-6-5ac60ccbf2ce@collabora.com> Hi Sebastian, Krzysztof, Rob, On 12/10/23 16:31, Sebastian Fricke wrote: > From: Robert Beckett <bob.beckett@collabora.com> > > Add bindings for the chips&media wave5 codec driver > > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> > Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> > --- > .../devicetree/bindings/media/cnm,wave5.yaml | 60 ++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/cnm,wave5.yaml b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > new file mode 100644 > index 000000000000..b31d34aec05b > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/cnm,wave5.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Chips&Media Wave 5 Series multi-standard codec IP > + > +maintainers: > + - Nas Chung <nas.chung@chipsnmedia.com> > + - Jackson Lee <jackson.lee@chipsnmedia.com> > + > +description: > + The Chips&Media WAVE codec IP is a multi format video encoder/decoder > + > +properties: > + compatible: > + enum: > + - cnm,cm521c-vpu > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: VCODEC clock > + > + interrupts: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + sram: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + The VPU uses the SRAM to store some of the reference data instead of > + storing it on DMA memory. It is mainly used for the purpose of reducing > + bandwidth. > + > +required: > + - compatible > + - reg > + - clocks > + - interrupts > + Is it possible to keep interrupts property as optional given HW can still work without it if SW does polling of ISR using registers? The reason to ask is in TI AM62A SoC (which also uses this codec) there is an SoC errata of missing interrupt line to A53 and we are using SW based polling locally to run the driver. We were planning to upstream that SW based polling support patch in CnM driver once this base initial driver patch series gets merged, but just wanted to check if upfront it is possible to have interrupts property as optional so that we don't have to change the binding doc again to make it optional later on. Also note that the polling patch won't be specific to AM62A, other SoC's too which use this wave5 hardware if they want can enable polling by choice (by removing interrupt property) Could you please share your opinion on this ? Regards Devarsh > +additionalProperties: false > + > +examples: > + - | > + vpu: video-codec@12345678 { > + compatible = "cnm,cm521c-vpu"; > + reg = <0x12345678 0x1000>; > + clocks = <&clks 42>; > + interrupts = <42>; > + sram = <&sram>; > + }; >
WARNING: multiple messages have this Message-ID (diff)
From: Devarsh Thakkar <devarsht@ti.com> To: Sebastian Fricke <sebastian.fricke@collabora.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, NXP Linux Team <linux-imx@nxp.com>, Conor Dooley <conor+dt@kernel.org>, Mauro Carvalho Chehab <mchehab@kernel.org>, Jackson Lee <jackson.lee@chipsnmedia.com>, Hans Verkuil <hverkuil@xs4all.nl>, Sascha Hauer <s.hauer@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Pengutronix Kernel Team <kernel@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Nas Chung <nas.chung@chipsnmedia.com>, Fabio Estevam <festevam@gmail.com> Cc: <linux-media@vger.kernel.org>, Tomasz Figa <tfiga@chromium.org>, <linux-kernel@vger.kernel.org>, Nicolas Dufresne <nicolas.dufresne@collabora.com>, <kernel@collabora.com>, Robert Beckett <bob.beckett@collabora.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Darren Etheridge <detheridge@ti.com>, "Bajjuri, Praneeth" <praneeth@ti.com>, "Raghavendra, Vignesh" <vigneshr@ti.com>, "Bhatia, Aradhya" <a-bhatia1@ti.com>, "Luthra, Jai" <j-luthra@ti.com>, "Bajjuri, Praneeth" <praneeth@ti.com>, "Brnich, Brandon" <b-brnich@ti.com>, "Pothukuchi, Vijay" <vijayp@ti.com> Subject: Re: [PATCH v13 6/8] media: dt-bindings: wave5: add Chips&Media 521c codec IP support Date: Tue, 17 Oct 2023 19:09:15 +0530 [thread overview] Message-ID: <4c557cbd-33e9-a0df-3431-04ade12b6f07@ti.com> (raw) In-Reply-To: <20230929-wave5_v13_media_master-v13-6-5ac60ccbf2ce@collabora.com> Hi Sebastian, Krzysztof, Rob, On 12/10/23 16:31, Sebastian Fricke wrote: > From: Robert Beckett <bob.beckett@collabora.com> > > Add bindings for the chips&media wave5 codec driver > > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> > Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> > --- > .../devicetree/bindings/media/cnm,wave5.yaml | 60 ++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/cnm,wave5.yaml b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > new file mode 100644 > index 000000000000..b31d34aec05b > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/cnm,wave5.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Chips&Media Wave 5 Series multi-standard codec IP > + > +maintainers: > + - Nas Chung <nas.chung@chipsnmedia.com> > + - Jackson Lee <jackson.lee@chipsnmedia.com> > + > +description: > + The Chips&Media WAVE codec IP is a multi format video encoder/decoder > + > +properties: > + compatible: > + enum: > + - cnm,cm521c-vpu > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: VCODEC clock > + > + interrupts: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + sram: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + The VPU uses the SRAM to store some of the reference data instead of > + storing it on DMA memory. It is mainly used for the purpose of reducing > + bandwidth. > + > +required: > + - compatible > + - reg > + - clocks > + - interrupts > + Is it possible to keep interrupts property as optional given HW can still work without it if SW does polling of ISR using registers? The reason to ask is in TI AM62A SoC (which also uses this codec) there is an SoC errata of missing interrupt line to A53 and we are using SW based polling locally to run the driver. We were planning to upstream that SW based polling support patch in CnM driver once this base initial driver patch series gets merged, but just wanted to check if upfront it is possible to have interrupts property as optional so that we don't have to change the binding doc again to make it optional later on. Also note that the polling patch won't be specific to AM62A, other SoC's too which use this wave5 hardware if they want can enable polling by choice (by removing interrupt property) Could you please share your opinion on this ? Regards Devarsh > +additionalProperties: false > + > +examples: > + - | > + vpu: video-codec@12345678 { > + compatible = "cnm,cm521c-vpu"; > + reg = <0x12345678 0x1000>; > + clocks = <&clks 42>; > + interrupts = <42>; > + sram = <&sram>; > + }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-17 13:39 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-10-12 11:00 [PATCH v13 0/8] Wave5 codec driver Sebastian Fricke 2023-10-12 11:00 ` Sebastian Fricke 2023-10-12 11:00 ` [PATCH v13 1/8] media: v4l2: Add ignore_cap_streaming flag Sebastian Fricke 2023-10-12 11:00 ` Sebastian Fricke 2023-10-12 11:01 ` [PATCH v13 2/8] media: v4l2: Allow M2M job queuing w/o streaming CAP queue Sebastian Fricke 2023-10-12 11:01 ` Sebastian Fricke 2023-10-12 11:01 ` [PATCH v13 3/8] media: platform: chips-media: Move Coda to separate folder Sebastian Fricke 2023-10-12 11:01 ` Sebastian Fricke 2023-10-12 11:01 ` [PATCH v13 4/8] media: chips-media: wave5: Add vpuapi layer Sebastian Fricke 2023-10-22 16:27 ` Christophe JAILLET 2023-10-22 16:27 ` Christophe JAILLET 2023-10-12 11:01 ` [PATCH v13 5/8] media: chips-media: wave5: Add the v4l2 layer Sebastian Fricke 2023-10-16 11:57 ` Hans Verkuil 2023-10-16 11:57 ` Hans Verkuil 2023-10-16 13:35 ` Sebastian Fricke 2023-10-16 13:35 ` Sebastian Fricke 2023-10-16 13:39 ` Hans Verkuil 2023-10-16 13:39 ` Hans Verkuil 2023-10-17 22:13 ` Ivan Bornyakov 2023-10-17 22:13 ` Ivan Bornyakov 2023-11-02 17:07 ` Deborah Brouwer 2023-11-02 17:07 ` Deborah Brouwer 2023-11-03 10:42 ` Ivan Bornyakov 2023-11-03 10:42 ` Ivan Bornyakov 2023-10-12 11:01 ` [PATCH v13 6/8] media: dt-bindings: wave5: add Chips&Media 521c codec IP support Sebastian Fricke 2023-10-12 11:01 ` Sebastian Fricke 2023-10-12 13:24 ` Krzysztof Kozlowski 2023-10-12 13:24 ` Krzysztof Kozlowski 2023-10-16 13:47 ` Rob Herring 2023-10-16 13:47 ` Rob Herring 2023-10-21 12:05 ` Sebastian Fricke 2023-10-21 12:05 ` Sebastian Fricke 2023-10-22 16:01 ` Krzysztof Kozlowski 2023-10-22 16:01 ` Krzysztof Kozlowski 2023-10-24 5:17 ` Sebastian Fricke 2023-10-24 5:17 ` Sebastian Fricke 2023-10-24 7:24 ` Krzysztof Kozlowski 2023-10-24 7:24 ` Krzysztof Kozlowski 2023-10-25 6:17 ` Sebastian Fricke 2023-10-25 6:17 ` Sebastian Fricke 2023-10-25 7:04 ` Krzysztof Kozlowski 2023-10-25 7:04 ` Krzysztof Kozlowski 2023-10-17 13:39 ` Devarsh Thakkar [this message] 2023-10-17 13:39 ` Devarsh Thakkar 2023-10-21 11:53 ` Sebastian Fricke 2023-10-21 11:53 ` Sebastian Fricke 2023-10-22 16:12 ` Krzysztof Kozlowski 2023-10-22 16:12 ` Krzysztof Kozlowski 2023-10-26 16:33 ` Sebastian Fricke 2023-10-26 16:33 ` Sebastian Fricke 2023-10-27 7:07 ` Krzysztof Kozlowski 2023-10-27 7:07 ` Krzysztof Kozlowski 2023-10-12 11:01 ` [PATCH v13 7/8] media: chips-media: wave5: Add wave5 driver to maintainers file Sebastian Fricke 2023-10-12 11:01 ` Sebastian Fricke 2023-10-12 11:01 ` [PATCH v13 8/8] arm64: dts: ti: k3-j721s2-main: add wave5 video encoder/decoder node Sebastian Fricke 2023-10-12 11:01 ` Sebastian Fricke
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