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From: Michal Simek <michal.simek@xilinx.com>
To: Shubhrajyoti Datta <shubhrajyoti.datta@gmail.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Shubhrajyoti Datta <shubhraj@xilinx.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	Srinivas Goud <sgoud@xilinx.com>
Subject: Re: [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart'
Date: Thu, 14 Jul 2022 12:55:21 +0200	[thread overview]
Message-ID: <50bfd52b-6fe0-546f-9121-0145aac91289@xilinx.com> (raw)
In-Reply-To: <CAKfKVtGrdh-iQP7YKUBe37HVeZcU-UV3A3BHKjcnggBFR94eNA@mail.gmail.com>

Hi Rob and Krzysztof,

On 6/14/22 14:21, Shubhrajyoti Datta wrote:
>>>
>   <snip>
> 
>>
>> No, I don't know what the differences are in your h/w. You have ID
>> registers, but changed the IP and didn't change the ID registers? How
>> has the IP changed?
>>
> 
> The IP is not changed and the ID registers are not updated.
> The limitation is coming from the AXI  port that the IP is connected to.
> The axi port is allowing only the 32 bit access.
> The same information will be updated in the Versal TRM.

Can you please give us your recommendation how to process with this?

Thanks,
Michal


  reply	other threads:[~2022-07-14 10:55 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-16 11:17 [PATCH 0/2] serial: pl011: Add xilinx uart Shubhrajyoti Datta
2021-11-16 11:17 ` [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart' Shubhrajyoti Datta
2021-11-29 22:08   ` Rob Herring
2021-12-10 13:41     ` Shubhrajyoti Datta
2022-02-14  6:49       ` Shubhrajyoti Datta
2022-03-22 10:59         ` Shubhrajyoti Datta
2022-03-28 13:26           ` Rob Herring
2022-06-14 12:21             ` Shubhrajyoti Datta
2022-07-14 10:55               ` Michal Simek [this message]
2022-07-14 11:59                 ` Krzysztof Kozlowski
2022-07-14 12:14                   ` Datta, Shubhrajyoti
2022-07-20 13:41                     ` Michal Simek
2021-11-16 11:17 ` [PATCH 2/2] serial: pl011: Add support for Xilinx Uart Shubhrajyoti Datta

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