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From: Rob Herring <robh@kernel.org>
To: Shubhrajyoti Datta <shubhraj@xilinx.com>
Cc: "linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	Raviteja Narayanam <rna@xlnx.xilinx.com>,
	Srinivas Goud <sgoud@xilinx.com>
Subject: Re: [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart'
Date: Mon, 28 Mar 2022 08:26:33 -0500	[thread overview]
Message-ID: <CAL_JsqLV3De0O2WDq=w_CQbvAiJVvQ-=V9XuC1tJyZNLyneDZw@mail.gmail.com> (raw)
In-Reply-To: <DM6PR02MB66352597DBF172ACC5307274AA179@DM6PR02MB6635.namprd02.prod.outlook.com>

On Tue, Mar 22, 2022 at 5:59 AM Shubhrajyoti Datta <shubhraj@xilinx.com> wrote:
>
> <snip>
> > > > > diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml
> > > > > b/Documentation/devicetree/bindings/serial/pl011.yaml
> > > > > index 5ea00f8a283d..6c73923dd15e 100644
> > > > > --- a/Documentation/devicetree/bindings/serial/pl011.yaml
> > > > > +++ b/Documentation/devicetree/bindings/serial/pl011.yaml
> > > > > @@ -24,9 +24,13 @@ select:
> > > > >
> > > > >  properties:
> > > > >    compatible:
> > > > > -    items:
> > > > > -      - const: arm,pl011
> > > > > -      - const: arm,primecell
> > > > > +    oneOf:
> > > > > +      - items:
> > > > > +          - const: arm,pl011
> > > > > +          - const: arm,primecell
> > > > > +      - items:
> > > > > +          - const: arm,pl011
> > > > > +          - const: arm,xlnx-uart # xilinx uart as platform device
> > > >
> > > > 'arm,primecell' means the block has ID registers. Are you saying
> > > > this implementation doesn't?
> > >
> > > The ID registers do not have any Xilinx specific identifiers.
> > > However there are differences  like 32-bit access.
> >
> > Hope that the current approach is fine with you.
>
> Could you please guide  how to go about it.

No, I don't know what the differences are in your h/w. You have ID
registers, but changed the IP and didn't change the ID registers? How
has the IP changed?

Rob

  reply	other threads:[~2022-03-28 13:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-16 11:17 [PATCH 0/2] serial: pl011: Add xilinx uart Shubhrajyoti Datta
2021-11-16 11:17 ` [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart' Shubhrajyoti Datta
2021-11-29 22:08   ` Rob Herring
2021-12-10 13:41     ` Shubhrajyoti Datta
2022-02-14  6:49       ` Shubhrajyoti Datta
2022-03-22 10:59         ` Shubhrajyoti Datta
2022-03-28 13:26           ` Rob Herring [this message]
2022-06-14 12:21             ` Shubhrajyoti Datta
2022-07-14 10:55               ` Michal Simek
2022-07-14 11:59                 ` Krzysztof Kozlowski
2022-07-14 12:14                   ` Datta, Shubhrajyoti
2022-07-20 13:41                     ` Michal Simek
2021-11-16 11:17 ` [PATCH 2/2] serial: pl011: Add support for Xilinx Uart Shubhrajyoti Datta

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