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From: Shubhrajyoti Datta <shubhraj@xilinx.com>
To: Rob Herring <robh@kernel.org>
Cc: "linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	Raviteja Narayanam <rna@xlnx.xilinx.com>,
	Srinivas Goud <sgoud@xilinx.com>
Subject: RE: [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart'
Date: Mon, 14 Feb 2022 06:49:25 +0000	[thread overview]
Message-ID: <MN2PR02MB6640017950EFB0FD21D2AD91AA339@MN2PR02MB6640.namprd02.prod.outlook.com> (raw)
In-Reply-To: <DM6PR02MB663589B3489C53A34DC25A31AA719@DM6PR02MB6635.namprd02.prod.outlook.com>



> -----Original Message-----
> From: Shubhrajyoti Datta
> Sent: Friday, December 10, 2021 7:12 PM
> To: Rob Herring <robh@kernel.org>
> Cc: linux-serial@vger.kernel.org; devicetree@vger.kernel.org;
> gregkh@linuxfoundation.org; Raviteja Narayanam <rna@xlnx.xilinx.com>
> Subject: RE: [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart'
> 
> 
> 
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Tuesday, November 30, 2021 3:39 AM
> > To: Shubhrajyoti Datta <shubhraj@xilinx.com>
> > Cc: linux-serial@vger.kernel.org; devicetree@vger.kernel.org;
> > gregkh@linuxfoundation.org; Raviteja Narayanam <rna@xlnx.xilinx.com>
> > Subject: Re: [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart'
> >
> > On Tue, Nov 16, 2021 at 04:47:45PM +0530, Shubhrajyoti Datta wrote:
> > > Add support for Uart used in Xilinx Versal SOCs as a platform device.
> >
> > No. Why would we want to do that?
> Apologies did not understand that.
> 
> >
> > >
> > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > > Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
> > > ---
> > >  Documentation/devicetree/bindings/serial/pl011.yaml | 10 +++++++---
> > >  1 file changed, 7 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml
> > > b/Documentation/devicetree/bindings/serial/pl011.yaml
> > > index 5ea00f8a283d..6c73923dd15e 100644
> > > --- a/Documentation/devicetree/bindings/serial/pl011.yaml
> > > +++ b/Documentation/devicetree/bindings/serial/pl011.yaml
> > > @@ -24,9 +24,13 @@ select:
> > >
> > >  properties:
> > >    compatible:
> > > -    items:
> > > -      - const: arm,pl011
> > > -      - const: arm,primecell
> > > +    oneOf:
> > > +      - items:
> > > +          - const: arm,pl011
> > > +          - const: arm,primecell
> > > +      - items:
> > > +          - const: arm,pl011
> > > +          - const: arm,xlnx-uart # xilinx uart as platform device
> >
> > 'arm,primecell' means the block has ID registers. Are you saying this
> > implementation doesn't?
> 
> The ID registers do not have any Xilinx specific identifiers.
> However there are differences  like 32-bit access.

Hope that the current approach is fine with you.

Thanks 
> >
> > >
> > >    reg:
> > >      maxItems: 1
> > > --
> > > 2.25.1
> > >
> > >

  reply	other threads:[~2022-02-14  6:49 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-16 11:17 [PATCH 0/2] serial: pl011: Add xilinx uart Shubhrajyoti Datta
2021-11-16 11:17 ` [PATCH 1/2] dt-bindings: serial: pl011: Add 'arm,xlnx-uart' Shubhrajyoti Datta
2021-11-29 22:08   ` Rob Herring
2021-12-10 13:41     ` Shubhrajyoti Datta
2022-02-14  6:49       ` Shubhrajyoti Datta [this message]
2022-03-22 10:59         ` Shubhrajyoti Datta
2022-03-28 13:26           ` Rob Herring
2022-06-14 12:21             ` Shubhrajyoti Datta
2022-07-14 10:55               ` Michal Simek
2022-07-14 11:59                 ` Krzysztof Kozlowski
2022-07-14 12:14                   ` Datta, Shubhrajyoti
2022-07-20 13:41                     ` Michal Simek
2021-11-16 11:17 ` [PATCH 2/2] serial: pl011: Add support for Xilinx Uart Shubhrajyoti Datta

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