* [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:46 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 02/11] ARM: dts: imx6qdl-sabrelite: Add uart1 support Troy Kisky
` (9 subsequent siblings)
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
This makes the structure of Sabre Lite board files the same
as Sabre SD board files so that they are easier to compare.
By this, I mean that the majority of the file imx6q-sabrelite.dts
is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
and imx6dl-sabrelite.dts can include it.
Now Sabre Lite has support for Dual Lite/Solo
processors.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-sabrelite.dts | 20 ++
arch/arm/boot/dts/imx6q-sabrelite.dts | 214 +--------------------
...{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi} | 10 -
4 files changed, 22 insertions(+), 223 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-sabrelite.dts
copy arch/arm/boot/dts/{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi} (96%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 342d16d..3c6f456 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -149,6 +149,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
imx6dl-sabreauto.dtb \
+ imx6dl-sabrelite.dtb \
imx6dl-sabresd.dtb \
imx6dl-wandboard.dtb \
imx6q-arm2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts b/arch/arm/boot/dts/imx6dl-sabrelite.dts
new file mode 100644
index 0000000..2de0447
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-sabrelite.dtsi"
+
+/ {
+ model = "Freescale i.MX6 DualLite SABRE Lite Board";
+ compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index fca8f220..96e4688 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -12,225 +12,13 @@
/dts-v1/;
#include "imx6q.dtsi"
+#include "imx6qdl-sabrelite.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Lite Board";
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
-
- memory {
- reg = <0x10000000 0x40000000>;
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg_2p5v: regulator at 0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "2P5V";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- regulator-always-on;
- };
-
- reg_3p3v: regulator at 1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- reg_usb_otg_vbus: regulator at 2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio3 22 0>;
- enable-active-high;
- };
- };
-
- sound {
- compatible = "fsl,imx6q-sabrelite-sgtl5000",
- "fsl,imx-audio-sgtl5000";
- model = "imx6q-sabrelite-sgtl5000";
- ssi-controller = <&ssi1>;
- audio-codec = <&codec>;
- audio-routing =
- "MIC_IN", "Mic Jack",
- "Mic Jack", "Mic Bias",
- "Headphone Jack", "HP_OUT";
- mux-int-port = <1>;
- mux-ext-port = <4>;
- };
-};
-
-&audmux {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_audmux>;
- status = "okay";
-};
-
-&ecspi1 {
- fsl,spi-num-chipselects = <1>;
- cs-gpios = <&gpio3 19 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
-
- flash: m25p80 at 0 {
- compatible = "sst,sst25vf016b";
- spi-max-frequency = <20000000>;
- reg = <0>;
- };
-};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio3 23 0>;
- status = "okay";
-};
-
-&i2c1 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- codec: sgtl5000 at 0a {
- compatible = "fsl,sgtl5000";
- reg = <0x0a>;
- clocks = <&clks 201>;
- VDDA-supply = <®_2p5v>;
- VDDIO-supply = <®_3p3v>;
- };
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog>;
-
- imx6q-sabrelite {
- pinctrl_hog: hoggrp {
- fsl,pins = <
- MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
- MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
- >;
- };
-
- pinctrl_audmux: audmuxgrp {
- fsl,pins = <MX6QDL_AUDMUX_PINGRP1>;
- };
-
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <MX6QDL_ECSPI1_PINGRP1>;
- };
-
- pinctrl_enet: enetgrp {
- fsl,pins = <MX6QDL_ENET_PINGRP1>;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <MX6QDL_I2C1_PINGRP1>;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <MX6QDL_UART2_PINGRP1>;
- };
-
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <MX6QDL_USBOTG_PINGRP1>;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <MX6QDL_USDHC3_PINGRP_D4>;
- };
-
- pinctrl_usdhc4: usdhc4grp {
- fsl,pins = <MX6QDL_USDHC4_PINGRP_D4>;
- };
- };
-};
-
-&ldb {
- status = "okay";
-
- lvds-channel at 0 {
- fsl,data-mapping = "spwg";
- fsl,data-width = <18>;
- status = "okay";
-
- display-timings {
- native-mode = <&timing0>;
- timing0: hsd100pxn1 {
- clock-frequency = <65000000>;
- hactive = <1024>;
- vactive = <768>;
- hback-porch = <220>;
- hfront-porch = <40>;
- vback-porch = <21>;
- vfront-porch = <7>;
- hsync-len = <60>;
- vsync-len = <10>;
- };
- };
- };
};
&sata {
status = "okay";
};
-
-&ssi1 {
- fsl,mode = "i2s-slave";
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- status = "okay";
-};
-
-&usbh1 {
- status = "okay";
-};
-
-&usbotg {
- vbus-supply = <®_usb_otg_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- status = "okay";
-};
-
-&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- cd-gpios = <&gpio7 0 0>;
- wp-gpios = <&gpio7 1 0>;
- vmmc-supply = <®_3p3v>;
- status = "okay";
-};
-
-&usdhc4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc4>;
- cd-gpios = <&gpio2 6 0>;
- wp-gpios = <&gpio2 7 0>;
- vmmc-supply = <®_3p3v>;
- status = "okay";
-};
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
similarity index 96%
copy from arch/arm/boot/dts/imx6q-sabrelite.dts
copy to arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index fca8f220..d7522c9 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -10,13 +10,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-/dts-v1/;
-#include "imx6q.dtsi"
-
/ {
- model = "Freescale i.MX6 Quad SABRE Lite Board";
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
-
memory {
reg = <0x10000000 0x40000000>;
};
@@ -190,10 +184,6 @@
};
};
-&sata {
- status = "okay";
-};
-
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support
2013-12-13 1:49 ` [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support Troy Kisky
@ 2013-12-13 11:46 ` Marek Vasut
2013-12-13 18:51 ` Troy Kisky
0 siblings, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:46 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:05 AM, Troy Kisky wrote:
> This makes the structure of Sabre Lite board files the same
> as Sabre SD board files so that they are easier to compare.
>
> By this, I mean that the majority of the file imx6q-sabrelite.dts
> is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
> and imx6dl-sabrelite.dts can include it.
>
> Now Sabre Lite has support for Dual Lite/Solo
> processors.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6dl-sabrelite.dts | 20 ++
> arch/arm/boot/dts/imx6q-sabrelite.dts | 214
> +-------------------- ...{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi} |
> 10 -
> 4 files changed, 22 insertions(+), 223 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6dl-sabrelite.dts
> copy arch/arm/boot/dts/{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi}
> (96%)
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 342d16d..3c6f456 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -149,6 +149,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> imx6dl-gw53xx.dtb \
> imx6dl-gw54xx.dtb \
> imx6dl-sabreauto.dtb \
> + imx6dl-sabrelite.dtb \
> imx6dl-sabresd.dtb \
> imx6dl-wandboard.dtb \
> imx6q-arm2.dtb \
> diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts
> b/arch/arm/boot/dts/imx6dl-sabrelite.dts new file mode 100644
> index 0000000..2de0447
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright 2011 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
Are you sure about this copyright message ? Isn't this copyright BD ?
Otherwise,
Reviewed-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread* [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support
2013-12-13 11:46 ` Marek Vasut
@ 2013-12-13 18:51 ` Troy Kisky
2013-12-13 21:51 ` Marek Vasut
0 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 18:51 UTC (permalink / raw)
To: linux-arm-kernel
On 12/13/2013 4:46 AM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 02:49:05 AM, Troy Kisky wrote:
>> This makes the structure of Sabre Lite board files the same
>> as Sabre SD board files so that they are easier to compare.
>>
>> By this, I mean that the majority of the file imx6q-sabrelite.dts
>> is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
>> and imx6dl-sabrelite.dts can include it.
>>
>> Now Sabre Lite has support for Dual Lite/Solo
>> processors.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>> ---
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/imx6dl-sabrelite.dts | 20 ++
>> arch/arm/boot/dts/imx6q-sabrelite.dts | 214
>> +-------------------- ...{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi} |
>> 10 -
>> 4 files changed, 22 insertions(+), 223 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6dl-sabrelite.dts
>> copy arch/arm/boot/dts/{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi}
>> (96%)
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 342d16d..3c6f456 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -149,6 +149,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
>> imx6dl-gw53xx.dtb \
>> imx6dl-gw54xx.dtb \
>> imx6dl-sabreauto.dtb \
>> + imx6dl-sabrelite.dtb \
>> imx6dl-sabresd.dtb \
>> imx6dl-wandboard.dtb \
>> imx6q-arm2.dtb \
>> diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts
>> b/arch/arm/boot/dts/imx6dl-sabrelite.dts new file mode 100644
>> index 0000000..2de0447
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
>> @@ -0,0 +1,20 @@
>> +/*
>> + * Copyright 2011 Freescale Semiconductor, Inc.
>> + * Copyright 2011 Linaro Ltd.
> Are you sure about this copyright message ? Isn't this copyright BD ?
>
> Otherwise,
>
> Reviewed-by: Marek Vasut <marex@denx.de>
>
> Best regards,
> Marek Vasut
>
Maybe, but the following change doesn't seem worthy of a copyright
linux-imx6/arch/arm/boot/dts$ diff -u imx6q-sabrelite.dts
imx6dl-sabrelite.dts
--- imx6q-sabrelite.dts 2013-12-12 11:22:10.156010652 -0700
+++ imx6dl-sabrelite.dts 2013-12-12 11:22:10.156010652 -0700
@@ -11,14 +11,10 @@
*/
/dts-v1/;
-#include "imx6q.dtsi"
+#include "imx6dl.dtsi"
#include "imx6qdl-sabrelite.dtsi"
/ {
- model = "Freescale i.MX6 Quad SABRE Lite Board";
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
-};
-
-&sata {
- status = "okay";
+ model = "Freescale i.MX6 DualLite SABRE Lite Board";
+ compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
};
_______
Perhaps I should add a copyright to both?
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread* [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support
2013-12-13 18:51 ` Troy Kisky
@ 2013-12-13 21:51 ` Marek Vasut
0 siblings, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 21:51 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 07:51:21 PM, Troy Kisky wrote:
> On 12/13/2013 4:46 AM, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 02:49:05 AM, Troy Kisky wrote:
> >> This makes the structure of Sabre Lite board files the same
> >> as Sabre SD board files so that they are easier to compare.
> >>
> >> By this, I mean that the majority of the file imx6q-sabrelite.dts
> >> is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
> >> and imx6dl-sabrelite.dts can include it.
> >>
> >> Now Sabre Lite has support for Dual Lite/Solo
> >> processors.
> >>
> >> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> >> ---
> >>
> >> arch/arm/boot/dts/Makefile | 1 +
> >> arch/arm/boot/dts/imx6dl-sabrelite.dts | 20 ++
> >> arch/arm/boot/dts/imx6q-sabrelite.dts | 214
> >>
> >> +-------------------- ...{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi}
> >> |
> >>
> >> 10 -
> >> 4 files changed, 22 insertions(+), 223 deletions(-)
> >> create mode 100644 arch/arm/boot/dts/imx6dl-sabrelite.dts
> >> copy arch/arm/boot/dts/{imx6q-sabrelite.dts => imx6qdl-sabrelite.dtsi}
> >>
> >> (96%)
> >>
> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> >> index 342d16d..3c6f456 100644
> >> --- a/arch/arm/boot/dts/Makefile
> >> +++ b/arch/arm/boot/dts/Makefile
> >> @@ -149,6 +149,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> >>
> >> imx6dl-gw53xx.dtb \
> >> imx6dl-gw54xx.dtb \
> >> imx6dl-sabreauto.dtb \
> >>
> >> + imx6dl-sabrelite.dtb \
> >>
> >> imx6dl-sabresd.dtb \
> >> imx6dl-wandboard.dtb \
> >> imx6q-arm2.dtb \
> >>
> >> diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts
> >> b/arch/arm/boot/dts/imx6dl-sabrelite.dts new file mode 100644
> >> index 0000000..2de0447
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
> >> @@ -0,0 +1,20 @@
> >> +/*
> >> + * Copyright 2011 Freescale Semiconductor, Inc.
> >> + * Copyright 2011 Linaro Ltd.
> >
> > Are you sure about this copyright message ? Isn't this copyright BD ?
> >
> > Otherwise,
> >
> > Reviewed-by: Marek Vasut <marex@denx.de>
> >
> > Best regards,
> > Marek Vasut
>
> Maybe, but the following change doesn't seem worthy of a copyright
>
> linux-imx6/arch/arm/boot/dts$ diff -u imx6q-sabrelite.dts
> imx6dl-sabrelite.dts
> --- imx6q-sabrelite.dts 2013-12-12 11:22:10.156010652 -0700
> +++ imx6dl-sabrelite.dts 2013-12-12 11:22:10.156010652 -0700
> @@ -11,14 +11,10 @@
> */
>
> /dts-v1/;
> -#include "imx6q.dtsi"
> +#include "imx6dl.dtsi"
> #include "imx6qdl-sabrelite.dtsi"
>
> / {
> - model = "Freescale i.MX6 Quad SABRE Lite Board";
> - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
> -};
> -
> -&sata {
> - status = "okay";
> + model = "Freescale i.MX6 DualLite SABRE Lite Board";
> + compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
> };
> _______
>
> Perhaps I should add a copyright to both?
I'm no lawyer, I cannot give you an authoritative advice in this, sorry.
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 02/11] ARM: dts: imx6qdl-sabrelite: Add uart1 support
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
2013-12-13 1:49 ` [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:46 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio Troy Kisky
` (8 subsequent siblings)
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Uart1 is available on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index d7522c9..903da14 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -141,6 +141,10 @@
fsl,pins = <MX6QDL_I2C1_PINGRP1>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <MX6QDL_UART1_PINGRP2>;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <MX6QDL_UART2_PINGRP1>;
};
@@ -189,6 +193,12 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
2013-12-13 1:49 ` [PATCH V1 01/11] ARM: dts: imx: sabrelite: add Dual Lite/Solo support Troy Kisky
2013-12-13 1:49 ` [PATCH V1 02/11] ARM: dts: imx6qdl-sabrelite: Add uart1 support Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:46 ` Marek Vasut
2013-12-14 13:46 ` Shawn Guo
2013-12-13 1:49 ` [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog Troy Kisky
` (7 subsequent siblings)
10 siblings, 2 replies; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
On Sabre Lite usdhc4 is a micro sd slot, which has no
write protect.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 903da14..c4aa504 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -115,7 +115,6 @@
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
- MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
@@ -230,7 +229,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
cd-gpios = <&gpio2 6 0>;
- wp-gpios = <&gpio2 7 0>;
vmmc-supply = <®_3p3v>;
status = "okay";
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-13 1:49 ` [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio Troy Kisky
@ 2013-12-13 11:46 ` Marek Vasut
2013-12-14 13:46 ` Shawn Guo
1 sibling, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:46 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:07 AM, Troy Kisky wrote:
> On Sabre Lite usdhc4 is a micro sd slot, which has no
> write protect.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Visually confirmed ;-)
Reviewed-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-13 1:49 ` [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio Troy Kisky
2013-12-13 11:46 ` Marek Vasut
@ 2013-12-14 13:46 ` Shawn Guo
2013-12-16 19:42 ` Troy Kisky
1 sibling, 1 reply; 41+ messages in thread
From: Shawn Guo @ 2013-12-14 13:46 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 12, 2013 at 06:49:07PM -0700, Troy Kisky wrote:
> On Sabre Lite usdhc4 is a micro sd slot, which has no
> write protect.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Applied #1, #2 and #3, thanks.
Shawn
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> index 903da14..c4aa504 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -115,7 +115,6 @@
> pinctrl_hog: hoggrp {
> fsl,pins = <
> MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
> - MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
> MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> @@ -230,7 +229,6 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc4>;
> cd-gpios = <&gpio2 6 0>;
> - wp-gpios = <&gpio2 7 0>;
> vmmc-supply = <®_3p3v>;
> status = "okay";
> };
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 41+ messages in thread* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-14 13:46 ` Shawn Guo
@ 2013-12-16 19:42 ` Troy Kisky
2013-12-16 19:54 ` Marek Vasut
0 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-16 19:42 UTC (permalink / raw)
To: linux-arm-kernel
On 12/14/2013 6:46 AM, Shawn Guo wrote:
> On Thu, Dec 12, 2013 at 06:49:07PM -0700, Troy Kisky wrote:
>> On Sabre Lite usdhc4 is a micro sd slot, which has no
>> write protect.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> Applied #1, #2 and #3, thanks.
>
> Shawn
>
>
Thanks for the rebase on Marek's PCIe patch. However, PCIe is a common
feature
and should be moved to imx6qdl-sabrelite.dtsi.
Should I send a patch to do this, or will you fix it up, or will Marek?
Thanks
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-16 19:42 ` Troy Kisky
@ 2013-12-16 19:54 ` Marek Vasut
2013-12-16 23:59 ` Troy Kisky
0 siblings, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-16 19:54 UTC (permalink / raw)
To: linux-arm-kernel
On Monday, December 16, 2013 at 08:42:30 PM, Troy Kisky wrote:
> On 12/14/2013 6:46 AM, Shawn Guo wrote:
> > On Thu, Dec 12, 2013 at 06:49:07PM -0700, Troy Kisky wrote:
> >> On Sabre Lite usdhc4 is a micro sd slot, which has no
> >> write protect.
> >>
> >> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> >
> > Applied #1, #2 and #3, thanks.
> >
> > Shawn
>
> Thanks for the rebase on Marek's PCIe patch. However, PCIe is a common
> feature
> and should be moved to imx6qdl-sabrelite.dtsi.
>
> Should I send a patch to do this, or will you fix it up, or will Marek?
I will gladly let such a privilege slip, I am overloaded like hell :(
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
2013-12-16 19:54 ` Marek Vasut
@ 2013-12-16 23:59 ` Troy Kisky
0 siblings, 0 replies; 41+ messages in thread
From: Troy Kisky @ 2013-12-16 23:59 UTC (permalink / raw)
To: linux-arm-kernel
On 12/16/2013 12:54 PM, Marek Vasut wrote:
> On Monday, December 16, 2013 at 08:42:30 PM, Troy Kisky wrote:
>> On 12/14/2013 6:46 AM, Shawn Guo wrote:
>>> On Thu, Dec 12, 2013 at 06:49:07PM -0700, Troy Kisky wrote:
>>>> On Sabre Lite usdhc4 is a micro sd slot, which has no
>>>> write protect.
>>>>
>>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>>> Applied #1, #2 and #3, thanks.
>>>
>>> Shawn
>> Thanks for the rebase on Marek's PCIe patch. However, PCIe is a common
>> feature
>> and should be moved to imx6qdl-sabrelite.dtsi.
>>
>> Should I send a patch to do this, or will you fix it up, or will Marek?
> I will gladly let such a privilege slip, I am overloaded like hell :(
>
> Best regards,
> Marek Vasut
>
I have loads of time:-) and will send a new series which includes it.
Thanks
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (2 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 03/11] ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:47 ` Marek Vasut
2013-12-14 13:54 ` Shawn Guo
2013-12-13 1:49 ` [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings Troy Kisky
` (6 subsequent siblings)
10 siblings, 2 replies; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Add a comment to tell the purpose of each pin. This
makes it easy to tell if it should go somewhere else.
i.e. the spi-nor cs could be put with pinctrl_ecspi1.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index c4aa504..be899d3 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,13 +114,13 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
+/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
+/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
+/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
+/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
+/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
+/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog
2013-12-13 1:49 ` [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog Troy Kisky
@ 2013-12-13 11:47 ` Marek Vasut
2013-12-14 13:54 ` Shawn Guo
1 sibling, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:47 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:08 AM, Troy Kisky wrote:
> Add a comment to tell the purpose of each pin. This
> makes it easy to tell if it should go somewhere else.
> i.e. the spi-nor cs could be put with pinctrl_ecspi1.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index c4aa504..be899d3 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -114,13 +114,13 @@
> imx6q-sabrelite {
> pinctrl_hog: hoggrp {
> fsl,pins = <
> - MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
> - MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> - MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
> - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
> +/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
> +/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> +/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> +/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> +/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
> +/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> +/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
Can you please place the comments past the pin instead of in front of it? If
they don't fit, place the comment above the pin then.
Placing the comment before the pin name seems really strange to me.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread* [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog
2013-12-13 1:49 ` [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog Troy Kisky
2013-12-13 11:47 ` Marek Vasut
@ 2013-12-14 13:54 ` Shawn Guo
1 sibling, 0 replies; 41+ messages in thread
From: Shawn Guo @ 2013-12-14 13:54 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 12, 2013 at 06:49:08PM -0700, Troy Kisky wrote:
> Add a comment to tell the purpose of each pin. This
> makes it easy to tell if it should go somewhere else.
> i.e. the spi-nor cs could be put with pinctrl_ecspi1.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> index c4aa504..be899d3 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -114,13 +114,13 @@
> imx6q-sabrelite {
> pinctrl_hog: hoggrp {
> fsl,pins = <
> - MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
> - MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> - MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
> - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
> +/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
After we move to board specific pingrp, it might be easier to move the
device related pin into corresponding pingrp and limit the hoggrp to
hold those truly non-owner pins. For this uSDHC4 CD example, it will be
something like below.
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_USDHC4_PINGRP_D4
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 /* CD */
>;
};
Shawn
> +/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> +/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> +/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> +/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
> +/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> +/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
> >;
> };
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (3 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 04/11] ARM: dts: imx6qdl-sabrelite: add comments for pinctrl_hog Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:48 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
` (5 subsequent siblings)
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Don't use 0x80000000 to get default pad settings.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index be899d3..b548647 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,13 +114,13 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
-/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
-/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
-/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
-/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
-/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
-/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
+/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
+/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
+/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
+/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
+/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
+/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
+/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 1:49 ` [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings Troy Kisky
@ 2013-12-13 11:48 ` Marek Vasut
2013-12-13 18:42 ` Troy Kisky
0 siblings, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:48 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
> Don't use 0x80000000 to get default pad settings.
What is the rationale behind this change please? Can you explain more in detail?
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index be899d3..b548647 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -114,13 +114,13 @@
> imx6q-sabrelite {
> pinctrl_hog: hoggrp {
> fsl,pins = <
> -/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
> -/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
> -/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
> -/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
> -/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
> -/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> -/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
> +/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06
0x1b0b0
> +/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19
0x1b0b0
> +/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22
0x1b0b0
> +/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23
0x000b0
> +/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00
0x1b0b0
> +/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01
0x1f0b0
> +/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1
0x000b0
>
> >;
>
> };
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 11:48 ` Marek Vasut
@ 2013-12-13 18:42 ` Troy Kisky
2013-12-13 21:50 ` Marek Vasut
0 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 18:42 UTC (permalink / raw)
To: linux-arm-kernel
On 12/13/2013 4:48 AM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
>> Don't use 0x80000000 to get default pad settings.
> What is the rationale behind this change please? Can you explain more in detail?
>
No real need, but I thought relying on what the boot loader did or did
not do
was discouraged?
What is the value in not explicitly setting the pad registers?
Btw, I need to rebase series on your patch anyway so omitting this patch
would be easy.
Thanks
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 18:42 ` Troy Kisky
@ 2013-12-13 21:50 ` Marek Vasut
2013-12-14 1:44 ` Troy Kisky
2013-12-14 13:29 ` Shawn Guo
0 siblings, 2 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 21:50 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 07:42:25 PM, Troy Kisky wrote:
> On 12/13/2013 4:48 AM, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
> >> Don't use 0x80000000 to get default pad settings.
> >
> > What is the rationale behind this change please? Can you explain more in
> > detail?
>
> No real need, but I thought relying on what the boot loader did or did
> not do
> was discouraged?
Full ACK on this, we do not rely on bootloader configuration (though these two
should be in-line).
> What is the value in not explicitly setting the pad registers?
My question was in the direction of "why do you need to change the pin
configuration values from the current ones?". This is what I want to understand.
> Btw, I need to rebase series on your patch anyway so omitting this patch
> would be easy.
I am not saying to omit it, please do not misunderstand me. I am just wondering
why the change from 0x80000000 to 0x1b0b0 .
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 21:50 ` Marek Vasut
@ 2013-12-14 1:44 ` Troy Kisky
2013-12-14 5:00 ` Marek Vasut
2013-12-14 13:29 ` Shawn Guo
1 sibling, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-14 1:44 UTC (permalink / raw)
To: linux-arm-kernel
On 12/13/2013 2:50 PM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 07:42:25 PM, Troy Kisky wrote:
>> On 12/13/2013 4:48 AM, Marek Vasut wrote:
>>> On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
>>>> Don't use 0x80000000 to get default pad settings.
>>> What is the rationale behind this change please? Can you explain more in
>>> detail?
>> No real need, but I thought relying on what the boot loader did or did
>> not do
>> was discouraged?
> Full ACK on this, we do not rely on bootloader configuration (though these two
> should be in-line).
>
>> What is the value in not explicitly setting the pad registers?
> My question was in the direction of "why do you need to change the pin
> configuration values from the current ones?". This is what I want to understand.
>
>> Btw, I need to rebase series on your patch anyway so omitting this patch
>> would be easy.
> I am not saying to omit it, please do not misunderstand me. I am just wondering
> why the change from 0x80000000 to 0x1b0b0 .
>
> Best regards,
> Marek Vasut
>
O.K., I'll change the commit log to say exact what is changing, since it
is very hard to tell
from the patch. I should have done that without needing the prompt :-)
Thanks
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-14 1:44 ` Troy Kisky
@ 2013-12-14 5:00 ` Marek Vasut
0 siblings, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-14 5:00 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday, December 14, 2013 at 02:44:53 AM, Troy Kisky wrote:
> On 12/13/2013 2:50 PM, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 07:42:25 PM, Troy Kisky wrote:
> >> On 12/13/2013 4:48 AM, Marek Vasut wrote:
> >>> On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
> >>>> Don't use 0x80000000 to get default pad settings.
> >>>
> >>> What is the rationale behind this change please? Can you explain more
> >>> in detail?
> >>
> >> No real need, but I thought relying on what the boot loader did or did
> >> not do
> >> was discouraged?
> >
> > Full ACK on this, we do not rely on bootloader configuration (though
> > these two should be in-line).
> >
> >> What is the value in not explicitly setting the pad registers?
> >
> > My question was in the direction of "why do you need to change the pin
> > configuration values from the current ones?". This is what I want to
> > understand.
> >
> >> Btw, I need to rebase series on your patch anyway so omitting this patch
> >> would be easy.
> >
> > I am not saying to omit it, please do not misunderstand me. I am just
> > wondering why the change from 0x80000000 to 0x1b0b0 .
> >
> > Best regards,
> > Marek Vasut
>
> O.K., I'll change the commit log to say exact what is changing, since it
> is very hard to tell
> from the patch. I should have done that without needing the prompt :-)
I am trying to understand what happens here hardware-wise. Is the signal on the
pins better with this change or what ?
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-13 21:50 ` Marek Vasut
2013-12-14 1:44 ` Troy Kisky
@ 2013-12-14 13:29 ` Shawn Guo
2013-12-14 14:16 ` Marek Vasut
1 sibling, 1 reply; 41+ messages in thread
From: Shawn Guo @ 2013-12-14 13:29 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Dec 13, 2013 at 10:50:29PM +0100, Marek Vasut wrote:
> On Friday, December 13, 2013 at 07:42:25 PM, Troy Kisky wrote:
> > On 12/13/2013 4:48 AM, Marek Vasut wrote:
> > > On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
> > >> Don't use 0x80000000 to get default pad settings.
> > >
> > > What is the rationale behind this change please? Can you explain more in
> > > detail?
> >
> > No real need, but I thought relying on what the boot loader did or did
> > not do
> > was discouraged?
>
> Full ACK on this, we do not rely on bootloader configuration (though these two
> should be in-line).
>
> > What is the value in not explicitly setting the pad registers?
>
> My question was in the direction of "why do you need to change the pin
> configuration values from the current ones?". This is what I want to understand.
>
> > Btw, I need to rebase series on your patch anyway so omitting this patch
> > would be easy.
>
> I am not saying to omit it, please do not misunderstand me. I am just wondering
> why the change from 0x80000000 to 0x1b0b0 .
Per Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt,
Bits used for CONFIG:
NO_PAD_CTL(1 << 31): indicate this pin does not need config.
0x80000000 tells pinctrl driver to not touch pad config register@all.
In that case, the configuration of the pad will be what boot loader
configures or just the reset value.
Explicitly putting a proper pad config value instead of 0x80000000
should be something we encourage.
Shawn
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings
2013-12-14 13:29 ` Shawn Guo
@ 2013-12-14 14:16 ` Marek Vasut
0 siblings, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-14 14:16 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday, December 14, 2013 at 02:29:07 PM, Shawn Guo wrote:
> On Fri, Dec 13, 2013 at 10:50:29PM +0100, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 07:42:25 PM, Troy Kisky wrote:
> > > On 12/13/2013 4:48 AM, Marek Vasut wrote:
> > > > On Friday, December 13, 2013 at 02:49:09 AM, Troy Kisky wrote:
> > > >> Don't use 0x80000000 to get default pad settings.
> > > >
> > > > What is the rationale behind this change please? Can you explain more
> > > > in detail?
> > >
> > > No real need, but I thought relying on what the boot loader did or did
> > > not do
> > > was discouraged?
> >
> > Full ACK on this, we do not rely on bootloader configuration (though
> > these two should be in-line).
> >
> > > What is the value in not explicitly setting the pad registers?
> >
> > My question was in the direction of "why do you need to change the pin
> > configuration values from the current ones?". This is what I want to
> > understand.
> >
> > > Btw, I need to rebase series on your patch anyway so omitting this
> > > patch would be easy.
> >
> > I am not saying to omit it, please do not misunderstand me. I am just
> > wondering why the change from 0x80000000 to 0x1b0b0 .
>
> Per Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt,
>
> Bits used for CONFIG:
> NO_PAD_CTL(1 << 31): indicate this pin does not need config.
>
> 0x80000000 tells pinctrl driver to not touch pad config register at all.
> In that case, the configuration of the pad will be what boot loader
> configures or just the reset value.
>
> Explicitly putting a proper pad config value instead of 0x80000000
> should be something we encourage.
Gotcha, thanks!
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (4 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 05/11] ARM: dts: imx6qdl-sabrelite: specify pad settings Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:51 ` Marek Vasut
2013-12-14 13:57 ` Shawn Guo
2013-12-13 1:49 ` [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights Troy Kisky
` (4 subsequent siblings)
10 siblings, 2 replies; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Add power, menu, home, back, volume up, and volume down
buttons.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 47 ++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index b548647..fa10ded 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -9,6 +9,7 @@
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <dt-bindings/gpio/gpio.h>
/ {
memory {
@@ -49,6 +50,46 @@
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ power {
+ label = "Power Button";
+ gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+ linux,code = <116>; /* KEY_POWER, or search */
+ gpio-key,wakeup;
+ };
+
+ menu {
+ label = "Menu";
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ linux,code = <139>; /* KEY_MENU */
+ };
+
+ home {
+ label = "Home";
+ gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+ linux,code = <102>; /* KEY_HOME */
+ };
+
+ back {
+ label = "Back";
+ gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ linux,code = <158>; /* KEY_BACK */
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
+ linux,code = <115>; /* KEY_VOLUMEUP */
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+ linux,code = <114>; /* KEY_VOLUMEDOWN */
+ };
+ };
+
sound {
compatible = "fsl,imx6q-sabrelite-sgtl5000",
"fsl,imx-audio-sgtl5000";
@@ -121,6 +162,12 @@
/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
+/* Power Button */ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+/* Menu Button */ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
+/* Home Button */ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+/* Back Button */ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
+/* Volume Up Button */ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
+/* Volume Down Button */ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 1:49 ` [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
@ 2013-12-13 11:51 ` Marek Vasut
2013-12-13 18:45 ` Troy Kisky
2013-12-14 13:57 ` Shawn Guo
1 sibling, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:51 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:10 AM, Troy Kisky wrote:
> Add power, menu, home, back, volume up, and volume down
> buttons.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Are these really present on the board or are they on some expansion board? I am
not sure how to handle this case when the GPIO buttons are on optional expansion
board, maybe someone else (Shawn?) will help here.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 11:51 ` Marek Vasut
@ 2013-12-13 18:45 ` Troy Kisky
2013-12-13 21:50 ` Marek Vasut
0 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 18:45 UTC (permalink / raw)
To: linux-arm-kernel
On 12/13/2013 4:51 AM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 02:49:10 AM, Troy Kisky wrote:
>> Add power, menu, home, back, volume up, and volume down
>> buttons.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> Are these really present on the board or are they on some expansion board? I am
> not sure how to handle this case when the GPIO buttons are on optional expansion
> board, maybe someone else (Shawn?) will help here.
>
> Best regards,
> Marek Vasut
>
You are right, it is an expansion board. But the signals do not conflict
with any other
expansion board that I know of.
Troy
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 18:45 ` Troy Kisky
@ 2013-12-13 21:50 ` Marek Vasut
2013-12-13 21:55 ` Eric Nelson
0 siblings, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 21:50 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 07:45:10 PM, Troy Kisky wrote:
> On 12/13/2013 4:51 AM, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 02:49:10 AM, Troy Kisky wrote:
> >> Add power, menu, home, back, volume up, and volume down
> >> buttons.
> >>
> >> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> >
> > Are these really present on the board or are they on some expansion
> > board? I am not sure how to handle this case when the GPIO buttons are
> > on optional expansion board, maybe someone else (Shawn?) will help here.
> >
> > Best regards,
> > Marek Vasut
>
> You are right, it is an expansion board. But the signals do not conflict
> with any other
> expansion board that I know of.
... yet ;-)
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 21:50 ` Marek Vasut
@ 2013-12-13 21:55 ` Eric Nelson
2013-12-14 5:00 ` Marek Vasut
0 siblings, 1 reply; 41+ messages in thread
From: Eric Nelson @ 2013-12-13 21:55 UTC (permalink / raw)
To: linux-arm-kernel
Hi Marek,
On 12/13/2013 02:50 PM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 07:45:10 PM, Troy Kisky wrote:
>> On 12/13/2013 4:51 AM, Marek Vasut wrote:
>>> On Friday, December 13, 2013 at 02:49:10 AM, Troy Kisky wrote:
>>>> Add power, menu, home, back, volume up, and volume down
>>>> buttons.
>>>>
>>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>>>
>>> Are these really present on the board or are they on some expansion
>>> board? I am not sure how to handle this case when the GPIO buttons are
>>> on optional expansion board, maybe someone else (Shawn?) will help here.
>>>
>>> Best regards,
>>> Marek Vasut
>>
>> You are right, it is an expansion board. But the signals do not conflict
>> with any other
>> expansion board that I know of.
>
> ... yet ;-)
>
I know of a dozen or so folks who are re-purposing these pins
(that's the thing about GPIOs!), but in many cases, they're
doing so by catching the input events matched as this patch
defines them .
And since this is how the schematics and hardware manuals label
the pins, this is the proper way to handle them in the default
kernel.
Regards,
Eric
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 21:55 ` Eric Nelson
@ 2013-12-14 5:00 ` Marek Vasut
0 siblings, 0 replies; 41+ messages in thread
From: Marek Vasut @ 2013-12-14 5:00 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 10:55:55 PM, Eric Nelson wrote:
> Hi Marek,
>
> On 12/13/2013 02:50 PM, Marek Vasut wrote:
> > On Friday, December 13, 2013 at 07:45:10 PM, Troy Kisky wrote:
> >> On 12/13/2013 4:51 AM, Marek Vasut wrote:
> >>> On Friday, December 13, 2013 at 02:49:10 AM, Troy Kisky wrote:
> >>>> Add power, menu, home, back, volume up, and volume down
> >>>> buttons.
> >>>>
> >>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> >>>
> >>> Are these really present on the board or are they on some expansion
> >>> board? I am not sure how to handle this case when the GPIO buttons are
> >>> on optional expansion board, maybe someone else (Shawn?) will help
> >>> here.
> >>>
> >>> Best regards,
> >>> Marek Vasut
> >>
> >> You are right, it is an expansion board. But the signals do not conflict
> >> with any other
> >> expansion board that I know of.
> >
> > ... yet ;-)
>
> I know of a dozen or so folks who are re-purposing these pins
> (that's the thing about GPIOs!), but in many cases, they're
> doing so by catching the input events matched as this patch
> defines them .
>
> And since this is how the schematics and hardware manuals label
> the pins, this is the proper way to handle them in the default
> kernel.
OK, I won't pester you about this.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-13 1:49 ` [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
2013-12-13 11:51 ` Marek Vasut
@ 2013-12-14 13:57 ` Shawn Guo
1 sibling, 0 replies; 41+ messages in thread
From: Shawn Guo @ 2013-12-14 13:57 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 12, 2013 at 06:49:10PM -0700, Troy Kisky wrote:
> Add power, menu, home, back, volume up, and volume down
> buttons.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 47 ++++++++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> index b548647..fa10ded 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -9,6 +9,7 @@
> * http://www.opensource.org/licenses/gpl-license.html
> * http://www.gnu.org/copyleft/gpl.html
> */
> +#include <dt-bindings/gpio/gpio.h>
>
> / {
> memory {
> @@ -49,6 +50,46 @@
> };
> };
>
> + gpio-keys {
> + compatible = "gpio-keys";
Nit: add a blank line here.
> + power {
> + label = "Power Button";
> + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
> + linux,code = <116>; /* KEY_POWER, or search */
Please use the macros defined in include/dt-bindings/input/input.h, so
that you can save the comment for that number.
Shawn
> + gpio-key,wakeup;
> + };
> +
> + menu {
> + label = "Menu";
> + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> + linux,code = <139>; /* KEY_MENU */
> + };
> +
> + home {
> + label = "Home";
> + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
> + linux,code = <102>; /* KEY_HOME */
> + };
> +
> + back {
> + label = "Back";
> + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
> + linux,code = <158>; /* KEY_BACK */
> + };
> +
> + volume-up {
> + label = "Volume Up";
> + gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
> + linux,code = <115>; /* KEY_VOLUMEUP */
> + };
> +
> + volume-down {
> + label = "Volume Down";
> + gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
> + linux,code = <114>; /* KEY_VOLUMEDOWN */
> + };
> + };
> +
> sound {
> compatible = "fsl,imx6q-sabrelite-sgtl5000",
> "fsl,imx-audio-sgtl5000";
> @@ -121,6 +162,12 @@
> /* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
> /* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
> /* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
> +/* Power Button */ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
> +/* Menu Button */ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> +/* Home Button */ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
> +/* Back Button */ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
> +/* Volume Up Button */ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
> +/* Volume Down Button */ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
> >;
> };
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (5 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 06/11] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:53 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 08/11] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy Troy Kisky
` (3 subsequent siblings)
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
add pwm1 for lcd backlight
add pwm4 for lvds backlight
add pwm3 for ov5640 mipi clock
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 54 ++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index fa10ded..ac33d94 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -103,6 +103,24 @@
mux-int-port = <1>;
mux-ext-port = <4>;
};
+
+ backlight_lcd {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ power-supply = <®_3p3v>;
+ status = "okay";
+ };
+
+ backlight_lvds {
+ compatible = "pwm-backlight";
+ pwms = <&pwm4 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ power-supply = <®_3p3v>;
+ status = "okay";
+ };
};
&audmux {
@@ -187,6 +205,24 @@
fsl,pins = <MX6QDL_I2C1_PINGRP1>;
};
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <MX6QDL_UART1_PINGRP2>;
};
@@ -234,6 +270,24 @@
};
};
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "okay";
+};
+
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+ status = "okay";
+};
+
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights
2013-12-13 1:49 ` [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights Troy Kisky
@ 2013-12-13 11:53 ` Marek Vasut
2013-12-13 14:09 ` Eric Nelson
0 siblings, 1 reply; 41+ messages in thread
From: Marek Vasut @ 2013-12-13 11:53 UTC (permalink / raw)
To: linux-arm-kernel
On Friday, December 13, 2013 at 02:49:11 AM, Troy Kisky wrote:
> add pwm1 for lcd backlight
> add pwm4 for lvds backlight
> add pwm3 for ov5640 mipi clock
The camera needs a PWM ? I am a little surprised by such a design, but I might
just be lacking knowledge.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights
2013-12-13 11:53 ` Marek Vasut
@ 2013-12-13 14:09 ` Eric Nelson
0 siblings, 0 replies; 41+ messages in thread
From: Eric Nelson @ 2013-12-13 14:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Marek,
On 12/13/2013 04:53 AM, Marek Vasut wrote:
> On Friday, December 13, 2013 at 02:49:11 AM, Troy Kisky wrote:
>> add pwm1 for lcd backlight
>> add pwm4 for lvds backlight
>> add pwm3 for ov5640 mipi clock
>
> The camera needs a PWM ? I am a little surprised by such a design, but I might
> just be lacking knowledge.
>
The PWM is used to provide a clock to the camera (with a constant
50% duty cycle).
We do the same with our parallel camera interface, avoiding
external oscillators.
Regards,
Eric
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH V1 08/11] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (6 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 07/11] ARM: dts: imx6qdl-sabrelite: add pwms for backlights Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:53 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 09/11] ARM: dts: imx6qdl-sabrelite: fix ENET group Troy Kisky
` (2 subsequent siblings)
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Set the data delays to min, and clock delays to max
because the traces are equal length on pcb.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index ac33d94..38b9555 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -148,6 +148,18 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <3000>;
+ rxdv-skew-ps = <0>;
+ rxc-skew-ps = <3000>;
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
status = "okay";
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 09/11] ARM: dts: imx6qdl-sabrelite: fix ENET group
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (7 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 08/11] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:54 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 10/11] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg Troy Kisky
2013-12-13 1:49 ` [PATCH V1 11/11] ARM: dts: imx: add nitrogen6x board Troy Kisky
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
GPIO16 is used for I2C3, not ENET_REF_CLK.
Replace MX6QDL_ENET_PINGRP1 with explicit list.
Also, remove pull-ups from tx pins.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 38b9555..24e4c81 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -210,7 +210,23 @@
};
pinctrl_enet: enetgrp {
- fsl,pins = <MX6QDL_ENET_PINGRP1>;
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ >;
};
pinctrl_i2c1: i2c1grp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 10/11] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (8 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 09/11] ARM: dts: imx6qdl-sabrelite: fix ENET group Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
2013-12-13 11:54 ` Marek Vasut
2013-12-13 1:49 ` [PATCH V1 11/11] ARM: dts: imx: add nitrogen6x board Troy Kisky
10 siblings, 1 reply; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
KEY_COL4 is over-current for usbotg on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 24e4c81..1a95faf 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -260,7 +260,10 @@
};
pinctrl_usbotg: usbotggrp {
- fsl,pins = <MX6QDL_USBOTG_PINGRP1>;
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
+ >;
};
pinctrl_usdhc3: usdhc3grp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PATCH V1 11/11] ARM: dts: imx: add nitrogen6x board
2013-12-13 1:49 [PATCH V1 00/11] Update Sabre Lite Troy Kisky
` (9 preceding siblings ...)
2013-12-13 1:49 ` [PATCH V1 10/11] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg Troy Kisky
@ 2013-12-13 1:49 ` Troy Kisky
10 siblings, 0 replies; 41+ messages in thread
From: Troy Kisky @ 2013-12-13 1:49 UTC (permalink / raw)
To: linux-arm-kernel
Add file imx6q-nitrogen6x.dts,
imx6dl-nitrogen6x.dts,
imx6qdl-nitrogen6x.dtsi
And add board to makefile.
Eric Nelson created a web page to show the
differences between Nitrogen6x and Sabre Lite boards.
http://boundarydevices.com/differences-sabre-lite-nitrogen6x
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/Makefile | 2 ++
arch/arm/boot/dts/imx6dl-nitrogen6x.dts | 22 ++++++++++++++++++
arch/arm/boot/dts/imx6q-nitrogen6x.dts | 26 ++++++++++++++++++++++
...6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} | 17 +++++++-------
4 files changed, 58 insertions(+), 9 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-nitrogen6x.dts
create mode 100644 arch/arm/boot/dts/imx6q-nitrogen6x.dts
copy arch/arm/boot/dts/{imx6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} (95%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3c6f456..f8fb8d0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-nitrogen6x.dtb \
imx6dl-sabreauto.dtb \
imx6dl-sabrelite.dtb \
imx6dl-sabresd.dtb \
@@ -160,6 +161,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
imx6q-sabrelite.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
new file mode 100644
index 0000000..89d32f3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+ model = "Freescale i.MX6 DualLite Nitrogen6x Board";
+ compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl";
+
+};
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6x.dts b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
new file mode 100644
index 0000000..5790172
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6q.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad Nitrogen6x Board";
+ compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
+
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
similarity index 95%
copy from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
copy to arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 1a95faf..3e60ba5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -1,4 +1,5 @@
/*
+ * Copyright 2013 Boundary Devices, Inc.
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
@@ -91,9 +92,9 @@
};
sound {
- compatible = "fsl,imx6q-sabrelite-sgtl5000",
+ compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
"fsl,imx-audio-sgtl5000";
- model = "imx6q-sabrelite-sgtl5000";
+ model = "imx6q-nitrogen6x-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
@@ -101,7 +102,7 @@
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
- mux-ext-port = <4>;
+ mux-ext-port = <3>;
};
backlight_lcd {
@@ -147,7 +148,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
- phy-reset-gpios = <&gpio3 23 0>;
+ phy-reset-gpios = <&gpio1 27 0>;
txen-skew-ps = <0>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
@@ -182,15 +183,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
- imx6q-sabrelite {
+ imx6q-nitrogen6x {
pinctrl_hog: hoggrp {
fsl,pins = <
/* uSDHC4 CD */ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
/* spi-nor CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
/* otg power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
-/* ethernet phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
+/* ethernet phy reset */ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
/* USDHC3 CD */ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
-/* USDHC3 WP */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
/* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
/* Power Button */ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
/* Menu Button */ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
@@ -202,7 +202,7 @@
};
pinctrl_audmux: audmuxgrp {
- fsl,pins = <MX6QDL_AUDMUX_PINGRP1>;
+ fsl,pins = <MX6QDL_AUDMUX_PINGRP2>;
};
pinctrl_ecspi1: ecspi1grp {
@@ -352,7 +352,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 0>;
- wp-gpios = <&gpio7 1 0>;
vmmc-supply = <®_3p3v>;
status = "okay";
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 41+ messages in thread