[PATCH] Add Undervolt MSRs to wrmsr function.

[PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

Giving Laptop Users the ability to Undervolt and change Temp Throttle Limits.

Signed-off-by: Dylanger Daly <dylanger@thegrail.co>
---
 xen/arch/x86/traps.c            | 8 ++++++++
 xen/include/asm-x86/msr-index.h | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 1a22895907..475a2a5720 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2684,6 +2684,14 @@ static int priv_op_write_msr(unsigned int reg, uint64_t val,
             goto invalid;
         return X86EMUL_OKAY;
 
+    case MSR_IA32_VOLTAGE_OFFSET:
+    case MSR_IA32_TEMP_CONTROL:
+        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+            break;
+        if ( wrmsr_safe(reg, val) == 0 )
+            return X86EMUL_OKAY;
+        break;
+
     case MSR_IA32_MISC_ENABLE:
         if ( rdmsr_safe(reg, temp) )
             break;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 7bb382f456..75dad3fe43 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -346,6 +346,8 @@
 #define MSR_IA32_THERM_INTERRUPT	0x0000019b
 #define MSR_IA32_THERM_STATUS		0x0000019c
 #define MSR_IA32_MISC_ENABLE		0x000001a0
+#define MSR_IA32_VOLTAGE_OFFSET		0x00000150
+#define MSR_IA32_TEMP_CONTROL		0x000001a2
 #define MSR_IA32_MISC_ENABLE_PERF_AVAIL   (1<<7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL  (1<<11)
 #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1<<12)
-- 
2.20.1


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[Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

Giving Laptop Users the ability to Undervolt and change Temp Throttle Limits.

Signed-off-by: Dylanger Daly <dylanger@thegrail.co>
---
 xen/arch/x86/traps.c            | 8 ++++++++
 xen/include/asm-x86/msr-index.h | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 1a22895907..475a2a5720 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2684,6 +2684,14 @@ static int priv_op_write_msr(unsigned int reg, uint64_t val,
             goto invalid;
         return X86EMUL_OKAY;
 
+    case MSR_IA32_VOLTAGE_OFFSET:
+    case MSR_IA32_TEMP_CONTROL:
+        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+            break;
+        if ( wrmsr_safe(reg, val) == 0 )
+            return X86EMUL_OKAY;
+        break;
+
     case MSR_IA32_MISC_ENABLE:
         if ( rdmsr_safe(reg, temp) )
             break;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 7bb382f456..75dad3fe43 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -346,6 +346,8 @@
 #define MSR_IA32_THERM_INTERRUPT	0x0000019b
 #define MSR_IA32_THERM_STATUS		0x0000019c
 #define MSR_IA32_MISC_ENABLE		0x000001a0
+#define MSR_IA32_VOLTAGE_OFFSET		0x00000150
+#define MSR_IA32_TEMP_CONTROL		0x000001a2
 #define MSR_IA32_MISC_ENABLE_PERF_AVAIL   (1<<7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL  (1<<11)
 #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1<<12)
-- 
2.20.1


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Re: [PATCH] Add Undervolt MSRs to wrmsr function.

[Andrew Cooper]

On 18/04/2019 09:56, Dylanger Daly wrote:
> Giving Laptop Users the ability to Undervolt and change Temp Throttle Limits.
>
> Signed-off-by: Dylanger Daly <dylanger@thegrail.co>

Thankyou for the patch.  Which version of Xen is it against?  It is
fairly old, given that the function you patch has now moved to
arch/x86/pv/emul-priv-op.c.  Furthermore, this is the legacy path, so
the functions this should be added to are guest_{rdmsr,wrmsr}() in
arch/x86/msr.c

What entity is controlling this?

Sadly, there are a number of issues.  You open these MSRs up to
unprivileged domUs, and there is a mismatch between the vcpus/pcpus.

What is the scope of these MSRs?  I guess dom0 is going to write them on
all cores, but as dom0 gets scheduled around, this wont match up with
the pcpus across the host.

~Andrew

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Re: [Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Andrew Cooper]

On 18/04/2019 09:56, Dylanger Daly wrote:
> Giving Laptop Users the ability to Undervolt and change Temp Throttle Limits.
>
> Signed-off-by: Dylanger Daly <dylanger@thegrail.co>

Thankyou for the patch.  Which version of Xen is it against?  It is
fairly old, given that the function you patch has now moved to
arch/x86/pv/emul-priv-op.c.  Furthermore, this is the legacy path, so
the functions this should be added to are guest_{rdmsr,wrmsr}() in
arch/x86/msr.c

What entity is controlling this?

Sadly, there are a number of issues.  You open these MSRs up to
unprivileged domUs, and there is a mismatch between the vcpus/pcpus.

What is the scope of these MSRs?  I guess dom0 is going to write them on
all cores, but as dom0 gets scheduled around, this wont match up with
the pcpus across the host.

~Andrew

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Re: [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

[-- Attachment #1.1: Type: text/plain, Size: 1287 bytes --]

No worries Andrew, it was my first patch, thank you for the response.

It's based on Xen 4.8

Dom0 should be controlling it, but I wasn't aware of the Security
implications.

The scope isn't well documented:
 https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/

More experimental as it worked with my Laptop.

Thank you for your time


On Thu, Apr 18, 2019, 10:09 AM Andrew Cooper <andrew.cooper3@citrix.com>
wrote:

> On 18/04/2019 09:56, Dylanger Daly wrote:
> > Giving Laptop Users the ability to Undervolt and change Temp Throttle
> Limits.
> >
> > Signed-off-by: Dylanger Daly <dylanger@thegrail.co>
>
> Thankyou for the patch.  Which version of Xen is it against?  It is
> fairly old, given that the function you patch has now moved to
> arch/x86/pv/emul-priv-op.c.  Furthermore, this is the legacy path, so
> the functions this should be added to are guest_{rdmsr,wrmsr}() in
> arch/x86/msr.c
>
> What entity is controlling this?
>
> Sadly, there are a number of issues.  You open these MSRs up to
> unprivileged domUs, and there is a mismatch between the vcpus/pcpus.
>
> What is the scope of these MSRs?  I guess dom0 is going to write them on
> all cores, but as dom0 gets scheduled around, this wont match up with
> the pcpus across the host.
>
> ~Andrew
>

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Re: [Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

[-- Attachment #1.1: Type: text/plain, Size: 1287 bytes --]

No worries Andrew, it was my first patch, thank you for the response.

It's based on Xen 4.8

Dom0 should be controlling it, but I wasn't aware of the Security
implications.

The scope isn't well documented:
 https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/

More experimental as it worked with my Laptop.

Thank you for your time


On Thu, Apr 18, 2019, 10:09 AM Andrew Cooper <andrew.cooper3@citrix.com>
wrote:

> On 18/04/2019 09:56, Dylanger Daly wrote:
> > Giving Laptop Users the ability to Undervolt and change Temp Throttle
> Limits.
> >
> > Signed-off-by: Dylanger Daly <dylanger@thegrail.co>
>
> Thankyou for the patch.  Which version of Xen is it against?  It is
> fairly old, given that the function you patch has now moved to
> arch/x86/pv/emul-priv-op.c.  Furthermore, this is the legacy path, so
> the functions this should be added to are guest_{rdmsr,wrmsr}() in
> arch/x86/msr.c
>
> What entity is controlling this?
>
> Sadly, there are a number of issues.  You open these MSRs up to
> unprivileged domUs, and there is a mismatch between the vcpus/pcpus.
>
> What is the scope of these MSRs?  I guess dom0 is going to write them on
> all cores, but as dom0 gets scheduled around, this wont match up with
> the pcpus across the host.
>
> ~Andrew
>

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[-- Attachment #2: Type: text/plain, Size: 157 bytes --]

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Re: [PATCH] Add Undervolt MSRs to wrmsr function.

[Andrew Cooper]

On 18/04/2019 10:19, Dylanger Daly wrote:
> No worries Andrew, it was my first patch, thank you for the response.
>
> It's based on Xen 4.8
>
> Dom0 should be controlling it, but I wasn't aware of the Security
> implications.
>
> The scope isn't well documented:
>  https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/
>
> More experimental as it worked with my Laptop.

Which CPU exactly?

MSR_TEMPERATURE_TARGET is documented.  It has package scope, but the
availability of certain fields is model specific (but consistent, at least).

I can't find any documentation on MSR 150 at all.

~Andrew

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Re: [Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Andrew Cooper]

On 18/04/2019 10:19, Dylanger Daly wrote:
> No worries Andrew, it was my first patch, thank you for the response.
>
> It's based on Xen 4.8
>
> Dom0 should be controlling it, but I wasn't aware of the Security
> implications.
>
> The scope isn't well documented:
>  https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/
>
> More experimental as it worked with my Laptop.

Which CPU exactly?

MSR_TEMPERATURE_TARGET is documented.  It has package scope, but the
availability of certain fields is model specific (but consistent, at least).

I can't find any documentation on MSR 150 at all.

~Andrew

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Re: [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

I'm running an i7-8550U on a Huawei Matebook X Pro. Running Qubes OS I
used to idle ~60C, with these MSRs enabled, I've been able to get
stable ~45-55C.

I'm not too sure, but I think it was reverse engineered from Intel's
XTU Tool. Perhaps it's behind NDAs? I'm not too sure

MSR 150 is where you're applying the Undervolt Voltage Offsets.

On Thu, Apr 18, 2019 at 12:12 PM Andrew Cooper
<andrew.cooper3@citrix.com> wrote:
>
> On 18/04/2019 10:19, Dylanger Daly wrote:
> > No worries Andrew, it was my first patch, thank you for the response.
> >
> > It's based on Xen 4.8
> >
> > Dom0 should be controlling it, but I wasn't aware of the Security
> > implications.
> >
> > The scope isn't well documented:
> >  https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/
> >
> > More experimental as it worked with my Laptop.
>
> Which CPU exactly?
>
> MSR_TEMPERATURE_TARGET is documented.  It has package scope, but the
> availability of certain fields is model specific (but consistent, at least).
>
> I can't find any documentation on MSR 150 at all.
>
> ~Andrew

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Re: [Xen-devel] [PATCH] Add Undervolt MSRs to wrmsr function.

[Dylanger Daly]

I'm running an i7-8550U on a Huawei Matebook X Pro. Running Qubes OS I
used to idle ~60C, with these MSRs enabled, I've been able to get
stable ~45-55C.

I'm not too sure, but I think it was reverse engineered from Intel's
XTU Tool. Perhaps it's behind NDAs? I'm not too sure

MSR 150 is where you're applying the Undervolt Voltage Offsets.

On Thu, Apr 18, 2019 at 12:12 PM Andrew Cooper
<andrew.cooper3@citrix.com> wrote:
>
> On 18/04/2019 10:19, Dylanger Daly wrote:
> > No worries Andrew, it was my first patch, thank you for the response.
> >
> > It's based on Xen 4.8
> >
> > Dom0 should be controlling it, but I wasn't aware of the Security
> > implications.
> >
> > The scope isn't well documented:
> >  https://ressman.org/posts/2018-06-26-voltage-temperature-tdp-thinkpad/
> >
> > More experimental as it worked with my Laptop.
>
> Which CPU exactly?
>
> MSR_TEMPERATURE_TARGET is documented.  It has package scope, but the
> availability of certain fields is model specific (but consistent, at least).
>
> I can't find any documentation on MSR 150 at all.
>
> ~Andrew

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