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From: Florian Fainelli <florian-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
To: Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-leds-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-leds-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH 5/7 v6] ARM: l2c: parse 'cache-size' and 'cache-sets' properties
Date: Mon, 08 Sep 2014 12:57:34 -0700	[thread overview]
Message-ID: <540E0A2E.9030106@openwrt.org> (raw)
In-Reply-To: <CACRpkdb_bS0P-fGxogiyCzG9CRPhJK1Gro=H3X1Ks_-UoXh52w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On 09/08/2014 05:36 AM, Linus Walleij wrote:
> On Mon, Sep 8, 2014 at 2:20 PM, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
>> On Monday 08 September 2014 13:38:04 Linus Walleij wrote:
>>> +       of_property_read_u32(np, "cache-size", &size);
>>> +       of_property_read_u32(np, "cache-sets", &sets);
>>> +
>>> +       if (!size || !sets)
>>> +               return;
>>> +
>>> +       way_size = size / sets;
>>
>> Going back to this one: Isn't (size / sets) the set-size rather
>> than the way-size?
>>
>> After we discussed this on IRC, I had expected a calculation like
>>
>>         set_size = size / sets;
>>         ways = set_size / line_size;
>>         way_size = size / ways;
> 
> First: in this PB1176 case:
> 
> set_size = 128K/8 = 16K
> ways = 16K/32 = 512 bytes
> way_size = 128K/512 = 128 bytes
> 
> Well maybe it's the ARM reference manual internal lingo that
> is actually causing the confusion here. It will say something
> like:
> 
> [19:17] Way-size 3’b000 = Reserved, internally mapped to 16KB
> 3’b001 = 16KB, this is the default value
> 3’b010 = 32KB
> 3’b011 = 64KB
> 3’b100 = 128KB
> 3’b101 = 256KB
> 3’b110 to 3’b111 = Reserved, internally mapped to 256 KB
> 
> OK way-size ... is in the 16 thru 256KB range, which fits nicely
> with set size incidentally. And also corresponds to current
> comments in the code such as this from
> arch/arm/mach-realview/realview_pb1176.c:
> 
> #ifdef CONFIG_CACHE_L2X0
>         /*
>          * The PL220 needs to be manually configured as the hardware
>          * doesn't report the correct sizes.
>          * 128kB (16kB/way), 8-way associativity, event monitor and
>          * parity enabled, ignore share bit, no force write allocate
>          * Bits:  .... ...0 0111 0011 0000 .... .... ....
>          */
>         l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000,
> 0xfe000fff);
> #endif
> 
> I can add a comment explaining that ARMs terminology does
> not match the academic terminology or something, and say that
> the thing we poke into "way-size" is actually "set size", if we agree
> that is what we're seeing here.
> 
> Florian: what was your interpretation?

Yes that was my interpretation as well, that we could have 'way-size'
and 'set-size' be the same things here, now that I re-think about it, I
am not sure anymore. More to follow on Arnd's reply to this email.
--
Florian

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WARNING: multiple messages have this Message-ID (diff)
From: florian@openwrt.org (Florian Fainelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/7 v6] ARM: l2c: parse 'cache-size' and 'cache-sets' properties
Date: Mon, 08 Sep 2014 12:57:34 -0700	[thread overview]
Message-ID: <540E0A2E.9030106@openwrt.org> (raw)
In-Reply-To: <CACRpkdb_bS0P-fGxogiyCzG9CRPhJK1Gro=H3X1Ks_-UoXh52w@mail.gmail.com>

On 09/08/2014 05:36 AM, Linus Walleij wrote:
> On Mon, Sep 8, 2014 at 2:20 PM, Arnd Bergmann <arnd@arndb.de> wrote:
>> On Monday 08 September 2014 13:38:04 Linus Walleij wrote:
>>> +       of_property_read_u32(np, "cache-size", &size);
>>> +       of_property_read_u32(np, "cache-sets", &sets);
>>> +
>>> +       if (!size || !sets)
>>> +               return;
>>> +
>>> +       way_size = size / sets;
>>
>> Going back to this one: Isn't (size / sets) the set-size rather
>> than the way-size?
>>
>> After we discussed this on IRC, I had expected a calculation like
>>
>>         set_size = size / sets;
>>         ways = set_size / line_size;
>>         way_size = size / ways;
> 
> First: in this PB1176 case:
> 
> set_size = 128K/8 = 16K
> ways = 16K/32 = 512 bytes
> way_size = 128K/512 = 128 bytes
> 
> Well maybe it's the ARM reference manual internal lingo that
> is actually causing the confusion here. It will say something
> like:
> 
> [19:17] Way-size 3?b000 = Reserved, internally mapped to 16KB
> 3?b001 = 16KB, this is the default value
> 3?b010 = 32KB
> 3?b011 = 64KB
> 3?b100 = 128KB
> 3?b101 = 256KB
> 3?b110 to 3?b111 = Reserved, internally mapped to 256 KB
> 
> OK way-size ... is in the 16 thru 256KB range, which fits nicely
> with set size incidentally. And also corresponds to current
> comments in the code such as this from
> arch/arm/mach-realview/realview_pb1176.c:
> 
> #ifdef CONFIG_CACHE_L2X0
>         /*
>          * The PL220 needs to be manually configured as the hardware
>          * doesn't report the correct sizes.
>          * 128kB (16kB/way), 8-way associativity, event monitor and
>          * parity enabled, ignore share bit, no force write allocate
>          * Bits:  .... ...0 0111 0011 0000 .... .... ....
>          */
>         l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000,
> 0xfe000fff);
> #endif
> 
> I can add a comment explaining that ARMs terminology does
> not match the academic terminology or something, and say that
> the thing we poke into "way-size" is actually "set size", if we agree
> that is what we're seeing here.
> 
> Florian: what was your interpretation?

Yes that was my interpretation as well, that we could have 'way-size'
and 'set-size' be the same things here, now that I re-think about it, I
am not sure anymore. More to follow on Arnd's reply to this email.
--
Florian

  parent reply	other threads:[~2014-09-08 19:57 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-08 11:37 [PATCH 0/7] ARM RealView DeviceTree support v6 Linus Walleij
2014-09-08 11:37 ` Linus Walleij
2014-09-08 11:38 ` [PATCH 1/7 v6] leds: add a driver for syscon-based LEDs Linus Walleij
2014-09-08 11:38   ` Linus Walleij
2014-09-12  8:56   ` Linus Walleij
2014-09-12  8:56     ` Linus Walleij
2014-09-18 22:39     ` Linus Walleij
2014-09-18 22:39       ` Linus Walleij
2015-01-13 20:19       ` Bryan Wu
2015-01-13 20:19         ` Bryan Wu
2014-09-08 11:38 ` [PATCH 2/7 v6] leds: add device tree bindings for register bit LEDs Linus Walleij
2014-09-08 11:38   ` Linus Walleij
2014-09-08 11:38 ` [PATCH 3/7 v6] power: reset: driver for the Versatile syscon reboot Linus Walleij
2014-09-08 11:38   ` Linus Walleij
2014-09-12  8:55   ` Linus Walleij
2014-09-12  8:55     ` Linus Walleij
2014-09-15 16:06     ` Sebastian Reichel
2014-09-15 16:06       ` Sebastian Reichel
     [not found] ` <1410176286-32533-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-09-08 11:38   ` [PATCH 4/7 v6] soc: add driver for the ARM RealView Linus Walleij
2014-09-08 11:38     ` Linus Walleij
2014-09-08 11:38 ` [PATCH 5/7 v6] ARM: l2c: parse 'cache-size' and 'cache-sets' properties Linus Walleij
2014-09-08 11:38   ` Linus Walleij
2014-09-08 12:20   ` Arnd Bergmann
2014-09-08 12:20     ` Arnd Bergmann
2014-09-08 12:36     ` Linus Walleij
2014-09-08 12:36       ` Linus Walleij
2014-09-08 13:16       ` Arnd Bergmann
2014-09-08 13:16         ` Arnd Bergmann
2014-09-08 20:33         ` Florian Fainelli
2014-09-08 20:33           ` Florian Fainelli
2014-09-08 20:41           ` Arnd Bergmann
2014-09-08 20:41             ` Arnd Bergmann
2014-09-09  7:14         ` Linus Walleij
2014-09-09  7:14           ` Linus Walleij
     [not found]       ` <CACRpkdb_bS0P-fGxogiyCzG9CRPhJK1Gro=H3X1Ks_-UoXh52w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-09-08 19:57         ` Florian Fainelli [this message]
2014-09-08 19:57           ` Florian Fainelli
2014-09-08 11:38 ` [PATCH 6/7 v6] ARM: l2x0: calculate associativity from ePAPR cache props Linus Walleij
2014-09-08 11:38   ` Linus Walleij
2014-09-08 12:15   ` Arnd Bergmann
2014-09-08 12:15     ` Arnd Bergmann
2014-09-08 12:43     ` Linus Walleij
2014-09-08 12:43       ` Linus Walleij
2014-09-08 13:18       ` Arnd Bergmann
2014-09-08 13:18         ` Arnd Bergmann
2014-09-08 11:38 ` [PATCH 7/7 v6] ARM: realview: basic device tree implementation Linus Walleij
2014-09-08 11:38   ` Linus Walleij

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