From: Nishanth Menon <nm@ti.com> To: Daniel Lezcano <daniel.lezcano@linaro.org>, "Shilimkar, Santosh" <santosh.shilimkar@ti.com>, Tony Lindgren <tony@atomide.com>, "Kristo, Tero" <t-kristo@ti.com>, Paul Walmsley <paul@pwsan.com> Cc: "Kevin Hilman" <khilman@deeprootsystems.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "J, KEERTHY" <j-keerthy@ti.com>, "Benoît Cousson" <bcousson@baylibre.com> Subject: Re: [PATCH 08/10] ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support Date: Thu, 18 Sep 2014 08:50:12 -0500 [thread overview] Message-ID: <541AE314.5040107@ti.com> (raw) In-Reply-To: <541AE102.2070407@ti.com> On 09/18/2014 08:41 AM, Nishanth Menon wrote: > On 09/17/2014 07:22 PM, Daniel Lezcano wrote: >> On 09/17/2014 04:20 PM, Shilimkar, Santosh wrote: > [...] >>> Could you try a long run of this little program: >>> >>> https://git.linaro.org/power/pm-qa.git/blob/HEAD:/cpuidle/cpuidle_killer.c >>> >>> [Santosh] I am sure there will not be any issue with the long run test case here. >>> Lets see if Nishant sees anything otherwise >> >> Ok. Make sure the cpu is effectively entering your C2 state with the >> sleep duration in the test program. > > Test kernel: > https://github.com/nmenon/linux-2.6-playground/commits/testing/tmlind-test-suspend-resume > (I decided to merge in various send for pull branches from maintainers > and apply cpuidle on top).. > > Controlled test run as follows on 4 different impacted platforms and 1 > platform as legacy reference. > > What we are looking for is >> cpu1_pwrdm (ON),OFF:0,RET:2677,INA:0,ON:2678,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 > RET:2677 indicated CPU1 hit C2 >> cpu0_pwrdm (ON),OFF:0,RET:2677,INA:0,ON:2678,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 > RET:2677 indicated CPU0 hit C2 >> mpu_pwrdm (ON),OFF:0,RET:2667,INA:0,ON:2668,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:2667,RET-MEMBANK2-OFF:0 > RET:2667 indicates that CPU0 and CPU1 managed to achieve RET together, > else by hardware constraints in place, MPU power domain will fail to > transition. > > What I see in all cases below is that transitions do take place (C2 is > successfully hit). > > Test #1: 120 seconds: > CMD: set -x;uname -a;cat /sys/kernel/debug/pm_debug/count;sleep > 1;./cpuidle_killer_120;sleep 1;cat /sys/kernel/debug/pm_debug/count;set +x > > OMAP4 Panda-ES: (2 a9) - not impacted as part of this patch - just > base test vector > http://fpaste.org/134547/14110454/ > > OMAP5 uEVM: (2 a15) > http://fpaste.org/134546/10454181/ > > DRA74x: (2 a15) > http://fpaste.org/134543/11045286/ > > DRA72: (2 a15) ^^ Correction should have been 1 a15 > http://fpaste.org/134544/11045335/ > > AM572x(DRA74x variant): (2 A15) > http://fpaste.org/134545/10453761/ > > > Test #2: 1200 seconds: (http://fpaste.org/134564/47289141/) > CMD: set -x;uname -a;cat /sys/kernel/debug/pm_debug/count;sleep > 1;./cpuidle_killer_1200;sleep 1;cat > /sys/kernel/debug/pm_debug/count;set +x > > OMAP4 Panda-ES: (2 a9) - not impacted as part of this patch - just > base test vector > http://fpaste.org/134563/41104728/ > > OMAP5 uEVM: (2 a15) > http://fpaste.org/134562/47221141/ > > DRA74x EVM: (2 a15) > http://fpaste.org/134559/11047098/ > > DRA72 EVM: (2 a15) ^^ Correction should have been 1 a15 > http://fpaste.org/134560/11047151/ > > AM572x EVM: (2 A15) > http://fpaste.org/134561/47189141/ > > -- Regards, Nishanth Menon
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From: nm@ti.com (Nishanth Menon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 08/10] ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support Date: Thu, 18 Sep 2014 08:50:12 -0500 [thread overview] Message-ID: <541AE314.5040107@ti.com> (raw) In-Reply-To: <541AE102.2070407@ti.com> On 09/18/2014 08:41 AM, Nishanth Menon wrote: > On 09/17/2014 07:22 PM, Daniel Lezcano wrote: >> On 09/17/2014 04:20 PM, Shilimkar, Santosh wrote: > [...] >>> Could you try a long run of this little program: >>> >>> https://git.linaro.org/power/pm-qa.git/blob/HEAD:/cpuidle/cpuidle_killer.c >>> >>> [Santosh] I am sure there will not be any issue with the long run test case here. >>> Lets see if Nishant sees anything otherwise >> >> Ok. Make sure the cpu is effectively entering your C2 state with the >> sleep duration in the test program. > > Test kernel: > https://github.com/nmenon/linux-2.6-playground/commits/testing/tmlind-test-suspend-resume > (I decided to merge in various send for pull branches from maintainers > and apply cpuidle on top).. > > Controlled test run as follows on 4 different impacted platforms and 1 > platform as legacy reference. > > What we are looking for is >> cpu1_pwrdm (ON),OFF:0,RET:2677,INA:0,ON:2678,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 > RET:2677 indicated CPU1 hit C2 >> cpu0_pwrdm (ON),OFF:0,RET:2677,INA:0,ON:2678,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 > RET:2677 indicated CPU0 hit C2 >> mpu_pwrdm (ON),OFF:0,RET:2667,INA:0,ON:2668,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:2667,RET-MEMBANK2-OFF:0 > RET:2667 indicates that CPU0 and CPU1 managed to achieve RET together, > else by hardware constraints in place, MPU power domain will fail to > transition. > > What I see in all cases below is that transitions do take place (C2 is > successfully hit). > > Test #1: 120 seconds: > CMD: set -x;uname -a;cat /sys/kernel/debug/pm_debug/count;sleep > 1;./cpuidle_killer_120;sleep 1;cat /sys/kernel/debug/pm_debug/count;set +x > > OMAP4 Panda-ES: (2 a9) - not impacted as part of this patch - just > base test vector > http://fpaste.org/134547/14110454/ > > OMAP5 uEVM: (2 a15) > http://fpaste.org/134546/10454181/ > > DRA74x: (2 a15) > http://fpaste.org/134543/11045286/ > > DRA72: (2 a15) ^^ Correction should have been 1 a15 > http://fpaste.org/134544/11045335/ > > AM572x(DRA74x variant): (2 A15) > http://fpaste.org/134545/10453761/ > > > Test #2: 1200 seconds: (http://fpaste.org/134564/47289141/) > CMD: set -x;uname -a;cat /sys/kernel/debug/pm_debug/count;sleep > 1;./cpuidle_killer_1200;sleep 1;cat > /sys/kernel/debug/pm_debug/count;set +x > > OMAP4 Panda-ES: (2 a9) - not impacted as part of this patch - just > base test vector > http://fpaste.org/134563/41104728/ > > OMAP5 uEVM: (2 a15) > http://fpaste.org/134562/47221141/ > > DRA74x EVM: (2 a15) > http://fpaste.org/134559/11047098/ > > DRA72 EVM: (2 a15) ^^ Correction should have been 1 a15 > http://fpaste.org/134560/11047151/ > > AM572x EVM: (2 A15) > http://fpaste.org/134561/47189141/ > > -- Regards, Nishanth Menon
next prev parent reply other threads:[~2014-09-18 13:50 UTC|newest] Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-08-22 14:02 [PATCH 00/10] ARM: OMAP5 / DRA7: Add framework for suspend and cpuidle Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 01/10] ARM: OMAP5 / DRA7: PM: Update CPU context register offset Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 02/10] ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-27 18:44 ` Kevin Hilman 2014-08-27 18:44 ` Kevin Hilman 2014-08-22 14:02 ` [PATCH 03/10] ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 04/10] ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 05/10] ARM: OMAP5 / DRA7: PM: Avoid all SAR saves Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 06/10] ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-27 18:58 ` Kevin Hilman 2014-08-27 18:58 ` Kevin Hilman 2014-08-27 19:05 ` Nishanth Menon 2014-08-27 19:05 ` Nishanth Menon 2014-08-27 19:41 ` Tony Lindgren 2014-08-27 19:41 ` Tony Lindgren 2014-08-27 19:43 ` Santosh Shilimkar 2014-08-27 19:43 ` Santosh Shilimkar 2014-08-27 19:45 ` Nishanth Menon 2014-08-27 19:45 ` Nishanth Menon 2014-09-05 21:15 ` Nishanth Menon 2014-09-05 21:15 ` Nishanth Menon 2014-09-05 21:30 ` Tony Lindgren 2014-09-05 21:30 ` Tony Lindgren 2014-09-08 17:23 ` Grazvydas Ignotas 2014-09-08 17:23 ` Grazvydas Ignotas 2014-09-08 18:34 ` Nishanth Menon 2014-09-08 18:34 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 08/10] ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-27 19:13 ` Kevin Hilman 2014-08-27 19:13 ` Kevin Hilman 2014-08-27 19:35 ` Nishanth Menon 2014-08-27 19:35 ` Nishanth Menon 2014-08-27 19:41 ` Santosh Shilimkar 2014-08-27 19:41 ` Santosh Shilimkar 2014-08-27 20:22 ` Kevin Hilman 2014-08-27 20:22 ` Kevin Hilman 2014-09-05 21:18 ` Nishanth Menon 2014-09-05 21:18 ` Nishanth Menon 2014-09-05 21:18 ` Nishanth Menon 2014-09-16 16:34 ` Nishanth Menon 2014-09-16 16:34 ` Nishanth Menon 2014-09-16 16:34 ` Nishanth Menon 2014-09-17 18:49 ` Daniel Lezcano 2014-09-17 18:49 ` Daniel Lezcano 2014-09-17 18:49 ` Daniel Lezcano 2014-09-17 23:20 ` Shilimkar, Santosh 2014-09-17 23:20 ` Shilimkar, Santosh 2014-09-17 23:20 ` Shilimkar, Santosh 2014-09-18 0:22 ` Daniel Lezcano 2014-09-18 0:22 ` Daniel Lezcano 2014-09-18 0:42 ` Shilimkar, Santosh 2014-09-18 0:42 ` Shilimkar, Santosh 2014-09-18 0:42 ` Shilimkar, Santosh 2014-09-18 13:41 ` Nishanth Menon 2014-09-18 13:41 ` Nishanth Menon 2014-09-18 13:50 ` Nishanth Menon [this message] 2014-09-18 13:50 ` Nishanth Menon 2014-09-22 13:02 ` Nishanth Menon 2014-09-22 13:02 ` Nishanth Menon 2014-09-22 13:17 ` Nishanth Menon 2014-09-22 13:17 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 09/10] ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` [PATCH 10/10] ARM: DRA7: " Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-22 14:02 ` Nishanth Menon 2014-08-25 16:36 ` [PATCH 00/10] ARM: OMAP5 / DRA7: Add framework for suspend and cpuidle Nishanth Menon 2014-08-25 16:36 ` Nishanth Menon 2014-08-27 19:15 ` Kevin Hilman 2014-08-27 19:15 ` Kevin Hilman 2014-09-08 16:29 ` Nishanth Menon 2014-09-08 16:29 ` Nishanth Menon
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