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From: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 15/19] drm/i915: HSW cdclk support
Date: Tue, 14 Apr 2015 13:24:03 +0530	[thread overview]
Message-ID: <552CC79B.4030405@intel.com> (raw)
In-Reply-To: <1428995176.3022.6.camel@sorvi>

Thanks for the confirmation, Mika :). then this change is fine
not sure if it is still relevant but you can add rb if possible

Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>

On 4/14/2015 12:36 PM, Mika Kahola wrote:
> With pink noise you can't tell if the audio is played faster or slower.
>
> I tested this by playing ITU speech codec test sample
>
> aplay --device=plughw:0,7 male.wav
>
> and audio played back on 1x speed.
>
> Cheers,
> Mika
>
> On Tue, 2015-04-14 at 12:27 +0530, Sivakumar Thulasimani wrote:
>> Thanks for the update Mika. The issue will be that audio plays faster or
>> slower than normal. i.e it will be < 1x or > 1x. can you confirm if
>> audible sound plays after CD Clock change at 1x speed ?
>>
>> regards,
>> Sivakumar
>> On 4/14/2015 12:06 PM, Mika Kahola wrote:
>>> I tested this patch with the audio in place. With this setup in my HSW
>>> machine I can hear the pink noise played back with DP-HDMI cable
>>> attatched.
>>>
>>> speaker-test -c 2 -r 48000 -F S16_LE -t pink --device=plughw:0,7
>>>
>>> Cheers,
>>> Mika
>>>
>>> On Tue, 2015-04-07 at 14:06 +0530, Sivakumar Thulasimani wrote:
>>>> where can i check this (audio driver) ? since there was no need for them
>>>> to check CD clock value till now i don't think they will be doing it.
>>>> also this needs to be changed in Display Audio controller, so not sure
>>>> if audio driver has access to it in the first place. will be good to
>>>> confirm this before merging as it will break display audio if it is not
>>>> programmed.
>>>>
>>>> if any one has setup this can be confirmed by just switching CD clock
>>>> after boot and playing an audio file.
>>>>
>>>> regards,
>>>> Sivakumar
>>>>
>>>> On 4/7/2015 1:59 PM, Ville Syrjälä wrote:
>>>>> On Tue, Apr 07, 2015 at 12:33:40PM +0530, Sivakumar Thulasimani wrote:
>>>>>> sorry if i am missing something, HSW and BDW requires display audio
>>>>>> controller to be updated with new values once CD clock is modified. how
>>>>>> is this accomplished here ?
>>>>> I'm hoping the audio driver will query the cdclk frequency after every
>>>>> modeset.
>>>>>
>>>> _______________________________________________
>>>> Intel-gfx mailing list
>>>> Intel-gfx@lists.freedesktop.org
>>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>>
>>>
>
>
>

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  reply	other threads:[~2015-04-14  7:54 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-31 11:05 All sort of cdclk stuff Mika Kahola
2015-03-31 11:09 ` [PATCH 01/19] drm/i915: Return more precise cdclk for gen2/3 Mika Kahola
2015-03-31 13:10   ` Damien Lespiau
2015-03-31 11:09 ` [PATCH 02/19] drm/i915: Fix i855 get_display_clock_speed Mika Kahola
2015-03-31 11:11 ` [PATCH 04/19] drm/i915: Add cdclk extraction for g33, g965gm and g4x Mika Kahola
2015-03-31 11:11 ` [PATCH 05/19] drm/i915: ILK cdclk seems to be 450MHz Mika Kahola
2015-03-31 13:12   ` Damien Lespiau
2015-03-31 11:11 ` [PATCH 06/19] drm/i915: Assume 400MHz cdclk for the rest of gen4-7 Mika Kahola
2015-03-31 13:13   ` Damien Lespiau
2015-03-31 11:11 ` [PATCH 07/19] drm/i915: Simplify ilk_get_aux_clock_divider Mika Kahola
2015-03-31 13:13   ` Damien Lespiau
2015-03-31 11:12 ` [PATCH 08/19] drm/i915: Convert the ddi cdclk code to get_display_clock_speed Mika Kahola
2015-03-31 13:15   ` Damien Lespiau
2015-03-31 13:48     ` Daniel Vetter
2015-03-31 11:14 ` [PATCH 10/19] drm/i915: Cache current cdclk frequency in dev_priv Mika Kahola
2015-03-31 11:14 ` [PATCH 11/19] drm/i915: Use cached cdclk value Mika Kahola
2015-03-31 11:14 ` [PATCH 12/19] drm/i915: Unify ilk and hsw .get_aux_clock_divider Mika Kahola
2015-03-31 11:14 ` [PATCH 13/19] drm/i915: Store max cdclk value in dev_priv Mika Kahola
2015-03-31 11:14 ` [PATCH 14/19] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk Mika Kahola
2015-03-31 11:14 ` [PATCH 15/19] drm/i915: HSW cdclk support Mika Kahola
2015-04-07  6:27   ` Sivakumar Thulasimani
2015-04-07  7:03     ` Sivakumar Thulasimani
2015-04-07  8:29       ` Ville Syrjälä
2015-04-07  8:36         ` Sivakumar Thulasimani
2015-04-07  9:29           ` Mika Kahola
2015-04-07 13:52             ` Daniel Vetter
2015-04-09  7:24               ` Mika Kahola
2015-04-09  9:32                 ` Daniel Vetter
2015-04-09 13:41                   ` Mika Kahola
2015-04-09 13:51                     ` Daniel Vetter
2015-04-09 15:17                       ` Takashi Iwai
2015-04-10 13:27                         ` Mika Kahola
2015-04-10 14:10                           ` Takashi Iwai
2015-04-13  9:43                             ` Mika Kahola
2015-04-13 10:33                               ` Ville Syrjälä
2015-04-14  6:36           ` Mika Kahola
2015-04-14  6:57             ` Sivakumar Thulasimani
2015-04-14  7:06               ` Mika Kahola
2015-04-14  7:54                 ` Sivakumar Thulasimani [this message]
2015-04-07  8:28     ` Ville Syrjälä
2015-03-31 11:14 ` [PATCH 16/19] drm/i915: Add IS_BDW_ULX Mika Kahola
2015-03-31 11:14 ` [PATCH 17/19] drm/i915: BDW clock change support Mika Kahola
2015-03-31 11:14 ` [PATCH 18/19] drm/i915: Limit CHV max cdclk Mika Kahola
2015-03-31 11:14 ` [PATCH 19/19] drm/i915: Modeset global_pipes() update Mika Kahola
2015-03-31 14:45   ` Ville Syrjälä
2015-04-02  9:17     ` Mika Kahola
2015-04-02 10:05   ` Mika Kahola
2015-04-02 10:16     ` Ville Syrjälä
2015-04-07  9:36     ` Mika Kahola
2015-03-31 13:18 ` All sort of cdclk stuff Damien Lespiau

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