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From: Florian Fainelli <fainelli@broadcom.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Florian Fainelli <f.fainelli@gmail.com>
Cc: Brian Norris <computersforpeace@gmail.com>,
	Gregory Fong <gregory.0xf0@gmail.com>,
	<bcm-kernel-feedback-list@broadcom.com>,
	<linux-kernel@vger.kernel.org>, <linux-mips@linux-mips.org>,
	Kevin Cernekee <cernekee@gmail.com>,
	Jason Cooper <jason@lakedaemon.net>
Subject: Re: [PATCH 1/2] genirq: add chip_{suspend,resume} PM support to irq_chip
Date: Tue, 21 Jul 2015 14:26:52 -0700	[thread overview]
Message-ID: <55AEB91C.1020202@broadcom.com> (raw)
In-Reply-To: <alpine.DEB.2.11.1507212316530.18576@nanos>

On 21/07/15 14:23, Thomas Gleixner wrote:
> On Tue, 21 Jul 2015, Florian Fainelli wrote:
>> On 20/06/15 07:11, Thomas Gleixner wrote:
>>> On Fri, 19 Jun 2015, Brian Norris wrote:
>>>> This patch adds a second set of suspend/resume hooks to irq_chip, this
>>>> time to represent *chip* suspend/resume, rather than IRQ suspend/resume.
>>>> These callbacks will always be called for an irqchip and are based on
>>>> the per-chip irq_chip_generic struct, rather than the per-IRQ irq_data
>>>> struct.
>>>
>>> There is no per-chip irq_chip_generic struct. It's only there if the
>>> irq chip has been instantiated as a generic chip.
>>>  
>>>>  /**
>>>>   * struct irq_chip - hardware interrupt chip descriptor
>>>>   *
>>>> @@ -317,6 +319,12 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>   * @irq_suspend:	function called from core code on suspend once per chip
>>>>   * @irq_resume:		function called from core code on resume once per chip
>>>>   * @irq_pm_shutdown:	function called from core code on shutdown once per chip
>>>> + * @chip_suspend:	function called from core code on suspend once per
>>>> + *			chip; for handling chip details even when no interrupts
>>>> + *			are in use
>>>> + * @chip_resume:	function called from core code on resume once per chip;
>>>> + *			for handling chip details even when no interrupts are
>>>> + *			in use
>>>>   * @irq_calc_mask:	Optional function to set irq_data.mask for special cases
>>>>   * @irq_print_chip:	optional to print special chip info in show_interrupts
>>>>   * @irq_request_resources:	optional to request resources before calling
>>>> @@ -357,6 +365,8 @@ struct irq_chip {
>>>>  	void		(*irq_suspend)(struct irq_data *data);
>>>>  	void		(*irq_resume)(struct irq_data *data);
>>>>  	void		(*irq_pm_shutdown)(struct irq_data *data);
>>>> +	void		(*chip_suspend)(struct irq_chip_generic *gc);
>>>> +	void		(*chip_resume)(struct irq_chip_generic *gc);
>>>
>>> I really don't want to set a precedent for random (*foo)(*bar)
>>> callbacks.
>>>  
>>>> +
>>>> +		if (ct->chip.chip_suspend)
>>>> +			ct->chip.chip_suspend(gc);
>>>
>>> So wouldn't it be the more intuitive solution to make this a callback
>>> in the struct gc itself?
>>
>> Brian can correct me, but his approach is more generic, if there is
>> another irqchip driver needing a similar infrastructure, this would be
>> already there, and directly usable.
> 
> No it's not directly usable. It's only usable with irq_chip_generic
> incarnations.
> 
>> Maybe all we need to is to change the chip_suspend/resume arguments
>> to pass a reference to irq_chip instead?
> 
> I just read back on the problem report which was mentioned in the
> changelog:
> 
> "It's not a problem with patch 7, exactly, it's a problem with the
>  irqchip driver which handles the UART interrupt mask (irq-bcm7120-l2.c).
>  The problem is that with a trimmed down device tree (such as the one
>  found at arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb), none of the child
>  interrupts of the 'irq0_intc' node are described -- we don't have device
>  tree nodes for them yet -- but we still require saving and restoring the
>  forwarding mask (see 'brcm,int-fwd-mask') in order for the UART
>  interrupts to continue operating."
> 
> So you are trying to work around a flaw in the device tree by adding
> random callbacks to the core kernel?

Not quite, you could have your interrupt controller node declared in
Device Tree, but have no "interrupts" property referencing it because:

- the hardware is just not there, but you inherit a common Device Tree
skleten (*.dtsi)
- you could have Device Tree overlays which may or may not be loaded as
a result of finding expansion boards etc...

It just appeared that Brian was specifically testing with something that
exposed the problem.
-- 
Florian

WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <fainelli@broadcom.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Florian Fainelli <f.fainelli@gmail.com>
Cc: Brian Norris <computersforpeace@gmail.com>,
	Gregory Fong <gregory.0xf0@gmail.com>,
	bcm-kernel-feedback-list@broadcom.com,
	linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
	Kevin Cernekee <cernekee@gmail.com>,
	Jason Cooper <jason@lakedaemon.net>
Subject: Re: [PATCH 1/2] genirq: add chip_{suspend,resume} PM support to irq_chip
Date: Tue, 21 Jul 2015 14:26:52 -0700	[thread overview]
Message-ID: <55AEB91C.1020202@broadcom.com> (raw)
Message-ID: <20150721212652._ZjEBBiT0z3pNF2BNHqEQ_OZggoa5o6VNuh0lACfizI@z> (raw)
In-Reply-To: <alpine.DEB.2.11.1507212316530.18576@nanos>

On 21/07/15 14:23, Thomas Gleixner wrote:
> On Tue, 21 Jul 2015, Florian Fainelli wrote:
>> On 20/06/15 07:11, Thomas Gleixner wrote:
>>> On Fri, 19 Jun 2015, Brian Norris wrote:
>>>> This patch adds a second set of suspend/resume hooks to irq_chip, this
>>>> time to represent *chip* suspend/resume, rather than IRQ suspend/resume.
>>>> These callbacks will always be called for an irqchip and are based on
>>>> the per-chip irq_chip_generic struct, rather than the per-IRQ irq_data
>>>> struct.
>>>
>>> There is no per-chip irq_chip_generic struct. It's only there if the
>>> irq chip has been instantiated as a generic chip.
>>>  
>>>>  /**
>>>>   * struct irq_chip - hardware interrupt chip descriptor
>>>>   *
>>>> @@ -317,6 +319,12 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>   * @irq_suspend:	function called from core code on suspend once per chip
>>>>   * @irq_resume:		function called from core code on resume once per chip
>>>>   * @irq_pm_shutdown:	function called from core code on shutdown once per chip
>>>> + * @chip_suspend:	function called from core code on suspend once per
>>>> + *			chip; for handling chip details even when no interrupts
>>>> + *			are in use
>>>> + * @chip_resume:	function called from core code on resume once per chip;
>>>> + *			for handling chip details even when no interrupts are
>>>> + *			in use
>>>>   * @irq_calc_mask:	Optional function to set irq_data.mask for special cases
>>>>   * @irq_print_chip:	optional to print special chip info in show_interrupts
>>>>   * @irq_request_resources:	optional to request resources before calling
>>>> @@ -357,6 +365,8 @@ struct irq_chip {
>>>>  	void		(*irq_suspend)(struct irq_data *data);
>>>>  	void		(*irq_resume)(struct irq_data *data);
>>>>  	void		(*irq_pm_shutdown)(struct irq_data *data);
>>>> +	void		(*chip_suspend)(struct irq_chip_generic *gc);
>>>> +	void		(*chip_resume)(struct irq_chip_generic *gc);
>>>
>>> I really don't want to set a precedent for random (*foo)(*bar)
>>> callbacks.
>>>  
>>>> +
>>>> +		if (ct->chip.chip_suspend)
>>>> +			ct->chip.chip_suspend(gc);
>>>
>>> So wouldn't it be the more intuitive solution to make this a callback
>>> in the struct gc itself?
>>
>> Brian can correct me, but his approach is more generic, if there is
>> another irqchip driver needing a similar infrastructure, this would be
>> already there, and directly usable.
> 
> No it's not directly usable. It's only usable with irq_chip_generic
> incarnations.
> 
>> Maybe all we need to is to change the chip_suspend/resume arguments
>> to pass a reference to irq_chip instead?
> 
> I just read back on the problem report which was mentioned in the
> changelog:
> 
> "It's not a problem with patch 7, exactly, it's a problem with the
>  irqchip driver which handles the UART interrupt mask (irq-bcm7120-l2.c).
>  The problem is that with a trimmed down device tree (such as the one
>  found at arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb), none of the child
>  interrupts of the 'irq0_intc' node are described -- we don't have device
>  tree nodes for them yet -- but we still require saving and restoring the
>  forwarding mask (see 'brcm,int-fwd-mask') in order for the UART
>  interrupts to continue operating."
> 
> So you are trying to work around a flaw in the device tree by adding
> random callbacks to the core kernel?

Not quite, you could have your interrupt controller node declared in
Device Tree, but have no "interrupts" property referencing it because:

- the hardware is just not there, but you inherit a common Device Tree
skleten (*.dtsi)
- you could have Device Tree overlays which may or may not be loaded as
a result of finding expansion boards etc...

It just appeared that Brian was specifically testing with something that
exposed the problem.
-- 
Florian

  reply	other threads:[~2015-07-21 21:28 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-19  0:11 [PATCH 0/7] soc: brcmstb: add system suspend support for STB SoCs Brian Norris
2015-06-19  0:11 ` Brian Norris
2015-06-19  0:11 ` Brian Norris
2015-06-19  0:11 ` [PATCH 1/7] Documentation: dt: brcmstb: add system PM bindings Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-09-12 19:58   ` Florian Fainelli
2015-09-12 19:58     ` Florian Fainelli
2015-09-12 19:58     ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 2/7] Documentation: dt: brcmstb: add waketimer documentation Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-06-19  2:09   ` Gregory Fong
2015-06-19  2:09     ` Gregory Fong
2015-06-19  2:09     ` Gregory Fong
2015-09-12 19:58   ` Florian Fainelli
2015-09-12 19:58     ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 3/7] soc: add stubs for brcmstb SoC's Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-09-12 20:16   ` Florian Fainelli
2015-09-12 20:16     ` Florian Fainelli
2015-09-12 20:16     ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 4/7] soc: brcmstb: add PM suspend/resume support (S2/S3/S5) Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-09-12 20:23   ` Florian Fainelli
2015-09-12 20:23     ` Florian Fainelli
2015-09-12 20:23     ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 5/7] soc: brcmstb: add wake-timer driver Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-06-19  2:20   ` Gregory Fong
2015-06-19  2:20     ` Gregory Fong
2015-06-19  2:20     ` Gregory Fong
2015-06-19 17:36     ` Brian Norris
2015-06-19 17:36       ` Brian Norris
2015-06-19 17:36       ` Brian Norris
2015-09-12 20:00   ` Florian Fainelli
2015-09-12 20:00     ` Florian Fainelli
2015-09-12 20:00     ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 6/7] ARM: brcmstb: mask GIC IRQs on suspend Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-06-19  1:48   ` Gregory Fong
2015-06-19  1:48     ` Gregory Fong
2015-06-19  1:48     ` Gregory Fong
2015-09-12 19:53   ` Florian Fainelli
2015-09-12 19:53     ` Florian Fainelli
2015-09-12 19:53     ` Florian Fainelli
2015-09-14 17:29     ` Brian Norris
2015-09-14 17:29       ` Brian Norris
2015-09-14 17:29       ` Brian Norris
2015-09-14 17:42     ` Brian Norris
2015-09-14 17:42       ` Brian Norris
2015-09-14 17:42       ` Brian Norris
2015-09-14 17:43       ` Florian Fainelli
2015-09-14 17:43         ` Florian Fainelli
2015-09-14 17:43         ` Florian Fainelli
2015-06-19  0:11 ` [PATCH 7/7] ARM: dts: brcmstb: add BCM7445 system PM DT nodes Brian Norris
2015-06-19  0:11   ` Brian Norris
2015-09-12 19:58   ` Florian Fainelli
2015-09-12 19:58     ` Florian Fainelli
2015-09-12 19:58     ` Florian Fainelli
2015-06-19  3:20 ` [PATCH 0/7] soc: brcmstb: add system suspend support for STB SoCs Gregory Fong
2015-06-19  3:20   ` Gregory Fong
2015-06-19  3:20   ` Gregory Fong
2015-06-19 22:41   ` Brian Norris
2015-06-19 22:41     ` Brian Norris
2015-06-19 22:41     ` Brian Norris
2015-06-19 22:55     ` Brian Norris
2015-06-19 22:55       ` Brian Norris
2015-06-19 22:55       ` Brian Norris
2015-06-19 23:26     ` [PATCH 1/2] genirq: add chip_{suspend,resume} PM support to irq_chip Brian Norris
2015-06-19 23:26       ` Brian Norris
2015-06-19 23:26       ` Brian Norris
2015-06-19 23:26       ` [PATCH 2/2] IRQCHIP: bcm7120-l2: perform suspend/resume even without installed child IRQs Brian Norris
2015-06-19 23:26         ` Brian Norris
2015-06-19 23:26         ` Brian Norris
2015-06-19 23:39         ` Florian Fainelli
2015-06-19 23:39           ` Florian Fainelli
2015-06-19 23:38       ` [PATCH 1/2] genirq: add chip_{suspend,resume} PM support to irq_chip Florian Fainelli
2015-06-19 23:38         ` Florian Fainelli
2015-06-20 14:11       ` Thomas Gleixner
2015-06-20 14:11         ` Thomas Gleixner
2015-07-21 18:24         ` Florian Fainelli
2015-07-21 21:23           ` Thomas Gleixner
2015-07-21 21:26             ` Florian Fainelli [this message]
2015-07-21 21:26               ` Florian Fainelli
2015-07-21 21:58               ` Thomas Gleixner
2015-07-22 23:28                 ` Brian Norris
2015-07-21 21:36           ` Brian Norris
2015-07-22 23:21       ` [PATCH v2 " Brian Norris
2015-07-22 23:21         ` [PATCH v2 2/2] IRQCHIP: bcm7120-l2: perform suspend/resume even without installed child IRQs Brian Norris
2015-07-27  6:15           ` [tip:irq/core] irqchip/bcm7120-l2: Perform suspend/ resume " tip-bot for Brian Norris
2015-07-27  6:14         ` [tip:irq/core] genirq: Add chip_[suspend|resume] PM support to irq_chip tip-bot for Brian Norris
2015-06-22 19:47 ` [PATCH 0/7] soc: brcmstb: add system suspend support for STB SoCs Brian Norris
2015-06-22 19:47   ` Brian Norris
2015-06-22 19:47   ` Brian Norris
2015-06-24  4:47   ` Florian Fainelli
2015-06-24  4:47     ` Florian Fainelli

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