[Qemu-devel] [PATCH v5 0/6] Connect the SPI devices to ZynqMP

[Qemu-devel] [PATCH v5 0/6] Connect the SPI devices to ZynqMP

[Alistair Francis]

Connect the SPI devices to Xilinx's ZynqMP.

I also need to make some changes to the actual SPI device to
imporove the fuctionality, but for the time being this works.

V5:
 - Fix a typo
 - Use a qdev API to rename the SPI bus
V4:
 - Rebase
 - Rename the SPI busses so that they can all be accessed from the SoC
 - Only create one SPI flash device
V3:
 - Don't reach into the SoC to get the SPI Bus
V2:
 - Connect the SPI flash in the board code
 - Update git patches to properly indicate rename
 - Add sst25wf080 as a SPI flash


Alistair Francis (6):
  m25p80.c: Add sst25wf080 SPI flash device
  ssi: Move ssi.h into a separate directory
  xilinx_spips: Separate the state struct into a header
  qdev: Add a function to rename busses
  xlnx-zynqmp: Connect the SPI devices
  xlnx-ep108: Connect the SPI Flash

 hw/arm/pxa2xx.c                     |  2 +-
 hw/arm/spitz.c                      |  2 +-
 hw/arm/stellaris.c                  |  2 +-
 hw/arm/strongarm.c                  |  2 +-
 hw/arm/tosa.c                       |  2 +-
 hw/arm/xilinx_zynq.c                |  2 +-
 hw/arm/xlnx-ep108.c                 | 16 +++++++++
 hw/arm/xlnx-zynqmp.c                | 38 ++++++++++++++++++++
 hw/arm/z2.c                         |  2 +-
 hw/block/m25p80.c                   |  3 +-
 hw/core/qdev.c                      |  5 +++
 hw/display/ads7846.c                |  2 +-
 hw/display/ssd0323.c                |  2 +-
 hw/microblaze/petalogix_ml605_mmu.c |  2 +-
 hw/misc/max111x.c                   |  2 +-
 hw/sd/ssi-sd.c                      |  2 +-
 hw/ssi/pl022.c                      |  2 +-
 hw/ssi/ssi.c                        |  2 +-
 hw/ssi/xilinx_spi.c                 |  2 +-
 hw/ssi/xilinx_spips.c               | 48 +++----------------------
 include/hw/arm/xlnx-zynqmp.h        |  3 ++
 include/hw/qdev-core.h              |  2 ++
 include/hw/{ => ssi}/ssi.h          | 10 +++---
 include/hw/ssi/xilinx_spips.h       | 72 +++++++++++++++++++++++++++++++++++++
 24 files changed, 164 insertions(+), 63 deletions(-)
 rename include/hw/{ => ssi}/ssi.h (96%)
 create mode 100644 include/hw/ssi/xilinx_spips.h

-- 
2.5.0

[Qemu-devel] [PATCH v5 1/6] m25p80.c: Add sst25wf080 SPI flash device

[Alistair Francis]

Add the sst25wf080 SPI flash device.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
---

 hw/block/m25p80.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index efc43dd..7b9f97c 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -163,6 +163,7 @@ static const FlashPartInfo known_devices[] = {
     { INFO("sst25wf010",  0xbf2502,      0,  64 << 10,   2, ER_4K) },
     { INFO("sst25wf020",  0xbf2503,      0,  64 << 10,   4, ER_4K) },
     { INFO("sst25wf040",  0xbf2504,      0,  64 << 10,   8, ER_4K) },
+    { INFO("sst25wf080",  0xbf2505,      0,  64 << 10,  16, ER_4K) },
 
     /* ST Microelectronics -- newer production may have feature updates */
     { INFO("m25p05",      0x202010,      0,  32 << 10,   2, 0) },
-- 
2.5.0

[Qemu-devel] [PATCH v5 2/6] ssi: Move ssi.h into a separate directory

[Alistair Francis]

Move the ssi.h include file into the ssi directory.

While touching the code also fix the typdef lines as
checkpatch complains.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
---
V2:
 - Change git patch to indicate rename

 hw/arm/pxa2xx.c                     |  2 +-
 hw/arm/spitz.c                      |  2 +-
 hw/arm/stellaris.c                  |  2 +-
 hw/arm/strongarm.c                  |  2 +-
 hw/arm/tosa.c                       |  2 +-
 hw/arm/xilinx_zynq.c                |  2 +-
 hw/arm/z2.c                         |  2 +-
 hw/block/m25p80.c                   |  2 +-
 hw/display/ads7846.c                |  2 +-
 hw/display/ssd0323.c                |  2 +-
 hw/microblaze/petalogix_ml605_mmu.c |  2 +-
 hw/misc/max111x.c                   |  2 +-
 hw/sd/ssi-sd.c                      |  2 +-
 hw/ssi/pl022.c                      |  2 +-
 hw/ssi/ssi.c                        |  2 +-
 hw/ssi/xilinx_spi.c                 |  2 +-
 hw/ssi/xilinx_spips.c               |  2 +-
 include/hw/{ => ssi}/ssi.h          | 10 ++++++----
 18 files changed, 23 insertions(+), 21 deletions(-)
 rename include/hw/{ => ssi}/ssi.h (96%)

diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 79d22d9..54bf152 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -12,7 +12,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/char/serial.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "sysemu/char.h"
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 8d3cc0b..ee8f889 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -16,7 +16,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/pcmcia.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/block/flash.h"
 #include "qemu/timer.h"
 #include "hw/devices.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 0114e0a..4e5cfd1 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -8,7 +8,7 @@
  */
 
 #include "hw/sysbus.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/arm/arm.h"
 #include "hw/devices.h"
 #include "qemu/timer.h"
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 9624ecb..4d2ba02 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -34,7 +34,7 @@
 #include "hw/arm/arm.h"
 #include "sysemu/char.h"
 #include "sysemu/sysemu.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 //#define DEBUG
 
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 02814d7..68ad01e 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -19,7 +19,7 @@
 #include "hw/pcmcia.h"
 #include "hw/boards.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "sysemu/block-backend.h"
 #include "hw/sysbus.h"
 #include "exec/address-spaces.h"
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1c1a445..11a349b 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -25,7 +25,7 @@
 #include "sysemu/block-backend.h"
 #include "hw/loader.h"
 #include "hw/misc/zynq-xadc.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "qemu/error-report.h"
 
 #define NUM_SPI_FLASHES 4
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index b44eb76..c82fe2c 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -16,7 +16,7 @@
 #include "hw/arm/arm.h"
 #include "hw/devices.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/boards.h"
 #include "sysemu/sysemu.h"
 #include "hw/block/flash.h"
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 7b9f97c..addd907 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -24,7 +24,7 @@
 #include "hw/hw.h"
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #ifndef M25P80_ERR_DEBUG
 #define M25P80_ERR_DEBUG 0
diff --git a/hw/display/ads7846.c b/hw/display/ads7846.c
index 3f35369..cb82317 100644
--- a/hw/display/ads7846.c
+++ b/hw/display/ads7846.c
@@ -10,7 +10,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "ui/console.h"
 
 typedef struct {
diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c
index 9727007..7545da8 100644
--- a/hw/display/ssd0323.c
+++ b/hw/display/ssd0323.c
@@ -10,7 +10,7 @@
 /* The controller can support a variety of different displays, but we only
    implement one.  Most of the commends relating to brightness and geometry
    setup are ignored. */
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "ui/console.h"
 
 //#define DEBUG_SSD0323 1
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 462060f..5366cec 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -35,7 +35,7 @@
 #include "sysemu/block-backend.h"
 #include "hw/char/serial.h"
 #include "exec/address-spaces.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #include "boot.h"
 
diff --git a/hw/misc/max111x.c b/hw/misc/max111x.c
index bef3651..d619d61 100644
--- a/hw/misc/max111x.c
+++ b/hw/misc/max111x.c
@@ -10,7 +10,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 typedef struct {
     SSISlave parent_obj;
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index c49ff62..eeb96b9 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -12,7 +12,7 @@
 
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/sd/sd.h"
 
 //#define DEBUG_SSI_SD 1
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index 61d568f..0bbf633 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -8,7 +8,7 @@
  */
 
 #include "hw/sysbus.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 //#define DEBUG_PL022 1
 
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index 2aab79b..a0f57c0 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -12,7 +12,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 struct SSIBus {
     BusState parent_obj;
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index 620573c..94bb2a7 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -29,7 +29,7 @@
 #include "qemu/log.h"
 #include "qemu/fifo8.h"
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #ifdef XILINX_SPI_ERR_DEBUG
 #define DB_PRINT(...) do { \
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 0910f54..e9471ff 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -27,7 +27,7 @@
 #include "hw/ptimer.h"
 #include "qemu/log.h"
 #include "qemu/fifo8.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "qemu/bitops.h"
 
 #ifndef XILINX_SPIPS_ERR_DEBUG
diff --git a/include/hw/ssi.h b/include/hw/ssi/ssi.h
similarity index 96%
rename from include/hw/ssi.h
rename to include/hw/ssi/ssi.h
index df0f838..4a0a539 100644
--- a/include/hw/ssi.h
+++ b/include/hw/ssi/ssi.h
@@ -14,6 +14,8 @@
 #include "hw/qdev.h"
 
 typedef struct SSISlave SSISlave;
+typedef struct SSISlaveClass SSISlaveClass;
+typedef enum SSICSMode SSICSMode;
 
 #define TYPE_SSI_SLAVE "ssi-slave"
 #define SSI_SLAVE(obj) \
@@ -25,14 +27,14 @@ typedef struct SSISlave SSISlave;
 
 #define SSI_GPIO_CS "ssi-gpio-cs"
 
-typedef enum {
+enum SSICSMode {
     SSI_CS_NONE = 0,
     SSI_CS_LOW,
     SSI_CS_HIGH,
-} SSICSMode;
+};
 
 /* Slave devices.  */
-typedef struct SSISlaveClass {
+struct SSISlaveClass {
     DeviceClass parent_class;
 
     int (*init)(SSISlave *dev);
@@ -55,7 +57,7 @@ typedef struct SSISlaveClass {
      * always be called for the device for every txrx access to the parent bus
      */
     uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
-} SSISlaveClass;
+};
 
 struct SSISlave {
     DeviceState parent_obj;
-- 
2.5.0

[Qemu-devel] [PATCH v5 3/6] xilinx_spips: Separate the state struct into a header

[Alistair Francis]

Separate out the XilinxSPIPS struct into a separate header
file.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V5:
 - Fix typos
V4:
 - Don't split off R_MOD_ID and hardcode R_MAX
V2:
 - Only split out required #defines
 - Prefix XLNX_SPIPS_

 hw/ssi/xilinx_spips.c         | 46 +++------------------------
 include/hw/ssi/xilinx_spips.h | 72 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 76 insertions(+), 42 deletions(-)
 create mode 100644 include/hw/ssi/xilinx_spips.h

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index e9471ff..2111719 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -29,6 +29,7 @@
 #include "qemu/fifo8.h"
 #include "hw/ssi/ssi.h"
 #include "qemu/bitops.h"
+#include "hw/ssi/xilinx_spips.h"
 
 #ifndef XILINX_SPIPS_ERR_DEBUG
 #define XILINX_SPIPS_ERR_DEBUG 0
@@ -103,8 +104,6 @@
 
 #define R_MOD_ID            (0xFC / 4)
 
-#define R_MAX (R_MOD_ID+1)
-
 /* size of TXRX FIFOs */
 #define RXFF_A          32
 #define TXFF_A          32
@@ -135,30 +134,6 @@ typedef enum {
 } FlashCMD;
 
 typedef struct {
-    SysBusDevice parent_obj;
-
-    MemoryRegion iomem;
-    MemoryRegion mmlqspi;
-
-    qemu_irq irq;
-    int irqline;
-
-    uint8_t num_cs;
-    uint8_t num_busses;
-
-    uint8_t snoop_state;
-    qemu_irq *cs_lines;
-    SSIBus **spi;
-
-    Fifo8 rx_fifo;
-    Fifo8 tx_fifo;
-
-    uint8_t num_txrx_bytes;
-
-    uint32_t regs[R_MAX];
-} XilinxSPIPS;
-
-typedef struct {
     XilinxSPIPS parent_obj;
 
     uint8_t lqspi_buf[LQSPI_CACHE_SIZE];
@@ -174,19 +149,6 @@ typedef struct XilinxSPIPSClass {
     uint32_t tx_fifo_size;
 } XilinxSPIPSClass;
 
-#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
-#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
-
-#define XILINX_SPIPS(obj) \
-     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
-#define XILINX_SPIPS_CLASS(klass) \
-     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
-#define XILINX_SPIPS_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
-
-#define XILINX_QSPIPS(obj) \
-     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
-
 static inline int num_effective_busses(XilinxSPIPS *s)
 {
     return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS &&
@@ -257,7 +219,7 @@ static void xilinx_spips_reset(DeviceState *d)
     XilinxSPIPS *s = XILINX_SPIPS(d);
 
     int i;
-    for (i = 0; i < R_MAX; i++) {
+    for (i = 0; i < XLNX_SPIPS_R_MAX; i++) {
         s->regs[i] = 0;
     }
 
@@ -664,7 +626,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
     }
 
     memory_region_init_io(&s->iomem, OBJECT(s), xsc->reg_ops, s,
-                          "spi", R_MAX*4);
+                          "spi", XLNX_SPIPS_R_MAX*4);
     sysbus_init_mmio(sbd, &s->iomem);
 
     s->irqline = -1;
@@ -708,7 +670,7 @@ static const VMStateDescription vmstate_xilinx_spips = {
     .fields = (VMStateField[]) {
         VMSTATE_FIFO8(tx_fifo, XilinxSPIPS),
         VMSTATE_FIFO8(rx_fifo, XilinxSPIPS),
-        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, R_MAX),
+        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, XLNX_SPIPS_R_MAX),
         VMSTATE_UINT8(snoop_state, XilinxSPIPS),
         VMSTATE_END_OF_LIST()
     }
diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h
new file mode 100644
index 0000000..dbb9eef
--- /dev/null
+++ b/include/hw/ssi/xilinx_spips.h
@@ -0,0 +1,72 @@
+/*
+ * Header file for the Xilinx Zynq SPI controller
+ *
+ * Copyright (C) 2015 Xilinx Inc
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef XLNX_SPIPS_H
+#define XLNX_SPIPS_H
+
+#include "hw/ssi/ssi.h"
+#include "qemu/fifo8.h"
+
+typedef struct XilinxSPIPS XilinxSPIPS;
+
+#define XLNX_SPIPS_R_MAX        (0x100 / 4)
+
+struct XilinxSPIPS {
+    SysBusDevice parent_obj;
+
+    MemoryRegion iomem;
+    MemoryRegion mmlqspi;
+
+    qemu_irq irq;
+    int irqline;
+
+    uint8_t num_cs;
+    uint8_t num_busses;
+
+    uint8_t snoop_state;
+    qemu_irq *cs_lines;
+    SSIBus **spi;
+
+    Fifo8 rx_fifo;
+    Fifo8 tx_fifo;
+
+    uint8_t num_txrx_bytes;
+
+    uint32_t regs[XLNX_SPIPS_R_MAX];
+};
+
+#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
+#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
+
+#define XILINX_SPIPS(obj) \
+     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_CLASS(klass) \
+     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_GET_CLASS(obj) \
+     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
+
+#define XILINX_QSPIPS(obj) \
+     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
+
+#endif /* XLNX_SPIPS_H */
-- 
2.5.0

[Qemu-devel] [PATCH v5 4/6] qdev: Add a function to rename busses

[Alistair Francis]

Add a function which can be used to rename busses.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

 hw/core/qdev.c         | 5 +++++
 include/hw/qdev-core.h | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index b3ad467..29a3e9d 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -590,6 +590,11 @@ BusState *qdev_get_child_bus(DeviceState *dev, const char *name)
     return NULL;
 }
 
+void qdev_bus_rename(BusState *bus, const char *name)
+{
+        memcpy((char *) bus->name, name, strlen(name) * sizeof(char));
+}
+
 int qbus_walk_children(BusState *bus,
                        qdev_walkerfn *pre_devfn, qbus_walkerfn *pre_busfn,
                        qdev_walkerfn *post_devfn, qbus_walkerfn *post_busfn,
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index c537969..9653f4d 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -297,6 +297,8 @@ qemu_irq qdev_intercept_gpio_out(DeviceState *dev, qemu_irq icpt,
 
 BusState *qdev_get_child_bus(DeviceState *dev, const char *name);
 
+void qdev_bus_rename(BusState *bus, const char *name);
+
 /*** Device API.  ***/
 
 /* Register device properties.  */
-- 
2.5.0

[Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Alistair Francis]

Connect the Xilinx SPI devices to the ZynqMP model.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V5:
 - Use the bus renaming function
V4:
 - Rename the SPI busses so that they can all be accessed from the SoC
 - Don't set the num-busses property
V3:
 - Expose the SPI Bus as part of the SoC device
V2:
 - Don't connect the SPI flash to the SoC

 hw/arm/xlnx-zynqmp.c         | 38 ++++++++++++++++++++++++++++++++++++++
 include/hw/arm/xlnx-zynqmp.h |  3 +++
 2 files changed, 41 insertions(+)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 87553bb..bce935d 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -56,6 +56,14 @@ static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
     48, 49,
 };
 
+static const uint64_t spi_addr[XLNX_ZYNQMP_NUM_SPIS] = {
+    0xFF040000, 0xFF050000,
+};
+
+static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = {
+    19, 20,
+};
+
 typedef struct XlnxZynqMPGICRegion {
     int region_index;
     uint32_t address;
@@ -112,6 +120,12 @@ static void xlnx_zynqmp_init(Object *obj)
         qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
                             sysbus_get_default());
     }
+
+    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+        object_initialize(&s->spi[i], sizeof(s->spi[i]),
+                          TYPE_XILINX_SPIPS);
+        qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
+    }
 }
 
 static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -286,6 +300,30 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
         sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
                            gic_spi[sdhci_intr[i]]);
     }
+
+    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+        BusState *spi_bus;
+        char bus_name[6];
+
+        object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
+
+        sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
+                           gic_spi[spi_intr[i]]);
+
+        /* Rename each SPI bus after the SPI device to allow the board
+         * to access all of the busses from the SoC.
+         */
+        spi_bus = qdev_get_child_bus(DEVICE(&s->spi[i]), "spi0");
+        snprintf(bus_name, 6, "spi%d", i);
+        qdev_bus_rename(spi_bus, bus_name);
+
+        /* Add the SPI buses to the SoC child bus */
+        /* FIXME: This causes the later buses to be duplicated in
+         * the SPI devices printout when running qtre.
+         */
+        QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);
+    }
 }
 
 static Property xlnx_zynqmp_props[] = {
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index d116092..f598a43 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -25,6 +25,7 @@
 #include "hw/ide/pci.h"
 #include "hw/ide/ahci.h"
 #include "hw/sd/sdhci.h"
+#include "hw/ssi/xilinx_spips.h"
 
 #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
 #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
@@ -35,6 +36,7 @@
 #define XLNX_ZYNQMP_NUM_GEMS 4
 #define XLNX_ZYNQMP_NUM_UARTS 2
 #define XLNX_ZYNQMP_NUM_SDHCI 2
+#define XLNX_ZYNQMP_NUM_SPIS 2
 
 #define XLNX_ZYNQMP_NUM_OCM_BANKS 4
 #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
@@ -66,6 +68,7 @@ typedef struct XlnxZynqMPState {
     CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
     SysbusAHCIState sata;
     SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
+    XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
 
     char *boot_cpu;
     ARMCPU *boot_cpu_ptr;
-- 
2.5.0

[Qemu-devel] [PATCH v5 6/6] xlnx-ep108: Connect the SPI Flash

[Alistair Francis]

Connect the sst25wf080 SPI flash to the EP108 board.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V4:
 - Only add one SPI flash
V3:
 - Don't reach into the SoC
V2:
 - Use sst25wf080 instead of m25p80

 hw/arm/xlnx-ep108.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
index 85b978f..d1912aa 100644
--- a/hw/arm/xlnx-ep108.c
+++ b/hw/arm/xlnx-ep108.c
@@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
 static void xlnx_ep108_init(MachineState *machine)
 {
     XlnxEP108 *s = g_new0(XlnxEP108, 1);
+    int i;
     Error *err = NULL;
 
     object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
@@ -60,6 +61,21 @@ static void xlnx_ep108_init(MachineState *machine)
                                          machine->ram_size);
     memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
 
+    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+        SSIBus *spi_bus;
+        DeviceState *flash_dev;
+        qemu_irq cs_line;
+        char bus_name[6];
+
+        snprintf(bus_name, 6, "spi%d", i);
+        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
+
+        flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
+        cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
+
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
+    }
+
     xlnx_ep108_binfo.ram_size = machine->ram_size;
     xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
     xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
-- 
2.5.0

Re: [Qemu-devel] [PATCH v5 4/6] qdev: Add a function to rename busses

[Peter Crosthwaite]

On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> Add a function which can be used to rename busses.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
>
>  hw/core/qdev.c         | 5 +++++
>  include/hw/qdev-core.h | 2 ++
>  2 files changed, 7 insertions(+)
>
> diff --git a/hw/core/qdev.c b/hw/core/qdev.c
> index b3ad467..29a3e9d 100644
> --- a/hw/core/qdev.c
> +++ b/hw/core/qdev.c
> @@ -590,6 +590,11 @@ BusState *qdev_get_child_bus(DeviceState *dev, const char *name)
>      return NULL;
>  }
>
> +void qdev_bus_rename(BusState *bus, const char *name)
> +{
> +        memcpy((char *) bus->name, name, strlen(name) * sizeof(char));

sizeof(char) not needed, but wont this assume the current name is long
enough to hold the new name? Should name just be strduped and the old
name freed?

Regards,
Peter

> +}
> +
>  int qbus_walk_children(BusState *bus,
>                         qdev_walkerfn *pre_devfn, qbus_walkerfn *pre_busfn,
>                         qdev_walkerfn *post_devfn, qbus_walkerfn *post_busfn,
> diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
> index c537969..9653f4d 100644
> --- a/include/hw/qdev-core.h
> +++ b/include/hw/qdev-core.h
> @@ -297,6 +297,8 @@ qemu_irq qdev_intercept_gpio_out(DeviceState *dev, qemu_irq icpt,
>
>  BusState *qdev_get_child_bus(DeviceState *dev, const char *name);
>
> +void qdev_bus_rename(BusState *bus, const char *name);
> +
>  /*** Device API.  ***/
>
>  /* Register device properties.  */
> --
> 2.5.0
>

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Paolo Bonzini]

On 16/12/2015 22:45, Alistair Francis wrote:
> +
> +        /* Rename each SPI bus after the SPI device to allow the board
> +         * to access all of the busses from the SoC.
> +         */
> +        spi_bus = qdev_get_child_bus(DEVICE(&s->spi[i]), "spi0");
> +        snprintf(bus_name, 6, "spi%d", i);
> +        qdev_bus_rename(spi_bus, bus_name);
> +
> +        /* Add the SPI buses to the SoC child bus */
> +        /* FIXME: This causes the later buses to be duplicated in
> +         * the SPI devices printout when running qtre.
> +         */
> +        QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);

Isn't the SPI bus accessible with something similar to spi[0-5]/spi0,
even without this hack?

In any case, I would prefer qdev_bus_rename to stay in xlnx-zynqmp.c.

Paolo

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Alistair Francis]

On Wed, Dec 16, 2015 at 3:24 PM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 16/12/2015 22:45, Alistair Francis wrote:
>> +
>> +        /* Rename each SPI bus after the SPI device to allow the board
>> +         * to access all of the busses from the SoC.
>> +         */
>> +        spi_bus = qdev_get_child_bus(DEVICE(&s->spi[i]), "spi0");
>> +        snprintf(bus_name, 6, "spi%d", i);
>> +        qdev_bus_rename(spi_bus, bus_name);
>> +
>> +        /* Add the SPI buses to the SoC child bus */
>> +        /* FIXME: This causes the later buses to be duplicated in
>> +         * the SPI devices printout when running qtre.
>> +         */
>> +        QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);
>
> Isn't the SPI bus accessible with something similar to spi[0-5]/spi0,
> even without this hack?

Not that I know of. That doesn't work for me.

>
> In any case, I would prefer qdev_bus_rename to stay in xlnx-zynqmp.c.

That's fine with me.

Thanks,

Alistair

>
> Paolo
>

Re: [Qemu-devel] [PATCH v5 4/6] qdev: Add a function to rename busses

[Alistair Francis]

On Wed, Dec 16, 2015 at 2:36 PM, Peter Crosthwaite
<crosthwaitepeter@gmail.com> wrote:
> On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>> Add a function which can be used to rename busses.
>>
>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>> ---
>>
>>  hw/core/qdev.c         | 5 +++++
>>  include/hw/qdev-core.h | 2 ++
>>  2 files changed, 7 insertions(+)
>>
>> diff --git a/hw/core/qdev.c b/hw/core/qdev.c
>> index b3ad467..29a3e9d 100644
>> --- a/hw/core/qdev.c
>> +++ b/hw/core/qdev.c
>> @@ -590,6 +590,11 @@ BusState *qdev_get_child_bus(DeviceState *dev, const char *name)
>>      return NULL;
>>  }
>>
>> +void qdev_bus_rename(BusState *bus, const char *name)
>> +{
>> +        memcpy((char *) bus->name, name, strlen(name) * sizeof(char));
>
> sizeof(char) not needed, but wont this assume the current name is long
> enough to hold the new name? Should name just be strduped and the old
> name freed?

You are right, that is better.

I will update it to use strdup() and I will also move the function
inside xlnx-zynqmp.c as requested by Paolo.

I'll give it a day to see if there are any other comments before
sending it out again.

Thanks,

Alistair

>
> Regards,
> Peter
>
>> +}
>> +
>>  int qbus_walk_children(BusState *bus,
>>                         qdev_walkerfn *pre_devfn, qbus_walkerfn *pre_busfn,
>>                         qdev_walkerfn *post_devfn, qbus_walkerfn *post_busfn,
>> diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
>> index c537969..9653f4d 100644
>> --- a/include/hw/qdev-core.h
>> +++ b/include/hw/qdev-core.h
>> @@ -297,6 +297,8 @@ qemu_irq qdev_intercept_gpio_out(DeviceState *dev, qemu_irq icpt,
>>
>>  BusState *qdev_get_child_bus(DeviceState *dev, const char *name);
>>
>> +void qdev_bus_rename(BusState *bus, const char *name);
>> +
>>  /*** Device API.  ***/
>>
>>  /* Register device properties.  */
>> --
>> 2.5.0
>>
>

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Peter Maydell]

On 16 December 2015 at 23:24, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 16/12/2015 22:45, Alistair Francis wrote:
>> +
>> +        /* Rename each SPI bus after the SPI device to allow the board
>> +         * to access all of the busses from the SoC.
>> +         */
>> +        spi_bus = qdev_get_child_bus(DEVICE(&s->spi[i]), "spi0");
>> +        snprintf(bus_name, 6, "spi%d", i);
>> +        qdev_bus_rename(spi_bus, bus_name);
>> +
>> +        /* Add the SPI buses to the SoC child bus */
>> +        /* FIXME: This causes the later buses to be duplicated in
>> +         * the SPI devices printout when running qtre.
>> +         */
>> +        QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);
>
> Isn't the SPI bus accessible with something similar to spi[0-5]/spi0,
> even without this hack?
>
> In any case, I would prefer qdev_bus_rename to stay in xlnx-zynqmp.c.

I disagree that it should be in xlnx-zynqmp.c. Either
(a) qdev already provides some reasonable mechanism for
SoC container like this to allow their users to get at
buses provided by their child objects, in which case we
should use it
(b) qdev doesn't provide such a mechanism, in which case
we need to provide one (either qdev_bus_rename or something
else if you have a better idea)

But we definitely shouldn't have the SoC container code
messing around with the internals of the qdev objects.

thanks
-- PMM

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Paolo Bonzini]

On 17/12/2015 09:26, Peter Maydell wrote:
>> > In any case, I would prefer qdev_bus_rename to stay in xlnx-zynqmp.c.
> I disagree that it should be in xlnx-zynqmp.c. Either
> (a) qdev already provides some reasonable mechanism for
> SoC container like this to allow their users to get at
> buses provided by their child objects, in which case we
> should use it
> (b) qdev doesn't provide such a mechanism, in which case
> we need to provide one (either qdev_bus_rename or something
> else if you have a better idea)
> 
> But we definitely shouldn't have the SoC container code
> messing around with the internals of the qdev objects.

It's a hack and I don't want it to become a sanctioned way to do it.
It's already messing around pretty heavily with qdev internals, see the
line right after QLIST_INSERT_HEAD:

        QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);

Paolo

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Peter Maydell]

On 17 December 2015 at 10:28, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 17/12/2015 09:26, Peter Maydell wrote:
>>> > In any case, I would prefer qdev_bus_rename to stay in xlnx-zynqmp.c.
>> I disagree that it should be in xlnx-zynqmp.c. Either
>> (a) qdev already provides some reasonable mechanism for
>> SoC container like this to allow their users to get at
>> buses provided by their child objects, in which case we
>> should use it
>> (b) qdev doesn't provide such a mechanism, in which case
>> we need to provide one (either qdev_bus_rename or something
>> else if you have a better idea)
>>
>> But we definitely shouldn't have the SoC container code
>> messing around with the internals of the qdev objects.
>
> It's a hack and I don't want it to become a sanctioned way to do it.
> It's already messing around pretty heavily with qdev internals, see the
> line right after QLIST_INSERT_HEAD:
>
>         QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);

Well, that doesn't look good either. I think my point still
stands -- we should be providing proper infrastructure at
the qdev level to allow SoC container devices to do the
things they need to do, not just letting the containers
mess with the qdev internals.

thanks
-- PMM

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Paolo Bonzini]

On 17/12/2015 12:11, Peter Maydell wrote:
> > It's a hack and I don't want it to become a sanctioned way to do it.
> > It's already messing around pretty heavily with qdev internals, see the
> > line right after QLIST_INSERT_HEAD:
> >
> >         QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);
>
> Well, that doesn't look good either. I think my point still
> stands -- we should be providing proper infrastructure at
> the qdev level to allow SoC container devices to do the
> things they need to do, not just letting the containers
> mess with the qdev internals.

I agree completely.

Paolo

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Alistair Francis]

On Thu, Dec 17, 2015 at 3:12 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 17/12/2015 12:11, Peter Maydell wrote:
>> > It's a hack and I don't want it to become a sanctioned way to do it.
>> > It's already messing around pretty heavily with qdev internals, see the
>> > line right after QLIST_INSERT_HEAD:
>> >
>> >         QLIST_INSERT_HEAD(&dev->child_bus, spi_bus, sibling);
>>
>> Well, that doesn't look good either. I think my point still
>> stands -- we should be providing proper infrastructure at
>> the qdev level to allow SoC container devices to do the
>> things they need to do, not just letting the containers
>> mess with the qdev internals.
>
> I agree completely.

Does anyone have any ideas on how we can do this?

AFAIK there is no way to currently do this, so we need to add
something. What is the preferred way to expose the buses?

Thanks,

Alistair

>
> Paolo
>

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Paolo Bonzini]

On 18/12/2015 18:17, Alistair Francis wrote:
> Does anyone have any ideas on how we can do this?
> 
> AFAIK there is no way to currently do this, so we need to add
> something. What is the preferred way to expose the buses?

For now, what you're doing is okay for me, just moving the funky code in
zynq-specific files.

Thanks,

Paolo

> Thanks,
> 
> Alistair

Re: [Qemu-devel] [PATCH v5 5/6] xlnx-zynqmp: Connect the SPI devices

[Peter Crosthwaite]

On Fri, Dec 18, 2015 at 9:55 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>
>
> On 18/12/2015 18:17, Alistair Francis wrote:
>> Does anyone have any ideas on how we can do this?
>>
>> AFAIK there is no way to currently do this, so we need to add
>> something. What is the preferred way to expose the buses?
>
> For now, what you're doing is okay for me, just moving the funky code in
> zynq-specific files.
>

OK I think I have a real fix on this that doesn't require any funk.
Backing up, qdev currently doubly connects buses and devices and
devices to devs. The two connections are:

1: The child bus list
2: As QOM children

Ultimately what we need here is an aliasing mechanism. I don't thing
detaching and re-attaching works in the local sense, as it is
realistic for a container device to make a few local connections to a
bus (by ref to the controller bus) while also pinning it out on the
container level. The bus should remain accessible on the two different
entities.

So QOM aliases make the most sense to me. The real problem is that
qdev_get_child_bus only uses the child bus list and cannot resolve a
QOM path. My solution is to add preferred attempt to use a QOM path to
implement qdev_get_child_bus and fallback to the current
child-bus-list behaviour on failure.

I'll send a v5 within the next few hours after cleanup.

Regards,
Peter

> Thanks,
>
> Paolo
>
>> Thanks,
>>
>> Alistair

Re: [Qemu-devel] [PATCH v5 3/6] xilinx_spips: Separate the state struct into a header

[Peter Crosthwaite]

On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> Separate out the XilinxSPIPS struct into a separate header
> file.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>

> ---
> V5:
>  - Fix typos
> V4:
>  - Don't split off R_MOD_ID and hardcode R_MAX
> V2:
>  - Only split out required #defines
>  - Prefix XLNX_SPIPS_
>
>  hw/ssi/xilinx_spips.c         | 46 +++------------------------
>  include/hw/ssi/xilinx_spips.h | 72 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 76 insertions(+), 42 deletions(-)
>  create mode 100644 include/hw/ssi/xilinx_spips.h
>
> diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
> index e9471ff..2111719 100644
> --- a/hw/ssi/xilinx_spips.c
> +++ b/hw/ssi/xilinx_spips.c
> @@ -29,6 +29,7 @@
>  #include "qemu/fifo8.h"
>  #include "hw/ssi/ssi.h"
>  #include "qemu/bitops.h"
> +#include "hw/ssi/xilinx_spips.h"
>
>  #ifndef XILINX_SPIPS_ERR_DEBUG
>  #define XILINX_SPIPS_ERR_DEBUG 0
> @@ -103,8 +104,6 @@
>
>  #define R_MOD_ID            (0xFC / 4)
>
> -#define R_MAX (R_MOD_ID+1)
> -
>  /* size of TXRX FIFOs */
>  #define RXFF_A          32
>  #define TXFF_A          32
> @@ -135,30 +134,6 @@ typedef enum {
>  } FlashCMD;
>
>  typedef struct {
> -    SysBusDevice parent_obj;
> -
> -    MemoryRegion iomem;
> -    MemoryRegion mmlqspi;
> -
> -    qemu_irq irq;
> -    int irqline;
> -
> -    uint8_t num_cs;
> -    uint8_t num_busses;
> -
> -    uint8_t snoop_state;
> -    qemu_irq *cs_lines;
> -    SSIBus **spi;
> -
> -    Fifo8 rx_fifo;
> -    Fifo8 tx_fifo;
> -
> -    uint8_t num_txrx_bytes;
> -
> -    uint32_t regs[R_MAX];
> -} XilinxSPIPS;
> -
> -typedef struct {
>      XilinxSPIPS parent_obj;
>
>      uint8_t lqspi_buf[LQSPI_CACHE_SIZE];
> @@ -174,19 +149,6 @@ typedef struct XilinxSPIPSClass {
>      uint32_t tx_fifo_size;
>  } XilinxSPIPSClass;
>
> -#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
> -#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
> -
> -#define XILINX_SPIPS(obj) \
> -     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
> -#define XILINX_SPIPS_CLASS(klass) \
> -     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
> -#define XILINX_SPIPS_GET_CLASS(obj) \
> -     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
> -
> -#define XILINX_QSPIPS(obj) \
> -     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
> -
>  static inline int num_effective_busses(XilinxSPIPS *s)
>  {
>      return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS &&
> @@ -257,7 +219,7 @@ static void xilinx_spips_reset(DeviceState *d)
>      XilinxSPIPS *s = XILINX_SPIPS(d);
>
>      int i;
> -    for (i = 0; i < R_MAX; i++) {
> +    for (i = 0; i < XLNX_SPIPS_R_MAX; i++) {
>          s->regs[i] = 0;
>      }
>
> @@ -664,7 +626,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
>      }
>
>      memory_region_init_io(&s->iomem, OBJECT(s), xsc->reg_ops, s,
> -                          "spi", R_MAX*4);
> +                          "spi", XLNX_SPIPS_R_MAX*4);
>      sysbus_init_mmio(sbd, &s->iomem);
>
>      s->irqline = -1;
> @@ -708,7 +670,7 @@ static const VMStateDescription vmstate_xilinx_spips = {
>      .fields = (VMStateField[]) {
>          VMSTATE_FIFO8(tx_fifo, XilinxSPIPS),
>          VMSTATE_FIFO8(rx_fifo, XilinxSPIPS),
> -        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, R_MAX),
> +        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, XLNX_SPIPS_R_MAX),
>          VMSTATE_UINT8(snoop_state, XilinxSPIPS),
>          VMSTATE_END_OF_LIST()
>      }
> diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h
> new file mode 100644
> index 0000000..dbb9eef
> --- /dev/null
> +++ b/include/hw/ssi/xilinx_spips.h
> @@ -0,0 +1,72 @@
> +/*
> + * Header file for the Xilinx Zynq SPI controller
> + *
> + * Copyright (C) 2015 Xilinx Inc
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef XLNX_SPIPS_H
> +#define XLNX_SPIPS_H
> +
> +#include "hw/ssi/ssi.h"
> +#include "qemu/fifo8.h"
> +
> +typedef struct XilinxSPIPS XilinxSPIPS;
> +
> +#define XLNX_SPIPS_R_MAX        (0x100 / 4)
> +
> +struct XilinxSPIPS {
> +    SysBusDevice parent_obj;
> +
> +    MemoryRegion iomem;
> +    MemoryRegion mmlqspi;
> +
> +    qemu_irq irq;
> +    int irqline;
> +
> +    uint8_t num_cs;
> +    uint8_t num_busses;
> +
> +    uint8_t snoop_state;
> +    qemu_irq *cs_lines;
> +    SSIBus **spi;
> +
> +    Fifo8 rx_fifo;
> +    Fifo8 tx_fifo;
> +
> +    uint8_t num_txrx_bytes;
> +
> +    uint32_t regs[XLNX_SPIPS_R_MAX];
> +};
> +
> +#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
> +#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
> +
> +#define XILINX_SPIPS(obj) \
> +     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
> +#define XILINX_SPIPS_CLASS(klass) \
> +     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
> +#define XILINX_SPIPS_GET_CLASS(obj) \
> +     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
> +
> +#define XILINX_QSPIPS(obj) \
> +     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
> +
> +#endif /* XLNX_SPIPS_H */
> --
> 2.5.0
>

Re: [Qemu-devel] [PATCH v5 6/6] xlnx-ep108: Connect the SPI Flash

[Peter Crosthwaite]

On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> Connect the sst25wf080 SPI flash to the EP108 board.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>

> ---
> V4:
>  - Only add one SPI flash
> V3:
>  - Don't reach into the SoC
> V2:
>  - Use sst25wf080 instead of m25p80
>
>  hw/arm/xlnx-ep108.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
> index 85b978f..d1912aa 100644
> --- a/hw/arm/xlnx-ep108.c
> +++ b/hw/arm/xlnx-ep108.c
> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>  static void xlnx_ep108_init(MachineState *machine)
>  {
>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
> +    int i;
>      Error *err = NULL;
>
>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
> @@ -60,6 +61,21 @@ static void xlnx_ep108_init(MachineState *machine)
>                                           machine->ram_size);
>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
> +        SSIBus *spi_bus;
> +        DeviceState *flash_dev;
> +        qemu_irq cs_line;
> +        char bus_name[6];
> +
> +        snprintf(bus_name, 6, "spi%d", i);
> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
> +
> +        flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
> +        cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
> +
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
> +    }
> +
>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
> --
> 2.5.0
>