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From: Thor Thayer <tthayer@opensource.altera.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: <linus.walleij@linaro.org>, <gnurou@gmail.com>,
	<jdelvare@suse.com>, <linux@roeck-us.net>, <robh+dt@kernel.org>,
	<pawell.moll@arm.com>, <mark.rutland@arm.com>,
	<ijc+devicetree@hellion.org.uk>, <dinguyen@opensource.altera.com>,
	<linux-gpio@vger.kernel.org>, <linux-hwmon@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: Re: [RFC 3/8] mfd: altr_a10sr: Add Altera Arria10 DevKit System Resource Chip
Date: Wed, 30 Mar 2016 09:52:25 -0500	[thread overview]
Message-ID: <56FBE829.2000607@opensource.altera.com> (raw)
In-Reply-To: <20160330115106.GJ3323@x1>

Hi Lee,

On 03/30/2016 06:51 AM, Lee Jones wrote:
> On Tue, 29 Mar 2016, tthayer@opensource.altera.com wrote:
>
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add support for the Altera Arria10 Development Kit System Resource
>> chip which is implemented using a MAX5 as a external gpio extender,
>> and hardware monitor with the regmap framework over a SPI bus.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---

[...]

>> index 0000000..13665d4
>> --- /dev/null
>> +++ b/drivers/mfd/altera-a10sr.c
>> @@ -0,0 +1,177 @@
>> +/*
>> + * Copyright Altera Corporation (C) 2014-2016. All Rights Reserved
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope it will be useful, but WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
>> + * more details.
>> + *
>> + * You should have received a copy of the GNU General Public License along with
>> + * this program.  If not, see <http://www.gnu.org/licenses/>.
>
> Any chance you can use the shorter copyright header?
>

This is the header that Altera has specified and that we're operating 
under. We haven't received guidance on Intel's header yet but it may 
change as a result of our acquisition by Intel.

[...]

>> +
>> +	/*
>> +	 * We can't use the standard regmap_update_bits function because
>> +	 * the read register has a different address than the write register.
>> +	 * Therefore, just do a read, modify, write operation here.
>> +	 */
>> +	ret = regmap_read(a10sr->regmap, (reg | READ_REG_MASK), &rval);
>> +	if (ret < 0)
>> +		return ret;
>> +
>> +	rval = ((rval & ~bit_mask) | (reg_val & bit_mask));
>> +
>> +	ret = regmap_write(a10sr->regmap, (reg & WRITE_REG_MASK), rval);
>> +
>> +	return ret;
>> +}
>
> Why can't you use the Regmap update function(s)?

The read register has a different address than the write register which 
is handled in this function with the masks (read address is odd, write 
address is even).

Thank you for the review of my patch set. I will implement the changes 
that you pointed out. Thank you for reviewing!

>
>> +#endif /* __MFD_ALTERA_A10SR_H */
>

WARNING: multiple messages have this Message-ID (diff)
From: Thor Thayer <tthayer@opensource.altera.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: linus.walleij@linaro.org, gnurou@gmail.com, jdelvare@suse.com,
	linux@roeck-us.net, robh+dt@kernel.org, pawell.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	dinguyen@opensource.altera.com, linux-gpio@vger.kernel.org,
	linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [RFC 3/8] mfd: altr_a10sr: Add Altera Arria10 DevKit System Resource Chip
Date: Wed, 30 Mar 2016 09:52:25 -0500	[thread overview]
Message-ID: <56FBE829.2000607@opensource.altera.com> (raw)
In-Reply-To: <20160330115106.GJ3323@x1>

Hi Lee,

On 03/30/2016 06:51 AM, Lee Jones wrote:
> On Tue, 29 Mar 2016, tthayer@opensource.altera.com wrote:
>
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add support for the Altera Arria10 Development Kit System Resource
>> chip which is implemented using a MAX5 as a external gpio extender,
>> and hardware monitor with the regmap framework over a SPI bus.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---

[...]

>> index 0000000..13665d4
>> --- /dev/null
>> +++ b/drivers/mfd/altera-a10sr.c
>> @@ -0,0 +1,177 @@
>> +/*
>> + * Copyright Altera Corporation (C) 2014-2016. All Rights Reserved
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope it will be useful, but WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
>> + * more details.
>> + *
>> + * You should have received a copy of the GNU General Public License along with
>> + * this program.  If not, see <http://www.gnu.org/licenses/>.
>
> Any chance you can use the shorter copyright header?
>

This is the header that Altera has specified and that we're operating 
under. We haven't received guidance on Intel's header yet but it may 
change as a result of our acquisition by Intel.

[...]

>> +
>> +	/*
>> +	 * We can't use the standard regmap_update_bits function because
>> +	 * the read register has a different address than the write register.
>> +	 * Therefore, just do a read, modify, write operation here.
>> +	 */
>> +	ret = regmap_read(a10sr->regmap, (reg | READ_REG_MASK), &rval);
>> +	if (ret < 0)
>> +		return ret;
>> +
>> +	rval = ((rval & ~bit_mask) | (reg_val & bit_mask));
>> +
>> +	ret = regmap_write(a10sr->regmap, (reg & WRITE_REG_MASK), rval);
>> +
>> +	return ret;
>> +}
>
> Why can't you use the Regmap update function(s)?

The read register has a different address than the write register which 
is handled in this function with the masks (read address is odd, write 
address is even).

Thank you for the review of my patch set. I will implement the changes 
that you pointed out. Thank you for reviewing!

>
>> +#endif /* __MFD_ALTERA_A10SR_H */
>

  reply	other threads:[~2016-03-30 14:52 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-29 19:13 [RFC] Addition of Altera Arria10 System Resource Chip tthayer
2016-03-29 19:13 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-29 19:13 ` [RFC 1/8] dt-bindings: mfd: Add Altera Arria10 System Resource Chip bindings tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-30 11:35   ` Lee Jones
2016-03-30 11:36     ` Lee Jones
2016-03-31 14:06     ` Rob Herring
2016-03-31 18:21     ` Thor Thayer
2016-03-31 18:21       ` Thor Thayer
2016-04-01  8:14       ` Lee Jones
2016-04-01  8:14         ` Lee Jones
2016-04-01 20:21         ` Thor Thayer
2016-04-01 20:21           ` Thor Thayer
2016-03-29 19:13 ` [RFC 2/8] MAINTAINERS: Addition of Altera Arria10 System Resource Chip tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-30  8:19   ` Lee Jones
2016-03-30  8:19     ` Lee Jones
2016-03-29 19:13 ` [RFC 3/8] mfd: altr_a10sr: Add Altera Arria10 DevKit " tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-30 11:51   ` Lee Jones
2016-03-30 11:51     ` Lee Jones
2016-03-30 14:52     ` Thor Thayer [this message]
2016-03-30 14:52       ` Thor Thayer
2016-03-30 14:52       ` Lee Jones
2016-03-30 14:52         ` Lee Jones
2016-03-30 16:10         ` Mark Brown
2016-03-31  9:10           ` Lee Jones
2016-03-31  9:11             ` Lee Jones
2016-03-29 19:13 ` [RFC 4/8] gpio: altera-a10sr: Add A10 System Resource Chip GPIO support tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
     [not found]   ` <1459278791-3646-5-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-03-30  8:18     ` Lee Jones
2016-03-30  8:18       ` Lee Jones
2016-04-01 12:17   ` Linus Walleij
2016-04-01 20:34     ` Thor Thayer
2016-04-01 20:34       ` Thor Thayer
2016-04-08 11:39       ` Linus Walleij
2016-03-29 19:13 ` [RFC 5/8] ARM: socfpga: dts: Add Devkit A10-SR fields for Arria10 tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-30 17:42   ` Dinh Nguyen
2016-03-30 17:42     ` Dinh Nguyen
2016-03-31 18:28     ` Thor Thayer
2016-03-31 18:28       ` Thor Thayer
2016-03-29 19:13 ` [RFC 6/8] ARM: socfpga: dts: Add LED framework to A10-SR GPIO tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2016-03-29 19:13 ` [RFC 7/8] hwmon: Altera Arria10 System Resource Chip - HW Monitor tthayer
2016-03-29 19:13   ` tthayer
2016-03-29 20:16   ` Guenter Roeck
2016-03-29 21:43     ` Thor Thayer
2016-03-29 21:43       ` Thor Thayer
2016-03-29 22:29       ` Mark Brown
2016-03-29 22:30       ` Guenter Roeck
2016-03-30  8:17   ` Lee Jones
2016-03-30  8:18     ` Lee Jones
2016-03-29 19:13 ` [RFC 8/8] ARM: socfpga: dts: Add Devkit Arria10-SR HWMON tthayer
2016-03-29 19:13   ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
     [not found] ` <1459278791-3646-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-03-30  8:14   ` [RFC] Addition of Altera Arria10 System Resource Chip Lee Jones
2016-03-30  8:14     ` Lee Jones
2016-03-30 14:27 ` [RFC 7/8] hwmon: Altera Arria10 System Resource Chip - HW Monitor Thor Thayer
2016-03-30 14:31   ` Thor Thayer
2016-04-15 16:57 ` [RFC 1/8] dt-bindings: mfd: Add Altera Arria10 System Resource Chip bindings Thor Thayer
2016-04-15 17:02   ` Thor Thayer
2016-04-18  7:43   ` Lee Jones
2016-04-18  7:44     ` Lee Jones
2016-04-18  7:45   ` Lee Jones
2016-04-18  7:46     ` Lee Jones
2016-04-18 14:51 ` Thor Thayer
2016-04-18 14:55   ` Thor Thayer
2016-04-18 15:07 ` Thor Thayer
2016-04-18 15:12   ` Thor Thayer
2016-04-19  7:23   ` Lee Jones
2016-04-19  7:25     ` Lee Jones
2016-04-19 14:38     ` Thor Thayer
2016-04-19 14:38       ` Thor Thayer
2016-04-20  1:48       ` Guenter Roeck
2016-04-20  1:48         ` Guenter Roeck

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