[U-Boot] [PATCH v3 1/7] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

[U-Boot] [PATCH v3 1/7] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>

This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE has turned into another EL.

Define the function mmu_setup() for fsl-layerscape to cover the weak
one.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
---
V3:
 - no change

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d939900..672a453 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -425,15 +425,21 @@ int arch_cpu_init(void)
 	return 0;
 }
 
+void mmu_setup(void)
+{
+	final_mmu_setup();
+}
+
 /*
- * This function is called from lib/board.c.
- * It recreates MMU table in main memory. MMU and d-cache are enabled earlier.
- * There is no need to disable d-cache for this operation.
+ * This function is called from common/board_r.c.
+ * It recreates MMU table in main memory.
  */
 void enable_caches(void)
 {
-	final_mmu_setup();
+	mmu_setup();
 	__asm_invalidate_tlb_all();
+	icache_enable();
+	dcache_enable();
 }
 #endif
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 2/7] ARMv8/layerscape: Add FSL PPA support

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>

The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
---
V3:
 - Refactor the code.
 - Add secure firmware validation API
 - Add secure firmware getting supported PSCI version API
 - Add PPA firmware version info output.

 arch/arm/cpu/armv8/fsl-layerscape/Makefile     |   1 +
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 242 +++++++++++++++++++++++++
 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S  |  42 +++++
 arch/arm/include/asm/arch-fsl-layerscape/ppa.h |  15 ++
 4 files changed, 300 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 5f86ef9..1535fee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -10,6 +10,7 @@ obj-y += soc.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SPL) += spl.o
+obj-$(CONFIG_FSL_LS_PPA) += ppa.o ppa_entry.o
 
 ifneq ($(CONFIG_FSL_LSCH3),)
 obj-y += fsl_lsch3_speed.o
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
new file mode 100644
index 0000000..aa71212
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -0,0 +1,242 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <config.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/macro.h>
+#include <asm/arch/soc.h>
+#ifdef CONFIG_FSL_LSCH3
+#include <asm/arch/immap_lsch3.h>
+#elif defined(CONFIG_FSL_LSCH2)
+#include <asm/arch/immap_lsch2.h>
+#endif
+#include <asm/arch/ppa.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void c_runtime_cpu_setup(void);
+
+#define LS_PPA_FIT_FIRMWARE_IMAGE	"firmware"
+#define LS_PPA_FIT_CNF_NAME		"config at 1"
+#define PPA_MEM_SIZE_ENV_VAR		"ppamemsize"
+
+/*
+ * Return the actual size of the PPA private DRAM block.
+ */
+unsigned long ppa_get_dram_block_size(void)
+{
+	unsigned long dram_block_size = CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE;
+
+	char *dram_block_size_env_var = getenv(PPA_MEM_SIZE_ENV_VAR);
+
+	if (dram_block_size_env_var) {
+		dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
+						 10);
+
+		if (dram_block_size < CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE) {
+			printf("fsl-ppa: WARNING: Invalid value for \'"
+			       PPA_MEM_SIZE_ENV_VAR
+			       "\' environment variable: %lu\n",
+			       dram_block_size);
+
+			dram_block_size = CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE;
+		}
+	}
+
+	return dram_block_size;
+}
+
+static int ppa_firmware_validate(void *ppa_addr)
+{
+	void *fit_hdr;
+
+	fit_hdr = ppa_addr;
+
+	if (fdt_check_header(fit_hdr)) {
+		printf("fsl-ppa: Bad firmware image (not a FIT image)\n");
+		return -EINVAL;
+	}
+
+	if (!fit_check_format(fit_hdr)) {
+		printf("fsl-ppa: Bad firmware image (bad FIT header)\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int ppa_firmware_get_data(void *ppa_addr, const void **data, size_t *size)
+{
+	void *fit_hdr;
+	int conf_node_off, fw_node_off;
+	char *conf_node_name = NULL;
+	char *desc;
+	int ret;
+
+	fit_hdr = ppa_addr;
+	conf_node_name = LS_PPA_FIT_CNF_NAME;
+
+	conf_node_off = fit_conf_get_node(fit_hdr, conf_node_name);
+	if (conf_node_off < 0) {
+		printf("fsl-ppa: %s: no such config\n", conf_node_name);
+		return -ENOENT;
+	}
+
+	fw_node_off = fit_conf_get_prop_node(fit_hdr, conf_node_off,
+			LS_PPA_FIT_FIRMWARE_IMAGE);
+	if (fw_node_off < 0) {
+		printf("fsl-ppa: No '%s' in config\n",
+				LS_PPA_FIT_FIRMWARE_IMAGE);
+		return -ENOLINK;
+	}
+
+	/* Verify PPA firmware image */
+	if (!(fit_image_verify(fit_hdr, fw_node_off))) {
+		printf("fsl-ppa: Bad firmware image (bad CRC)\n");
+		return -EINVAL;
+	}
+
+	if (fit_image_get_data(fit_hdr, fw_node_off, data, size)) {
+		printf("fsl-ppa: Can't get %s subimage data/size",
+				LS_PPA_FIT_FIRMWARE_IMAGE);
+		return -ENOENT;
+	}
+
+	ret = fit_get_desc(fit_hdr, fw_node_off, &desc);
+	if (ret)
+		printf("PPA Firmware unavailable\n");
+	else
+		printf("%s\n", desc);
+
+	return 0;
+}
+
+/*
+ * PPA firmware FIT image parser checks if the image is in FIT
+ * format, verifies integrity of the image and calculates raw
+ * image address and size values.
+ *
+ * Returns 0 on success and a negative errno on error task fail.
+ */
+static int ppa_parse_firmware_fit_image(const void **raw_image_addr,
+				size_t *raw_image_size)
+{
+	void *ppa_addr;
+	int ret;
+
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+	ppa_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
+#else
+#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
+#endif
+
+	ret = ppa_firmware_validate(ppa_addr);
+	if (ret)
+		return ret;
+
+	ret = ppa_firmware_get_data(ppa_addr, raw_image_addr, raw_image_size);
+	if (ret)
+		return ret;
+
+	debug("fsl-ppa: raw_image_addr = 0x%p, raw_image_size = 0x%lx\n",
+			*raw_image_addr, *raw_image_size);
+
+	return 0;
+}
+
+static int ppa_copy_image(const char *title,
+			 u64 image_addr, u32 image_size, u64 ppa_ram_addr)
+{
+	debug("%s copied to address 0x%p\n", title, (void *)ppa_ram_addr);
+	memcpy((void *)ppa_ram_addr, (void *)image_addr, image_size);
+	flush_dcache_range(ppa_ram_addr, ppa_ram_addr + image_size);
+
+	return 0;
+}
+
+int ppa_init_pre(u64 *entry)
+{
+	u64 ppa_ram_addr;
+	const void *raw_image_addr;
+	size_t raw_image_size = 0;
+	size_t ppa_ram_size = ppa_get_dram_block_size();
+	int ret;
+
+	debug("fsl-ppa: ppa size(0x%lx)\n", ppa_ram_size);
+
+	/*
+	 * The PPA must be stored in secure memory.
+	 * Append PPA to secure mmu table.
+	 */
+	ppa_ram_addr = (gd->secure_ram & MEM_RESERVE_SECURE_ADDR_MASK) +
+			gd->arch.tlb_size;
+
+	/* Align PPA base address to 4K */
+	ppa_ram_addr = (ppa_ram_addr + 0xfff) & ~0xfff;
+	debug("fsl-ppa: PPA load address (0x%llx)\n", ppa_ram_addr);
+
+	ret = ppa_parse_firmware_fit_image(&raw_image_addr, &raw_image_size);
+	if (ret < 0)
+		goto out;
+
+	if (ppa_ram_size < raw_image_size) {
+		ret = -ENOSPC;
+		goto out;
+	}
+
+	ppa_copy_image("PPA firmware", (u64)raw_image_addr,
+			raw_image_size, ppa_ram_addr);
+
+	debug("fsl-ppa: PPA entry: 0x%llx\n", ppa_ram_addr);
+	*entry = ppa_ram_addr;
+
+	return 0;
+
+out:
+	printf("fsl-ppa: error (%d)\n", ret);
+	*entry = 0;
+
+	return ret;
+}
+
+int ppa_init_entry(void *ppa_entry)
+{
+	int ret;
+	u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
+
+#ifdef CONFIG_FSL_LSCH3
+	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	boot_loc_ptr_l = &gur->bootlocptrl;
+	boot_loc_ptr_h = &gur->bootlocptrh;
+#elif defined(CONFIG_FSL_LSCH2)
+	struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
+	boot_loc_ptr_l = &scfg->scratchrw[1];
+	boot_loc_ptr_h = &scfg->scratchrw[0];
+#endif
+
+	debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
+			boot_loc_ptr_l, boot_loc_ptr_h);
+	ret = ppa_init(ppa_entry, boot_loc_ptr_l, boot_loc_ptr_h);
+	if (ret < 0)
+		return ret;
+
+	debug("fsl-ppa: Return from PPA: current_el = %d\n", current_el());
+
+	/*
+	 * The PE will be turned into EL2 when run out of PPA.
+	 * First, set vector for EL2.
+	 */
+	c_runtime_cpu_setup();
+
+	/* Enable caches and MMU for EL2. */
+	enable_caches();
+
+	return 0;
+}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S b/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
new file mode 100644
index 0000000..3a3bb64
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
@@ -0,0 +1,42 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+#include <asm/system.h>
+#include <asm/macro.h>
+
+ENTRY(ppa_init)
+	/*
+	 * x0: PPA entry point
+	 * x1: Boot Location Pointer Low
+	 * x2: Boot Location Pointer High
+	 */
+
+	/* Save stack pointer for EL2 */
+	mov	x3, sp
+	msr	sp_el2, x3
+
+	/* Set boot loc pointer */
+        adr	x4, 1f
+        mov	x3, x4
+#if defined(CONFIG_FSL_LSCH2)
+        rev	w3, w3
+#endif
+        str	w3, [x1]
+        lsr	x3, x4, #32
+#if defined(CONFIG_FSL_LSCH2)
+        rev	w3, w3
+#endif
+        str	w3, [x2]
+
+/* Call PPA monitor */
+        br	x0
+
+1:
+        mov	x0, #0
+        ret
+ENDPROC(ppa_init)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ppa.h b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
new file mode 100644
index 0000000..f0f0d10
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSL_PPA_H_
+#define __FSL_PPA_H_
+
+int ppa_init_pre(u64 *);
+int ppa_init_entry(void *);
+int ppa_init(void *, u32*, u32*);
+unsigned long ppa_get_dram_block_size(void);
+
+#endif
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
---
V3:
 - no change

 board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
 include/configs/ls1043ardb.h            |  9 +++++++++
 2 files changed, 20 insertions(+)

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index ec5fdbf..5f0a8e7 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/ppa.h>
 #include <asm/arch/soc.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
@@ -84,6 +85,9 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+#ifdef CONFIG_FSL_LS_PPA
+	u64 ppa_entry;
+#endif
 
 	/*
 	 * Set CCI-400 control override register to enable barrier
@@ -103,6 +107,13 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init_pre(&ppa_entry);
+
+	if (ppa_entry)
+		ppa_init_entry((void *)ppa_entry);
+#endif
+
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 6d35be2..4d22b63 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -9,6 +9,15 @@
 
 #include "ls1043a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE		(1UL * 1024 * 1024)
+
+#define CONFIG_SYS_LS_PPA_FW_IN_NOR
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+#define	CONFIG_SYS_LS_PPA_FW_ADDR	0x60500000
+#endif
+#endif
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 4/7] ARMv8: add the sec_firmware header file

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The sec_firmware.h is a common header file for secure monitor
firmware under ARMv8. The common API can be added to this file,
and added APIs for secure firmware validation and getting
supported PSCI version.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V3:
 - new patch

 arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 27 +++++++++++++++++++++++++-
 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S  | 11 +++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/ppa.h |  1 +
 arch/arm/include/asm/armv8/sec_firmware.h      | 19 ++++++++++++++++++
 4 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index aa71212..3cd4d00 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -17,7 +17,7 @@
 #elif defined(CONFIG_FSL_LSCH2)
 #include <asm/arch/immap_lsch2.h>
 #endif
-#include <asm/arch/ppa.h>
+#include <asm/armv8/sec_firmware.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -161,6 +161,31 @@ static int ppa_copy_image(const char *title,
 	return 0;
 }
 
+int sec_firmware_validate(void)
+{
+	void *ppa_addr;
+
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+	ppa_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
+#else
+#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
+#endif
+
+	return ppa_firmware_validate(ppa_addr);
+}
+
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void)
+{
+	unsigned int psci_ver = 0;
+
+	if (!sec_firmware_validate())
+		psci_ver = ppa_support_psci_version();
+
+	return psci_ver;
+}
+#endif
+
 int ppa_init_pre(u64 *entry)
 {
 	u64 ppa_ram_addr;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S b/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
index 3a3bb64..1f5577b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
@@ -40,3 +40,14 @@ ENTRY(ppa_init)
         mov	x0, #0
         ret
 ENDPROC(ppa_init)
+
+#ifdef CONFIG_ARMV8_PSCI
+ENTRY(ppa_support_psci_version)
+	mov	x0, 0x84000000
+	mov	x1, 0x0
+	mov	x2, 0x0
+	mov	x3, 0x0
+	smc	#0
+	ret
+ENDPROC(ppa_support_psci_version)
+#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ppa.h b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
index f0f0d10..7b13d56 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
@@ -11,5 +11,6 @@ int ppa_init_pre(u64 *);
 int ppa_init_entry(void *);
 int ppa_init(void *, u32*, u32*);
 unsigned long ppa_get_dram_block_size(void);
+unsigned int ppa_support_psci_version(void);
 
 #endif
diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
new file mode 100644
index 0000000..a54a599
--- /dev/null
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __SEC_FIRMWARE_H_
+#define __SEC_FIRMWARE_H_
+
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
+
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void);
+#endif
+int sec_firmware_validate(void);
+
+#endif /* __SEC_FIRMWARE_H_ */
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 5/7] ARMv8/PSCI: Fixup the device tree for PSCI

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Set the enable-method in the cpu node to PSCI, and reate device
node for PSCI.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V3:
 - new patch

 arch/arm/cpu/armv8/Makefile |   1 +
 arch/arm/cpu/armv8/cpu-dt.c | 126 ++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/lib/bootm-fdt.c    |   2 +-
 3 files changed, 128 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv8/cpu-dt.c

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 1c85aa9..a295e37 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -15,6 +15,7 @@ obj-y	+= cache.o
 obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
+obj-y	+= cpu-dt.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
new file mode 100644
index 0000000..723277b
--- /dev/null
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <linux/sizes.h>
+#include <linux/kernel.h>
+#include <asm/armv8/sec_firmware.h>
+
+#ifdef CONFIG_MP
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_ARMV8_PSCI)
+__weak unsigned int sec_firmware_support_psci_version(void)
+{
+	return 0;
+}
+
+static int cpu_update_dt_psci(void *fdt)
+{
+	int nodeoff;
+	unsigned int psci_ver;
+	char *psci_compt;
+	int tmp;
+
+	nodeoff = fdt_path_offset(fdt, "/cpus");
+	if (nodeoff < 0) {
+		printf("couldn't find /cpus\n");
+		return nodeoff;
+	}
+
+	/* add 'enable-method = "psci"' to each cpu node */
+	for (tmp = fdt_first_subnode(fdt, nodeoff);
+	     tmp >= 0;
+	     tmp = fdt_next_subnode(fdt, tmp)) {
+		const struct fdt_property *prop;
+		int len;
+
+		prop = fdt_get_property(fdt, tmp, "device_type", &len);
+		if (!prop)
+			continue;
+		if (len < 4)
+			continue;
+		if (strcmp(prop->data, "cpu"))
+			continue;
+
+		/*
+		 * Not checking rv here, our approach is to skip over errors in
+		 * individual cpu nodes, hopefully some of the nodes are
+		 * processed correctly and those will boot
+		 */
+		fdt_setprop_string(fdt, tmp, "enable-method", "psci");
+	}
+
+	/*
+	 * The PSCI node might be called "/psci" or might be called something
+	 * else but contain either of the compatible strings
+	 * "arm,psci"/"arm,psci-0.2"
+	 */
+	nodeoff = fdt_path_offset(fdt, "/psci");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_path_offset(fdt, "/");
+	if (nodeoff < 0)
+		return nodeoff;
+
+	nodeoff = fdt_add_subnode(fdt, nodeoff, "psci");
+	if (nodeoff < 0)
+		return nodeoff;
+
+init_psci_node:
+	psci_ver = sec_firmware_support_psci_version();
+	switch (psci_ver) {
+	case 0x0100:
+		psci_compt = "arm,psci-1.0";
+		break;
+	case 0x0002:
+		psci_compt = "arm,psci-0.2";
+		break;
+	case 0x0001:
+		psci_compt = "arm,psci";
+		break;
+	default:
+		psci_compt = "arm,psci-0.2";
+		break;
+	}
+
+	tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt);
+	if (tmp)
+		return tmp;
+
+	tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
+	if (tmp)
+		return tmp;
+
+	return 0;
+}
+#endif
+#endif
+
+int psci_update_dt(void *fdt)
+{
+#ifdef CONFIG_MP
+#if defined(CONFIG_ARMV8_PSCI)
+	cpu_update_dt_psci(fdt);
+#endif
+#endif
+	return 0;
+}
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 7677358..c642ff8 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
 	}
 
 	ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-#ifdef CONFIG_ARMV7_NONSEC
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
 	if (ret)
 		return ret;
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

If the PSCI and PPA is ready, skip the fixup for spin-table and
waking secondary cores. If not, change SMP method to spin-table,
and the device node of PSCI will be removed.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V3:
 - new patch

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31 +++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 672a453..937f7ec 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -23,6 +23,9 @@
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -625,9 +628,14 @@ int arch_early_init_r(void)
 #endif
 
 #ifdef CONFIG_MP
-	rv = fsl_layerscape_wake_seconday_cores();
-	if (rv)
-		printf("Did not wake secondary cores\n");
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate())
+#endif
+	{
+		rv = fsl_layerscape_wake_seconday_cores();
+		if (rv)
+			printf("Did not wake secondary cores\n");
+	}
 #endif
 
 #ifdef CONFIG_SYS_HAS_SERDES
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 1e875c4..333b973 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -20,6 +20,9 @@
 #ifdef CONFIG_MP
 #include <asm/arch/mp.h>
 #endif
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {
@@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
 	int addr_cells;
 	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	int node;
+#endif
+
+#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
+	if (sec_firmware_validate()) {
+		/* remove psci DT node */
+		node = fdt_path_offset(blob, "/psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
+		if (node >= 0)
+			goto remove_psci_node;
 
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
+		if (node >= 0)
+			goto remove_psci_node;
+
+remove_psci_node:
+		if (node >= 0)
+			fdt_del_node(blob, node);
+	} else
+		return;
+#endif
 	off = fdt_path_offset(blob, "/cpus");
 	if (off < 0) {
 		puts("couldn't find /cpus node\n");
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 7/7] ARMv8/ls1043ardb: add the CONFIG_ARMV8_PSCI when PPA is enabled

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

So far, the PPA use PSCI to make secondary cores bootup. Add this
macro to identify the SMP boot-method between PSCI and spin-table.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V3:
 - no change

 include/configs/ls1043ardb.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 4d22b63..c7869a5 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -10,6 +10,7 @@
 #include "ls1043a_common.h"
 
 #if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_PSCI
 #define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE		(1UL * 1024 * 1024)
 
 #define CONFIG_SYS_LS_PPA_FW_IN_NOR
-- 
2.1.0.27.g96db324

[U-Boot] [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA

[York Sun]

On 04/27/2016 06:49 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> ---
> V3:
>  - no change
> 
>  board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
>  include/configs/ls1043ardb.h            |  9 +++++++++
>  2 files changed, 20 insertions(+)
> 
> diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
> index ec5fdbf..5f0a8e7 100644
> --- a/board/freescale/ls1043ardb/ls1043ardb.c
> +++ b/board/freescale/ls1043ardb/ls1043ardb.c
> @@ -9,6 +9,7 @@
>  #include <asm/io.h>
>  #include <asm/arch/clock.h>
>  #include <asm/arch/fsl_serdes.h>
> +#include <asm/arch/ppa.h>
>  #include <asm/arch/soc.h>
>  #include <fdt_support.h>
>  #include <hwconfig.h>
> @@ -84,6 +85,9 @@ int board_early_init_f(void)
>  int board_init(void)
>  {
>  	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
> +#ifdef CONFIG_FSL_LS_PPA
> +	u64 ppa_entry;
> +#endif
>  
>  	/*
>  	 * Set CCI-400 control override register to enable barrier
> @@ -103,6 +107,13 @@ int board_init(void)
>  	enable_layerscape_ns_access();
>  #endif
>  
> +#ifdef CONFIG_FSL_LS_PPA
> +	ppa_init_pre(&ppa_entry);
> +
> +	if (ppa_entry)
> +		ppa_init_entry((void *)ppa_entry);

ppa_init_pre() returns the error code. Why don't you use the return value here?

York

[U-Boot] [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

[York Sun]

On 04/27/2016 06:50 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> If the PSCI and PPA is ready, skip the fixup for spin-table and
> waking secondary cores. If not, change SMP method to spin-table,
> and the device node of PSCI will be removed.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V3:
>  - new patch
> 
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
>  arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31 +++++++++++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index 672a453..937f7ec 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -23,6 +23,9 @@
>  #ifdef CONFIG_FSL_ESDHC
>  #include <fsl_esdhc.h>
>  #endif
> +#ifdef CONFIG_FSL_LS_PPA
> +#include <asm/armv8/sec_firmware.h>
> +#endif
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -625,9 +628,14 @@ int arch_early_init_r(void)
>  #endif
>  
>  #ifdef CONFIG_MP
> -	rv = fsl_layerscape_wake_seconday_cores();
> -	if (rv)
> -		printf("Did not wake secondary cores\n");
> +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> +	if (sec_firmware_validate())
> +#endif
> +	{
> +		rv = fsl_layerscape_wake_seconday_cores();
> +		if (rv)
> +			printf("Did not wake secondary cores\n");
> +	}
>  #endif
>  
>  #ifdef CONFIG_SYS_HAS_SERDES
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> index 1e875c4..333b973 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> @@ -20,6 +20,9 @@
>  #ifdef CONFIG_MP
>  #include <asm/arch/mp.h>
>  #endif
> +#ifdef CONFIG_FSL_LS_PPA
> +#include <asm/armv8/sec_firmware.h>
> +#endif
>  
>  int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
>  {
> @@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
>  	int addr_cells;
>  	u64 val, core_id;
>  	size_t *boot_code_size = &(__secondary_boot_code_size);
> +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> +	int node;
> +#endif
> +
> +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> +	if (sec_firmware_validate()) {
> +		/* remove psci DT node */
> +		node = fdt_path_offset(blob, "/psci");
> +		if (node >= 0)
> +			goto remove_psci_node;
> +
> +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
> +		if (node >= 0)
> +			goto remove_psci_node;
>  
> +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
> +		if (node >= 0)
> +			goto remove_psci_node;
> +
> +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
> +		if (node >= 0)
> +			goto remove_psci_node;
> +
> +remove_psci_node:
> +		if (node >= 0)
> +			fdt_del_node(blob, node);
> +	} else
> +		return;
> +#endif
>  	off = fdt_path_offset(blob, "/cpus");
>  	if (off < 0) {
>  		puts("couldn't find /cpus node\n");
> 


Zhiqiang,

I think your patch sequence and logic is backward. To make the transition
smoothly, we need to make sure U-Boot always works. You can introduce PPA with
PSCI support. After each patch applied, U-Boot should still work. I suggest you
to check if PPA/PSCI is available before fixing up device tree. You can also
switch to PSCI to boot secondary cores by then.

York

[U-Boot] [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA

[Zhiqiang Hou]

Hi York,

Thanks for your comments and sorry for my delay response due to PTO.

> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: 2016?5?11? 3:48
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Cc: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
> 
> On 04/27/2016 06:49 AM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> > ---
> > V3:
> >  - no change
> >
> >  board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
> >  include/configs/ls1043ardb.h            |  9 +++++++++
> >  2 files changed, 20 insertions(+)
> >
> > diff --git a/board/freescale/ls1043ardb/ls1043ardb.c
> > b/board/freescale/ls1043ardb/ls1043ardb.c
> > index ec5fdbf..5f0a8e7 100644
> > --- a/board/freescale/ls1043ardb/ls1043ardb.c
> > +++ b/board/freescale/ls1043ardb/ls1043ardb.c
> > @@ -9,6 +9,7 @@
> >  #include <asm/io.h>
> >  #include <asm/arch/clock.h>
> >  #include <asm/arch/fsl_serdes.h>
> > +#include <asm/arch/ppa.h>
> >  #include <asm/arch/soc.h>
> >  #include <fdt_support.h>
> >  #include <hwconfig.h>
> > @@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
> > {
> >  	struct ccsr_cci400 *cci = (struct ccsr_cci400
> > *)CONFIG_SYS_CCI400_ADDR;
> > +#ifdef CONFIG_FSL_LS_PPA
> > +	u64 ppa_entry;
> > +#endif
> >
> >  	/*
> >  	 * Set CCI-400 control override register to enable barrier @@ -103,6
> > +107,13 @@ int board_init(void)
> >  	enable_layerscape_ns_access();
> >  #endif
> >
> > +#ifdef CONFIG_FSL_LS_PPA
> > +	ppa_init_pre(&ppa_entry);
> > +
> > +	if (ppa_entry)
> > +		ppa_init_entry((void *)ppa_entry);
> 
> ppa_init_pre() returns the error code. Why don't you use the return value here?

The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.

Thanks,
Zhiqiang

[U-Boot] [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA

[York Sun]

On 05/18/2016 12:37 AM, Zhiqiang Hou wrote:
> Hi York,
> 
> Thanks for your comments and sorry for my delay response due to PTO.
> 
>> -----Original Message-----
>> From: York Sun [mailto:york.sun at nxp.com]
>> Sent: 2016?5?11? 3:48
>> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
>> albert.u.boot at aribaud.net; scottwood at freescale.com;
>> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
>> prabhakar at freescale.com; bhupesh.sharma at freescale.com
>> Cc: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
>> Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
>>
>> On 04/27/2016 06:49 AM, Zhiqiang Hou wrote:
>>> From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
>>>
>>> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
>>> ---
>>> V3:
>>>  - no change
>>>
>>>  board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
>>>  include/configs/ls1043ardb.h            |  9 +++++++++
>>>  2 files changed, 20 insertions(+)
>>>
>>> diff --git a/board/freescale/ls1043ardb/ls1043ardb.c
>>> b/board/freescale/ls1043ardb/ls1043ardb.c
>>> index ec5fdbf..5f0a8e7 100644
>>> --- a/board/freescale/ls1043ardb/ls1043ardb.c
>>> +++ b/board/freescale/ls1043ardb/ls1043ardb.c
>>> @@ -9,6 +9,7 @@
>>>  #include <asm/io.h>
>>>  #include <asm/arch/clock.h>
>>>  #include <asm/arch/fsl_serdes.h>
>>> +#include <asm/arch/ppa.h>
>>>  #include <asm/arch/soc.h>
>>>  #include <fdt_support.h>
>>>  #include <hwconfig.h>
>>> @@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
>>> {
>>>  	struct ccsr_cci400 *cci = (struct ccsr_cci400
>>> *)CONFIG_SYS_CCI400_ADDR;
>>> +#ifdef CONFIG_FSL_LS_PPA
>>> +	u64 ppa_entry;
>>> +#endif
>>>
>>>  	/*
>>>  	 * Set CCI-400 control override register to enable barrier @@ -103,6
>>> +107,13 @@ int board_init(void)
>>>  	enable_layerscape_ns_access();
>>>  #endif
>>>
>>> +#ifdef CONFIG_FSL_LS_PPA
>>> +	ppa_init_pre(&ppa_entry);
>>> +
>>> +	if (ppa_entry)
>>> +		ppa_init_entry((void *)ppa_entry);
>>
>> ppa_init_pre() returns the error code. Why don't you use the return value here?
> 
> The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.
> 

Understood. My suggestion is to use the return error code if the function has
it, unless you have a good reason not to. Please add comment to explain for
future maintenance.

York

[U-Boot] [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table when the PSCI isn't available

[Zhiqiang Hou]

Hi York,

Thanks a lot for your comments!

> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: 2016?5?11? 3:58
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table
> when the PSCI isn't available
> 
> On 04/27/2016 06:50 AM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > If the PSCI and PPA is ready, skip the fixup for spin-table and waking
> > secondary cores. If not, change SMP method to spin-table, and the
> > device node of PSCI will be removed.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V3:
> >  - new patch
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
> > arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31
> > +++++++++++++++++++++++++++++++
> >  2 files changed, 42 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index 672a453..937f7ec 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -23,6 +23,9 @@
> >  #ifdef CONFIG_FSL_ESDHC
> >  #include <fsl_esdhc.h>
> >  #endif
> > +#ifdef CONFIG_FSL_LS_PPA
> > +#include <asm/armv8/sec_firmware.h>
> > +#endif
> >
> >  DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -625,9 +628,14 @@ int arch_early_init_r(void)  #endif
> >
> >  #ifdef CONFIG_MP
> > -	rv = fsl_layerscape_wake_seconday_cores();
> > -	if (rv)
> > -		printf("Did not wake secondary cores\n");
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	if (sec_firmware_validate())
> > +#endif
> > +	{
> > +		rv = fsl_layerscape_wake_seconday_cores();
> > +		if (rv)
> > +			printf("Did not wake secondary cores\n");
> > +	}
> >  #endif
> >
> >  #ifdef CONFIG_SYS_HAS_SERDES
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > index 1e875c4..333b973 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > @@ -20,6 +20,9 @@
> >  #ifdef CONFIG_MP
> >  #include <asm/arch/mp.h>
> >  #endif
> > +#ifdef CONFIG_FSL_LS_PPA
> > +#include <asm/armv8/sec_firmware.h>
> > +#endif
> >
> >  int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t
> > phyc)  { @@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
> >  	int addr_cells;
> >  	u64 val, core_id;
> >  	size_t *boot_code_size = &(__secondary_boot_code_size);
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	int node;
> > +#endif
> > +
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	if (sec_firmware_validate()) {
> > +		/* remove psci DT node */
> > +		node = fdt_path_offset(blob, "/psci");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> >
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +remove_psci_node:
> > +		if (node >= 0)
> > +			fdt_del_node(blob, node);
> > +	} else
> > +		return;
> > +#endif
> >  	off = fdt_path_offset(blob, "/cpus");
> >  	if (off < 0) {
> >  		puts("couldn't find /cpus node\n");
> >
> 
> 
> Zhiqiang,
> 
> I think your patch sequence and logic is backward. To make the transition
> smoothly, we need to make sure U-Boot always works. You can introduce PPA
> with PSCI support. After each patch applied, U-Boot should still work. I suggest
> you to check if PPA/PSCI is available before fixing up device tree. You can also
> switch to PSCI to boot secondary cores by then.

Yes, will refactor the patchset according to your suggestion. 

Thanks,
Zhiqiang

[U-Boot] [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: 2016?5?18? 23:16
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>
> Cc: u-boot at lists.denx.de; albert.u.boot at aribaud.net; Scott Wood
> <oss@buserror.net>; Mingkai.hu at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com; Hou Zhiqiang
> <Zhiqiang.Hou@freescale.com>
> Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
> 
> On 05/18/2016 12:37 AM, Zhiqiang Hou wrote:
> > Hi York,
> >
> > Thanks for your comments and sorry for my delay response due to PTO.
> >
> >> -----Original Message-----
> >> From: York Sun [mailto:york.sun at nxp.com]
> >> Sent: 2016?5?11? 3:48
> >> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> >> albert.u.boot at aribaud.net; scottwood at freescale.com;
> >> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> >> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> >> Cc: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> >> Subject: Re: [PATCH v3 3/7] ARMv8/ls1043ardb: Integrate FSL PPA
> >>
> >> On 04/27/2016 06:49 AM, Zhiqiang Hou wrote:
> >>> From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> >>>
> >>> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
> >>> ---
> >>> V3:
> >>>  - no change
> >>>
> >>>  board/freescale/ls1043ardb/ls1043ardb.c | 11 +++++++++++
> >>>  include/configs/ls1043ardb.h            |  9 +++++++++
> >>>  2 files changed, 20 insertions(+)
> >>>
> >>> diff --git a/board/freescale/ls1043ardb/ls1043ardb.c
> >>> b/board/freescale/ls1043ardb/ls1043ardb.c
> >>> index ec5fdbf..5f0a8e7 100644
> >>> --- a/board/freescale/ls1043ardb/ls1043ardb.c
> >>> +++ b/board/freescale/ls1043ardb/ls1043ardb.c
> >>> @@ -9,6 +9,7 @@
> >>>  #include <asm/io.h>
> >>>  #include <asm/arch/clock.h>
> >>>  #include <asm/arch/fsl_serdes.h>
> >>> +#include <asm/arch/ppa.h>
> >>>  #include <asm/arch/soc.h>
> >>>  #include <fdt_support.h>
> >>>  #include <hwconfig.h>
> >>> @@ -84,6 +85,9 @@ int board_early_init_f(void)  int board_init(void)
> >>> {
> >>>  	struct ccsr_cci400 *cci = (struct ccsr_cci400
> >>> *)CONFIG_SYS_CCI400_ADDR;
> >>> +#ifdef CONFIG_FSL_LS_PPA
> >>> +	u64 ppa_entry;
> >>> +#endif
> >>>
> >>>  	/*
> >>>  	 * Set CCI-400 control override register to enable barrier @@
> >>> -103,6
> >>> +107,13 @@ int board_init(void)
> >>>  	enable_layerscape_ns_access();
> >>>  #endif
> >>>
> >>> +#ifdef CONFIG_FSL_LS_PPA
> >>> +	ppa_init_pre(&ppa_entry);
> >>> +
> >>> +	if (ppa_entry)
> >>> +		ppa_init_entry((void *)ppa_entry);
> >>
> >> ppa_init_pre() returns the error code. Why don't you use the return value here?
> >
> > The function ppa_init_pre() will set the ppa_entry to 0x0 if any error occurred.
> >
> 
> Understood. My suggestion is to use the return error code if the function has it,
> unless you have a good reason not to. Please add comment to explain for future
> maintenance.

Added the operation to check the return value. I have refactored the patchset and
reordered the sequence of the patches in version 4.

Thanks,
Zhiqiang