* [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset
@ 2019-03-22 19:00 Heiner Kallweit
2019-03-24 0:59 ` Florian Fainelli
2019-03-26 0:09 ` David Miller
0 siblings, 2 replies; 3+ messages in thread
From: Heiner Kallweit @ 2019-03-22 19:00 UTC (permalink / raw)
To: Andrew Lunn, Florian Fainelli, David Miller; +Cc: netdev, Phil Reid, liweihang
So far we effectively clear the BMCR register. Some PHY's can deal
with this (e.g. because they reset BMCR to a default as part of a
soft-reset) whilst on others this causes issues because e.g. the
autoneg bit is cleared. Marvell is an example, see also thread [0].
So let's be a little bit more gentle and leave all bits we're not
interested in as-is. This change is needed for PHY drivers to
properly deal with the original patch.
[0] https://marc.info/?t=155264050700001&r=1&w=2
Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset")
Tested-by: Phil Reid <preid@electromag.com.au>
Tested-by: liweihang <liweihang@hisilicon.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/phy/phy_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 49fdd1ee7..77068c545 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1831,7 +1831,7 @@ int genphy_soft_reset(struct phy_device *phydev)
{
int ret;
- ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
+ ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET);
if (ret < 0)
return ret;
--
2.21.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset
2019-03-22 19:00 [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset Heiner Kallweit
@ 2019-03-24 0:59 ` Florian Fainelli
2019-03-26 0:09 ` David Miller
1 sibling, 0 replies; 3+ messages in thread
From: Florian Fainelli @ 2019-03-24 0:59 UTC (permalink / raw)
To: Heiner Kallweit, Andrew Lunn, David Miller; +Cc: netdev, Phil Reid, liweihang
On 3/22/2019 12:00 PM, Heiner Kallweit wrote:
> So far we effectively clear the BMCR register. Some PHY's can deal
> with this (e.g. because they reset BMCR to a default as part of a
> soft-reset) whilst on others this causes issues because e.g. the
> autoneg bit is cleared. Marvell is an example, see also thread [0].
> So let's be a little bit more gentle and leave all bits we're not
> interested in as-is. This change is needed for PHY drivers to
> properly deal with the original patch.
>
> [0] https://marc.info/?t=155264050700001&r=1&w=2
>
> Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset")
> Tested-by: Phil Reid <preid@electromag.com.au>
> Tested-by: liweihang <liweihang@hisilicon.com>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Thanks for investigating and coming up with a fix for this!
> ---
> drivers/net/phy/phy_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
> index 49fdd1ee7..77068c545 100644
> --- a/drivers/net/phy/phy_device.c
> +++ b/drivers/net/phy/phy_device.c
> @@ -1831,7 +1831,7 @@ int genphy_soft_reset(struct phy_device *phydev)
> {
> int ret;
>
> - ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
> + ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET);
> if (ret < 0)
> return ret;
>
>
--
Florian
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset
2019-03-22 19:00 [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset Heiner Kallweit
2019-03-24 0:59 ` Florian Fainelli
@ 2019-03-26 0:09 ` David Miller
1 sibling, 0 replies; 3+ messages in thread
From: David Miller @ 2019-03-26 0:09 UTC (permalink / raw)
To: hkallweit1; +Cc: andrew, f.fainelli, netdev, preid, liweihang
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 22 Mar 2019 20:00:20 +0100
> So far we effectively clear the BMCR register. Some PHY's can deal
> with this (e.g. because they reset BMCR to a default as part of a
> soft-reset) whilst on others this causes issues because e.g. the
> autoneg bit is cleared. Marvell is an example, see also thread [0].
> So let's be a little bit more gentle and leave all bits we're not
> interested in as-is. This change is needed for PHY drivers to
> properly deal with the original patch.
>
> [0] https://marc.info/?t=155264050700001&r=1&w=2
>
> Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset")
> Tested-by: Phil Reid <preid@electromag.com.au>
> Tested-by: liweihang <liweihang@hisilicon.com>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Applied and queued up for -stable, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-03-26 0:13 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-03-22 19:00 [PATCH net] net: phy: don't clear BMCR in genphy_soft_reset Heiner Kallweit
2019-03-24 0:59 ` Florian Fainelli
2019-03-26 0:09 ` David Miller
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