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* [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
@ 2020-09-30 13:18 Will Deacon
  2020-10-01  1:55 ` Gavin Shan
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Will Deacon @ 2020-09-30 13:18 UTC (permalink / raw)
  To: kvmarm; +Cc: Will Deacon, kernel-team, Marc Zyngier

Alex pointed out that we don't pass a level hint to the TLBI instruction
when handling a stage-2 permission fault, even though the walker does
at some point have the level information in its hands.

Rework stage2_update_leaf_attrs() so that it can optionally return the
level of the updated pte to its caller, which can in turn be used to
provide the correct TLBI level hint.

Cc: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/595cc73e-636e-8b3a-f93a-b4e9fb218db8@arm.com
Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/kvm/hyp/pgtable.c | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index 603d6b415337..0cdf6e461cbd 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -694,6 +694,7 @@ struct stage2_attr_data {
 	kvm_pte_t	attr_set;
 	kvm_pte_t	attr_clr;
 	kvm_pte_t	pte;
+	u32		level;
 };
 
 static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
@@ -706,6 +707,7 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
 	if (!kvm_pte_valid(pte))
 		return 0;
 
+	data->level = level;
 	data->pte = pte;
 	pte &= ~data->attr_clr;
 	pte |= data->attr_set;
@@ -723,7 +725,8 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
 
 static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
 				    u64 size, kvm_pte_t attr_set,
-				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte)
+				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte,
+				    u32 *level)
 {
 	int ret;
 	kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI;
@@ -743,20 +746,24 @@ static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
 
 	if (orig_pte)
 		*orig_pte = data.pte;
+
+	if (level)
+		*level = data.level;
 	return 0;
 }
 
 int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
 {
 	return stage2_update_leaf_attrs(pgt, addr, size, 0,
-					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, NULL);
+					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
+					NULL, NULL);
 }
 
 kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
 {
 	kvm_pte_t pte = 0;
 	stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0,
-				 &pte);
+				 &pte, NULL);
 	dsb(ishst);
 	return pte;
 }
@@ -765,7 +772,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
 {
 	kvm_pte_t pte = 0;
 	stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF,
-				 &pte);
+				 &pte, NULL);
 	/*
 	 * "But where's the TLBI?!", you scream.
 	 * "Over in the core code", I sigh.
@@ -778,7 +785,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
 bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr)
 {
 	kvm_pte_t pte = 0;
-	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte);
+	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL);
 	return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF;
 }
 
@@ -786,6 +793,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
 				   enum kvm_pgtable_prot prot)
 {
 	int ret;
+	u32 level;
 	kvm_pte_t set = 0, clr = 0;
 
 	if (prot & KVM_PGTABLE_PROT_R)
@@ -797,8 +805,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
 	if (prot & KVM_PGTABLE_PROT_X)
 		clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
 
-	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL);
-	kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, 0);
+	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level);
+	if (!ret)
+		kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level);
 	return ret;
 }
 
-- 
2.28.0.709.gb0816b6eb0-goog

_______________________________________________
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kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
  2020-09-30 13:18 [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault Will Deacon
@ 2020-10-01  1:55 ` Gavin Shan
  2020-10-01 10:13 ` Alexandru Elisei
  2020-10-02  8:20   ` Marc Zyngier
  2 siblings, 0 replies; 6+ messages in thread
From: Gavin Shan @ 2020-10-01  1:55 UTC (permalink / raw)
  To: Will Deacon, kvmarm; +Cc: Marc Zyngier, kernel-team

On 9/30/20 11:18 PM, Will Deacon wrote:
> Alex pointed out that we don't pass a level hint to the TLBI instruction
> when handling a stage-2 permission fault, even though the walker does
> at some point have the level information in its hands.
> 
> Rework stage2_update_leaf_attrs() so that it can optionally return the
> level of the updated pte to its caller, which can in turn be used to
> provide the correct TLBI level hint.
> 
> Cc: Marc Zyngier <maz@kernel.org>
> Link: https://lore.kernel.org/r/595cc73e-636e-8b3a-f93a-b4e9fb218db8@arm.com
> Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
>   arch/arm64/kvm/hyp/pgtable.c | 23 ++++++++++++++++-------
>   1 file changed, 16 insertions(+), 7 deletions(-)
> 

Reviewed-by: Gavin Shan <gshan@redhat.com>

> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 603d6b415337..0cdf6e461cbd 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -694,6 +694,7 @@ struct stage2_attr_data {
>   	kvm_pte_t	attr_set;
>   	kvm_pte_t	attr_clr;
>   	kvm_pte_t	pte;
> +	u32		level;
>   };
>   
>   static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
> @@ -706,6 +707,7 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
>   	if (!kvm_pte_valid(pte))
>   		return 0;
>   
> +	data->level = level;
>   	data->pte = pte;
>   	pte &= ~data->attr_clr;
>   	pte |= data->attr_set;
> @@ -723,7 +725,8 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
>   
>   static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
>   				    u64 size, kvm_pte_t attr_set,
> -				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte)
> +				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte,
> +				    u32 *level)
>   {
>   	int ret;
>   	kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI;
> @@ -743,20 +746,24 @@ static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
>   
>   	if (orig_pte)
>   		*orig_pte = data.pte;
> +
> +	if (level)
> +		*level = data.level;
>   	return 0;
>   }
>   
>   int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
>   {
>   	return stage2_update_leaf_attrs(pgt, addr, size, 0,
> -					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, NULL);
> +					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
> +					NULL, NULL);
>   }
>   
>   kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
>   {
>   	kvm_pte_t pte = 0;
>   	stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0,
> -				 &pte);
> +				 &pte, NULL);
>   	dsb(ishst);
>   	return pte;
>   }
> @@ -765,7 +772,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
>   {
>   	kvm_pte_t pte = 0;
>   	stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF,
> -				 &pte);
> +				 &pte, NULL);
>   	/*
>   	 * "But where's the TLBI?!", you scream.
>   	 * "Over in the core code", I sigh.
> @@ -778,7 +785,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
>   bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr)
>   {
>   	kvm_pte_t pte = 0;
> -	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte);
> +	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL);
>   	return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF;
>   }
>   
> @@ -786,6 +793,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
>   				   enum kvm_pgtable_prot prot)
>   {
>   	int ret;
> +	u32 level;
>   	kvm_pte_t set = 0, clr = 0;
>   
>   	if (prot & KVM_PGTABLE_PROT_R)
> @@ -797,8 +805,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
>   	if (prot & KVM_PGTABLE_PROT_X)
>   		clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
>   
> -	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL);
> -	kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, 0);
> +	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level);
> +	if (!ret)
> +		kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level);
>   	return ret;
>   }
>   
> 

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
  2020-09-30 13:18 [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault Will Deacon
  2020-10-01  1:55 ` Gavin Shan
@ 2020-10-01 10:13 ` Alexandru Elisei
  2020-10-02  8:20   ` Marc Zyngier
  2 siblings, 0 replies; 6+ messages in thread
From: Alexandru Elisei @ 2020-10-01 10:13 UTC (permalink / raw)
  To: Will Deacon, kvmarm; +Cc: Marc Zyngier, kernel-team

Hi,

On 9/30/20 2:18 PM, Will Deacon wrote:
> Alex pointed out that we don't pass a level hint to the TLBI instruction
> when handling a stage-2 permission fault, even though the walker does
> at some point have the level information in its hands.
>
> Rework stage2_update_leaf_attrs() so that it can optionally return the
> level of the updated pte to its caller, which can in turn be used to
> provide the correct TLBI level hint.

Looks correct to me. I checked and all the functions that don't do a tlbi pass
NULL as the level pointer, and the level parameter is always set by the walker
algorithm (if level had an invalid value, no invalidation would have been performed):

Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>

Thanks,
Alex
>
> Cc: Marc Zyngier <maz@kernel.org>
> Link: https://lore.kernel.org/r/595cc73e-636e-8b3a-f93a-b4e9fb218db8@arm.com
> Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
>  arch/arm64/kvm/hyp/pgtable.c | 23 ++++++++++++++++-------
>  1 file changed, 16 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 603d6b415337..0cdf6e461cbd 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -694,6 +694,7 @@ struct stage2_attr_data {
>  	kvm_pte_t	attr_set;
>  	kvm_pte_t	attr_clr;
>  	kvm_pte_t	pte;
> +	u32		level;
>  };
>  
>  static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
> @@ -706,6 +707,7 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
>  	if (!kvm_pte_valid(pte))
>  		return 0;
>  
> +	data->level = level;
>  	data->pte = pte;
>  	pte &= ~data->attr_clr;
>  	pte |= data->attr_set;
> @@ -723,7 +725,8 @@ static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
>  
>  static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
>  				    u64 size, kvm_pte_t attr_set,
> -				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte)
> +				    kvm_pte_t attr_clr, kvm_pte_t *orig_pte,
> +				    u32 *level)
>  {
>  	int ret;
>  	kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI;
> @@ -743,20 +746,24 @@ static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
>  
>  	if (orig_pte)
>  		*orig_pte = data.pte;
> +
> +	if (level)
> +		*level = data.level;
>  	return 0;
>  }
>  
>  int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
>  {
>  	return stage2_update_leaf_attrs(pgt, addr, size, 0,
> -					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, NULL);
> +					KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
> +					NULL, NULL);
>  }
>  
>  kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
>  {
>  	kvm_pte_t pte = 0;
>  	stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0,
> -				 &pte);
> +				 &pte, NULL);
>  	dsb(ishst);
>  	return pte;
>  }
> @@ -765,7 +772,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
>  {
>  	kvm_pte_t pte = 0;
>  	stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF,
> -				 &pte);
> +				 &pte, NULL);
>  	/*
>  	 * "But where's the TLBI?!", you scream.
>  	 * "Over in the core code", I sigh.
> @@ -778,7 +785,7 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
>  bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr)
>  {
>  	kvm_pte_t pte = 0;
> -	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte);
> +	stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL);
>  	return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF;
>  }
>  
> @@ -786,6 +793,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
>  				   enum kvm_pgtable_prot prot)
>  {
>  	int ret;
> +	u32 level;
>  	kvm_pte_t set = 0, clr = 0;
>  
>  	if (prot & KVM_PGTABLE_PROT_R)
> @@ -797,8 +805,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
>  	if (prot & KVM_PGTABLE_PROT_X)
>  		clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
>  
> -	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL);
> -	kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, 0);
> +	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level);
> +	if (!ret)
> +		kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level);
>  	return ret;
>  }
>  
_______________________________________________
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https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
  2020-09-30 13:18 [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault Will Deacon
  2020-10-01  1:55 ` Gavin Shan
@ 2020-10-02  8:20   ` Marc Zyngier
  2020-10-02  8:20   ` Marc Zyngier
  2 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2020-10-02  8:20 UTC (permalink / raw)
  To: kvmarm, David Brazdil, Will Deacon
  Cc: linux-arm-kernel, linux-kernel, Dennis Zhou, Catalin Marinas,
	Tejun Heo, kernel-team, Christoph Lameter

On Wed, 30 Sep 2020 14:18:01 +0100, Will Deacon wrote:
> Alex pointed out that we don't pass a level hint to the TLBI instruction
> when handling a stage-2 permission fault, even though the walker does
> at some point have the level information in its hands.
> 
> Rework stage2_update_leaf_attrs() so that it can optionally return the
> level of the updated pte to its caller, which can in turn be used to
> provide the correct TLBI level hint.

Applied to next, thanks!

[1/1] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
      commit: b259d137e91d80bf92eac453ffab179eb7941ede

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.



^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
@ 2020-10-02  8:20   ` Marc Zyngier
  0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2020-10-02  8:20 UTC (permalink / raw)
  To: kvmarm, David Brazdil, Will Deacon
  Cc: Catalin Marinas, linux-kernel, Tejun Heo, Dennis Zhou,
	Christoph Lameter, kernel-team, linux-arm-kernel

On Wed, 30 Sep 2020 14:18:01 +0100, Will Deacon wrote:
> Alex pointed out that we don't pass a level hint to the TLBI instruction
> when handling a stage-2 permission fault, even though the walker does
> at some point have the level information in its hands.
> 
> Rework stage2_update_leaf_attrs() so that it can optionally return the
> level of the updated pte to its caller, which can in turn be used to
> provide the correct TLBI level hint.

Applied to next, thanks!

[1/1] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
      commit: b259d137e91d80bf92eac453ffab179eb7941ede

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.


_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
@ 2020-10-02  8:20   ` Marc Zyngier
  0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2020-10-02  8:20 UTC (permalink / raw)
  To: kvmarm, David Brazdil, Will Deacon
  Cc: Catalin Marinas, linux-kernel, Tejun Heo, Dennis Zhou,
	Christoph Lameter, kernel-team, linux-arm-kernel

On Wed, 30 Sep 2020 14:18:01 +0100, Will Deacon wrote:
> Alex pointed out that we don't pass a level hint to the TLBI instruction
> when handling a stage-2 permission fault, even though the walker does
> at some point have the level information in its hands.
> 
> Rework stage2_update_leaf_attrs() so that it can optionally return the
> level of the updated pte to its caller, which can in turn be used to
> provide the correct TLBI level hint.

Applied to next, thanks!

[1/1] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault
      commit: b259d137e91d80bf92eac453ffab179eb7941ede

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-10-02  8:21 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-30 13:18 [PATCH] KVM: arm64: Pass level hint to TLBI during stage-2 permission fault Will Deacon
2020-10-01  1:55 ` Gavin Shan
2020-10-01 10:13 ` Alexandru Elisei
2020-10-02  8:20 ` Marc Zyngier
2020-10-02  8:20   ` Marc Zyngier
2020-10-02  8:20   ` Marc Zyngier

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