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From: "Michał Leszczyński" <michal.leszczynski@cert.pl>
To: Xen-devel <xen-devel@lists.xenproject.org>
Cc: "Kang, Luwei" <luwei.kang@intel.com>, "Wei Liu" <wl@xen.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Tamas K Lengyel" <tamas.k.lengyel@gmail.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v2 2/7] x86/vmx: add Intel PT MSR definitions
Date: Fri, 19 Jun 2020 01:39:35 +0200 (CEST)	[thread overview]
Message-ID: <61296395.9820908.1592523575731.JavaMail.zimbra@cert.pl> (raw)
In-Reply-To: <122238637.9820857.1592523264685.JavaMail.zimbra@cert.pl>

Define constants related to Intel Processor Trace features.

Signed-off-by: Michal Leszczynski <michal.leszczynski@cert.pl>
---
 xen/include/asm-x86/msr-index.h | 37 +++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index b328a47ed8..812516f340 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -621,4 +621,41 @@
 #define MSR_PKGC9_IRTL			0x00000634
 #define MSR_PKGC10_IRTL			0x00000635
 
+/* Intel PT MSRs */
+#define MSR_RTIT_OUTPUT_BASE           0x00000560
+#define MSR_RTIT_OUTPUT_MASK           0x00000561
+#define MSR_RTIT_CTL                   0x00000570
+#define RTIT_CTL_TRACEEN               (_AC(1, ULL) << 0)
+#define RTIT_CTL_CYCEN                 (_AC(1, ULL) << 1)
+#define RTIT_CTL_OS                    (_AC(1, ULL) << 2)
+#define RTIT_CTL_USR                   (_AC(1, ULL) << 3)
+#define RTIT_CTL_PWR_EVT_EN            (_AC(1, ULL) << 4)
+#define RTIT_CTL_FUP_ON_PTW            (_AC(1, ULL) << 5)
+#define RTIT_CTL_FABRIC_EN             (_AC(1, ULL) << 6)
+#define RTIT_CTL_CR3_FILTER            (_AC(1, ULL) << 7)
+#define RTIT_CTL_TOPA                  (_AC(1, ULL) << 8)
+#define RTIT_CTL_MTC_EN                (_AC(1, ULL) << 9)
+#define RTIT_CTL_TSC_EN                (_AC(1, ULL) << 10)
+#define RTIT_CTL_DIS_RETC              (_AC(1, ULL) << 11)
+#define RTIT_CTL_PTW_EN                (_AC(1, ULL) << 12)
+#define RTIT_CTL_BRANCH_EN             (_AC(1, ULL) << 13)
+#define RTIT_CTL_MTC_FREQ_OFFSET       14
+#define RTIT_CTL_MTC_FREQ              (0x0fULL << RTIT_CTL_MTC_FREQ_OFFSET)
+#define RTIT_CTL_CYC_THRESH_OFFSET     19
+#define RTIT_CTL_CYC_THRESH            (0x0fULL << RTIT_CTL_CYC_THRESH_OFFSET)
+#define RTIT_CTL_PSB_FREQ_OFFSET       24
+#define RTIT_CTL_PSB_FREQ              (0x0fULL << RTIT_CTL_PSB_FREQ_OFFSET)
+#define RTIT_CTL_ADDR_OFFSET(n)        (32 + 4 * (n))
+#define RTIT_CTL_ADDR(n)               (0x0fULL << RTIT_CTL_ADDR_OFFSET(n))
+#define MSR_RTIT_STATUS                0x00000571
+#define RTIT_STATUS_FILTER_EN          (_AC(1, ULL) << 0)
+#define RTIT_STATUS_CONTEXT_EN         (_AC(1, ULL) << 1)
+#define RTIT_STATUS_TRIGGER_EN         (_AC(1, ULL) << 2)
+#define RTIT_STATUS_ERROR              (_AC(1, ULL) << 4)
+#define RTIT_STATUS_STOPPED            (_AC(1, ULL) << 5)
+#define RTIT_STATUS_BYTECNT            (0x1ffffULL << 32)
+#define MSR_RTIT_CR3_MATCH             0x00000572
+#define MSR_RTIT_ADDR_A(n)             (0x00000580 + (n) * 2)
+#define MSR_RTIT_ADDR_B(n)             (0x00000581 + (n) * 2)
+
 #endif /* __ASM_MSR_INDEX_H */
-- 
2.20.1



  parent reply	other threads:[~2020-06-18 23:40 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-18 23:34 [PATCH v2 0/7] Implement support for external IPT monitoring Michał Leszczyński
2020-06-18 23:38 ` [PATCH v2 1/7] xen/mm: lift 32 item limit from mfn/gfn arrays Michał Leszczyński
2020-06-19 11:34   ` Roger Pau Monné
2020-06-19 11:36     ` Michał Leszczyński
2020-06-19 11:48       ` Jan Beulich
2020-06-19 11:51         ` Michał Leszczyński
2020-06-19 12:35     ` Michał Leszczyński
2020-06-19 12:39       ` Jan Beulich
2020-06-22  3:00         ` Michał Leszczyński
2020-06-18 23:39 ` Michał Leszczyński [this message]
2020-06-22 12:35   ` [PATCH v2 2/7] x86/vmx: add Intel PT MSR definitions Jan Beulich
2020-06-18 23:40 ` [PATCH v2 3/7] x86/vmx: add IPT cpu feature Michał Leszczyński
2020-06-19 13:44   ` Roger Pau Monné
2020-06-19 14:22     ` Michał Leszczyński
2020-06-19 15:31       ` Roger Pau Monné
2020-06-22  2:49     ` Michał Leszczyński
2020-06-22  8:31       ` Jan Beulich
2020-06-22 12:40   ` Jan Beulich
2020-06-18 23:41 ` [PATCH v2 4/7] x86/vmx: add do_vmtrace_op Michał Leszczyński
2020-06-19  0:46   ` Michał Leszczyński
2020-06-19 15:30   ` Roger Pau Monné
2020-06-19 15:50     ` Jan Beulich
2020-06-22  2:45       ` Michał Leszczyński
2020-06-22  2:56   ` Michał Leszczyński
2020-06-22  8:39     ` Jan Beulich
2020-06-22 13:25   ` Jan Beulich
2020-06-22 14:35     ` Michał Leszczyński
2020-06-22 15:22       ` Jan Beulich
2020-06-22 16:02         ` Michał Leszczyński
2020-06-22 16:16           ` Jan Beulich
2020-06-22 16:22             ` Michał Leszczyński
2020-06-22 16:25             ` Roger Pau Monné
2020-06-22 16:33               ` Michał Leszczyński
2020-06-23  1:04             ` Michał Leszczyński
2020-06-23  8:51               ` Jan Beulich
2020-06-23 17:24                 ` Andrew Cooper
2020-06-24 10:03                   ` Jan Beulich
2020-06-24 12:40                     ` Andrew Cooper
2020-06-24 12:52                       ` Tamas K Lengyel
2020-06-24 12:23                   ` Michał Leszczyński
2020-06-22 17:05           ` Michał Leszczyński
2020-06-23  8:49             ` Jan Beulich
2020-06-18 23:41 ` [PATCH v2 5/7] tools/libxc: add xc_vmtrace_* functions Michał Leszczyński
2020-06-18 23:42 ` [PATCH v2 6/7] tools/libxl: add vmtrace_pt_size parameter Michał Leszczyński
2020-06-18 23:42 ` [PATCH v2 7/7] tools/proctrace: add proctrace tool Michał Leszczyński
2020-06-18 23:51 ` [PATCH v2 0/7] Implement support for external IPT monitoring Michał Leszczyński

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