All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Michał Leszczyński" <michal.leszczynski@cert.pl>
To: Xen-devel <xen-devel@lists.xenproject.org>
Cc: "Kevin Tian" <kevin.tian@intel.com>,
	"Kang, Luwei" <luwei.kang@intel.com>,
	"Jun Nakajima" <jun.nakajima@intel.com>, "Wei Liu" <wl@xen.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Tamas K Lengyel" <tamas.k.lengyel@gmail.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v2 3/7] x86/vmx: add IPT cpu feature
Date: Fri, 19 Jun 2020 01:40:21 +0200 (CEST)	[thread overview]
Message-ID: <626789888.9820937.1592523621821.JavaMail.zimbra@cert.pl> (raw)
In-Reply-To: <122238637.9820857.1592523264685.JavaMail.zimbra@cert.pl>

Check if Intel Processor Trace feature is supported by current
processor. Define hvm_ipt_supported function.

Signed-off-by: Michal Leszczynski <michal.leszczynski@cert.pl>
---
 xen/arch/x86/hvm/vmx/vmcs.c                 | 4 ++++
 xen/include/asm-x86/cpufeature.h            | 1 +
 xen/include/asm-x86/hvm/hvm.h               | 9 +++++++++
 xen/include/asm-x86/hvm/vmx/vmcs.h          | 1 +
 xen/include/public/arch-x86/cpufeatureset.h | 1 +
 5 files changed, 16 insertions(+)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index ca94c2bedc..8466ccb912 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -315,6 +315,10 @@ static int vmx_init_vmcs_config(void)
         if ( opt_ept_pml )
             opt |= SECONDARY_EXEC_ENABLE_PML;
 
+        /* Check whether IPT is supported in VMX operation */
+        hvm_funcs.pt_supported = cpu_has_ipt &&
+            ( _vmx_misc_cap & VMX_MISC_PT_SUPPORTED );
+
         /*
          * "APIC Register Virtualization" and "Virtual Interrupt Delivery"
          * can be set only when "use TPR shadow" is set
diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h
index f790d5c1f8..8d7955dd87 100644
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -104,6 +104,7 @@
 #define cpu_has_clwb            boot_cpu_has(X86_FEATURE_CLWB)
 #define cpu_has_avx512er        boot_cpu_has(X86_FEATURE_AVX512ER)
 #define cpu_has_avx512cd        boot_cpu_has(X86_FEATURE_AVX512CD)
+#define cpu_has_ipt             boot_cpu_has(X86_FEATURE_IPT)
 #define cpu_has_sha             boot_cpu_has(X86_FEATURE_SHA)
 #define cpu_has_avx512bw        boot_cpu_has(X86_FEATURE_AVX512BW)
 #define cpu_has_avx512vl        boot_cpu_has(X86_FEATURE_AVX512VL)
diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h
index 1eb377dd82..8c0d0ece67 100644
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -96,6 +96,9 @@ struct hvm_function_table {
     /* Necessary hardware support for alternate p2m's? */
     bool altp2m_supported;
 
+    /* Hardware support for processor tracing? */
+    bool pt_supported;
+
     /* Hardware virtual interrupt delivery enable? */
     bool virtual_intr_delivery_enabled;
 
@@ -630,6 +633,12 @@ static inline bool hvm_altp2m_supported(void)
     return hvm_funcs.altp2m_supported;
 }
 
+/* returns true if hardware supports Intel Processor Trace */
+static inline bool hvm_pt_supported(void)
+{
+    return hvm_funcs.pt_supported;
+}
+
 /* updates the current hardware p2m */
 static inline void altp2m_vcpu_update_p2m(struct vcpu *v)
 {
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h b/xen/include/asm-x86/hvm/vmx/vmcs.h
index 906810592f..4c81093aba 100644
--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
@@ -285,6 +285,7 @@ extern u64 vmx_ept_vpid_cap;
 
 #define VMX_MISC_CR3_TARGET                     0x01ff0000
 #define VMX_MISC_VMWRITE_ALL                    0x20000000
+#define VMX_MISC_PT_SUPPORTED                   0x00004000
 
 #define VMX_TSC_MULTIPLIER_MAX                  0xffffffffffffffffULL
 
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 5ca35d9d97..0d3f15f628 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -217,6 +217,7 @@ XEN_CPUFEATURE(SMAP,          5*32+20) /*S  Supervisor Mode Access Prevention */
 XEN_CPUFEATURE(AVX512_IFMA,   5*32+21) /*A  AVX-512 Integer Fused Multiply Add */
 XEN_CPUFEATURE(CLFLUSHOPT,    5*32+23) /*A  CLFLUSHOPT instruction */
 XEN_CPUFEATURE(CLWB,          5*32+24) /*A  CLWB instruction */
+XEN_CPUFEATURE(IPT,           5*32+25) /*   Intel Processor Trace */
 XEN_CPUFEATURE(AVX512PF,      5*32+26) /*A  AVX-512 Prefetch Instructions */
 XEN_CPUFEATURE(AVX512ER,      5*32+27) /*A  AVX-512 Exponent & Reciprocal Instrs */
 XEN_CPUFEATURE(AVX512CD,      5*32+28) /*A  AVX-512 Conflict Detection Instrs */
-- 
2.20.1



  parent reply	other threads:[~2020-06-18 23:41 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-18 23:34 [PATCH v2 0/7] Implement support for external IPT monitoring Michał Leszczyński
2020-06-18 23:38 ` [PATCH v2 1/7] xen/mm: lift 32 item limit from mfn/gfn arrays Michał Leszczyński
2020-06-19 11:34   ` Roger Pau Monné
2020-06-19 11:36     ` Michał Leszczyński
2020-06-19 11:48       ` Jan Beulich
2020-06-19 11:51         ` Michał Leszczyński
2020-06-19 12:35     ` Michał Leszczyński
2020-06-19 12:39       ` Jan Beulich
2020-06-22  3:00         ` Michał Leszczyński
2020-06-18 23:39 ` [PATCH v2 2/7] x86/vmx: add Intel PT MSR definitions Michał Leszczyński
2020-06-22 12:35   ` Jan Beulich
2020-06-18 23:40 ` Michał Leszczyński [this message]
2020-06-19 13:44   ` [PATCH v2 3/7] x86/vmx: add IPT cpu feature Roger Pau Monné
2020-06-19 14:22     ` Michał Leszczyński
2020-06-19 15:31       ` Roger Pau Monné
2020-06-22  2:49     ` Michał Leszczyński
2020-06-22  8:31       ` Jan Beulich
2020-06-22 12:40   ` Jan Beulich
2020-06-18 23:41 ` [PATCH v2 4/7] x86/vmx: add do_vmtrace_op Michał Leszczyński
2020-06-19  0:46   ` Michał Leszczyński
2020-06-19 15:30   ` Roger Pau Monné
2020-06-19 15:50     ` Jan Beulich
2020-06-22  2:45       ` Michał Leszczyński
2020-06-22  2:56   ` Michał Leszczyński
2020-06-22  8:39     ` Jan Beulich
2020-06-22 13:25   ` Jan Beulich
2020-06-22 14:35     ` Michał Leszczyński
2020-06-22 15:22       ` Jan Beulich
2020-06-22 16:02         ` Michał Leszczyński
2020-06-22 16:16           ` Jan Beulich
2020-06-22 16:22             ` Michał Leszczyński
2020-06-22 16:25             ` Roger Pau Monné
2020-06-22 16:33               ` Michał Leszczyński
2020-06-23  1:04             ` Michał Leszczyński
2020-06-23  8:51               ` Jan Beulich
2020-06-23 17:24                 ` Andrew Cooper
2020-06-24 10:03                   ` Jan Beulich
2020-06-24 12:40                     ` Andrew Cooper
2020-06-24 12:52                       ` Tamas K Lengyel
2020-06-24 12:23                   ` Michał Leszczyński
2020-06-22 17:05           ` Michał Leszczyński
2020-06-23  8:49             ` Jan Beulich
2020-06-18 23:41 ` [PATCH v2 5/7] tools/libxc: add xc_vmtrace_* functions Michał Leszczyński
2020-06-18 23:42 ` [PATCH v2 6/7] tools/libxl: add vmtrace_pt_size parameter Michał Leszczyński
2020-06-18 23:42 ` [PATCH v2 7/7] tools/proctrace: add proctrace tool Michał Leszczyński
2020-06-18 23:51 ` [PATCH v2 0/7] Implement support for external IPT monitoring Michał Leszczyński

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=626789888.9820937.1592523621821.JavaMail.zimbra@cert.pl \
    --to=michal.leszczynski@cert.pl \
    --cc=andrew.cooper3@citrix.com \
    --cc=jbeulich@suse.com \
    --cc=jun.nakajima@intel.com \
    --cc=kevin.tian@intel.com \
    --cc=luwei.kang@intel.com \
    --cc=roger.pau@citrix.com \
    --cc=tamas.k.lengyel@gmail.com \
    --cc=wl@xen.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.