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From: Julien Grall <julien.grall@arm.com>
To: Mirela Simonovic <mirela.simonovic@aggios.com>
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Xen Devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2 02/10] xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2)
Date: Tue, 24 Apr 2018 17:12:03 +0100	[thread overview]
Message-ID: <62877ebd-a2c5-d3a9-18e2-4d3a91924e16@arm.com> (raw)
In-Reply-To: <CAKPH-NjTFs0uVBZ9vm4qN_0UestT-fwDpivKq1hCe8BwA-ppDg@mail.gmail.com>

Hi Mirela,

On 04/24/2018 12:02 PM, Mirela Simonovic wrote:
> Hi Julien,
> 
> On Mon, Apr 23, 2018 at 1:15 PM, Julien Grall <julien.grall@arm.com> wrote:
>> Hi Mirela,
>>
>>
>> On 20/04/18 13:25, Mirela Simonovic wrote:
>>>
>>> Guests attempt to write into these registers on resume (for example
>>> Linux).
>>> Without this patch a data abort exception will be raised to the guest.
>>> This patch handles the write access by ignoring it, but only if the value
>>> to be written is zero. This should be fine because reading these registers
>>> is already handled as 'read as zero'.
>>>
>>> Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
>>>
>>> ---
>>> CC: Stefano Stabellini <sstabellini@kernel.org>
>>> CC: Julien Grall <julien.grall@arm.com>
>>> ---
>>> Changes in v2:
>>> - Write should be ignored only if the value to be written is zero
>>>    (in v1 the write was ignored regardless of the value)
>>> ---
>>>    xen/arch/arm/vgic-v2.c | 4 +++-
>>>    1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
>>> index 646d1f3d12..afd3e89883 100644
>>> --- a/xen/arch/arm/vgic-v2.c
>>> +++ b/xen/arch/arm/vgic-v2.c
>>> @@ -488,7 +488,9 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v,
>>> mmio_info_t *info,
>>>            printk(XENLOG_G_ERR
>>>                   "%pv: vGICD: unhandled word write %#"PRIregister" to
>>> ISACTIVER%d\n",
>>>                   v, r, gicd_reg - GICD_ISACTIVER);
>>> -        return 0;
>>> +        if ( r != 0 )
>>> +            return 0;
>>
>>
>> It would be better to move the check before the printk. So a warning is
>> avoided when the guest is writing 0.
>>
> 
> If we want to avoid printing a warning when the guest is writing 0
> then the printk needs to be moved within the check. I guess this is
> what you meant:
>          if ( r != 0 )
>          {
>              printk(XENLOG_G_ERR
>              "%pv: vGICD: unhandled word write %#"PRIregister" to ISACTIVER%d\n",
>              v, r, gicd_reg - GICD_ISACTIVER);
>              return 0;
>          }
>          goto write_ignore_32;

Either that or:

if ( r == 0 )
   goto write_ignore_32;

So you don't need to rework the code too much. Both would probably want 
some comment in the code.

> 
> Please note that in the original patch where I ignored the write
> regardless of the value I just followed how it is already done for
> GICD_ICACTIVER.
> For existing GICD_ICACTIVER case there is no check for the value to be
> written and there is a warning printed.
> 
> Not checking the value seems fine to me but why is then a warning
> printed? Should we suppress that print as well?

The way it is done in ICACTIVER is really fragile. The guest may think 
the active bit of the interrupt was cleared but this is not the case.

It is not easy to check if the active bit is set in the current vGIC 
(should be better in the new vGIC). So it was decided to just ignore it 
to make Linux happy. The warning is here to tell the user that some may 
not work as expected.

Regarding the ISACTIVER, you know that if the user write 0 none of the 
active state of the interrupts will be changed. So it is fine to avoid 
printing the warning. However, if there are one bit set then you really 
want to warn the user as the hypervisor will not probably handle it.

So we want to keep the warning in both case.

Cheers,

-- 
Julien Grall

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  reply	other threads:[~2018-04-24 16:12 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-20 12:25 [PATCH v2 00/10] xen/arm64: Suspend preconditions and CPU hotplug fixes Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 01/10] xen/arm64: Added handling of the trapped access to OSLSR register Mirela Simonovic
2018-04-23 11:13   ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 02/10] xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2) Mirela Simonovic
2018-04-23 11:15   ` Julien Grall
2018-04-24 11:02     ` Mirela Simonovic
2018-04-24 16:12       ` Julien Grall [this message]
2018-04-24 16:45         ` Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 03/10] xen/arm: Implement CPU_OFF PSCI call (physical interface) Mirela Simonovic
2018-04-23 11:21   ` Julien Grall
2018-04-23 17:12     ` Mirela Simonovic
2018-04-23 17:15       ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 04/10] xen/arm: Remove __initdata and __init to enable CPU hotplug Mirela Simonovic
2018-04-23 11:21   ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 05/10] xen/arm: Setup virtual paging for non-boot CPUs on hotplug/resume Mirela Simonovic
2018-04-23 11:28   ` Julien Grall
2018-04-24 14:50     ` Mirela Simonovic
2018-04-24 16:33       ` Julien Grall
2018-04-25  8:23       ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 06/10] xen/common: Restore IRQ affinity when hotplugging a pCPU Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 07/10] xen/arm: Release maintenance interrupt when CPU is hot-unplugged Mirela Simonovic
2018-04-23 11:33   ` Julien Grall
2018-04-25 13:09     ` Mirela Simonovic
2018-04-25 13:23       ` Julien Grall
2018-04-25 14:28         ` Mirela Simonovic
2018-04-26 10:08           ` Julien Grall
2018-04-26 14:23             ` Tim Deegan
2018-04-27  9:28               ` Julien Grall
2018-04-27 14:15                 ` Tim Deegan
2018-04-27 14:38                   ` Mirela Simonovic
2018-04-27 15:12                     ` Julien Grall
2018-05-09 10:10                       ` Mirela Simonovic
2018-05-09 11:01                         ` Julien Grall
2018-05-09 11:14                           ` Mirela Simonovic
2018-05-09 11:15                             ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 08/10] xen/arm: Release timer interrupts " Mirela Simonovic
2018-04-25 10:34   ` Mirela Simonovic
2018-04-25 10:38     ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 09/10] xen/arm: Free memory allocated for sibling/core maps on CPU hot-unplug Mirela Simonovic
2018-04-23 11:38   ` Julien Grall
2018-04-27 11:14     ` Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 10/10] xen/arm: Call check_local_cpu_errata for secondary CPU only on boot Mirela Simonovic
2018-04-23 11:46   ` Julien Grall
2018-04-25 15:13     ` Mirela Simonovic
2018-04-26 10:18       ` Julien Grall

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