All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mirela Simonovic <mirela.simonovic@aggios.com>
To: Julien Grall <julien.grall@arm.com>
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Xen Devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2 07/10] xen/arm: Release maintenance interrupt when CPU is hot-unplugged
Date: Wed, 25 Apr 2018 16:28:45 +0200	[thread overview]
Message-ID: <CAKPH-NgPkLRazeMJj6Z3ubyxF=_Q8yOo+3Lp_wF_ULjeiqVvxQ@mail.gmail.com> (raw)
In-Reply-To: <59700476-d077-2d59-9738-89afe02225bc@arm.com>

Hi Julien,


On Wed, Apr 25, 2018 at 3:23 PM, Julien Grall <julien.grall@arm.com> wrote:
> Hi,
>
>
> On 25/04/18 14:09, Mirela Simonovic wrote:
>>
>> On Mon, Apr 23, 2018 at 1:33 PM, Julien Grall <julien.grall@arm.com>
>> wrote:
>>>
>>> Hi Mirela,
>>>
>>>
>>> On 20/04/18 13:25, Mirela Simonovic wrote:
>>>>
>>>>
>>>> When a CPU is hot-unplugged the maintenance interrupt has to be
>>>> released in order to free the memory that was allocated when the CPU
>>>> was hotplugged and interrupt requested. The interrupt was requested
>>>> using request_irq() which is called from start_secondary->
>>>> init_maintenance_interrupt.
>>>>
>>>> Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
>>>>
>>>> ---
>>>> CC: Stefano Stabellini <sstabellini@kernel.org>
>>>> CC: Julien Grall <julien.grall@arm.com>
>>>> ---
>>>>    xen/arch/arm/gic.c        | 5 +++++
>>>>    xen/arch/arm/smpboot.c    | 7 +++++++
>>>>    xen/include/asm-arm/gic.h | 1 +
>>>>    3 files changed, 13 insertions(+)
>>>>
>>>> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
>>>> index 653a815127..e536b99e84 100644
>>>> --- a/xen/arch/arm/gic.c
>>>> +++ b/xen/arch/arm/gic.c
>>>> @@ -431,6 +431,11 @@ void init_maintenance_interrupt(void)
>>>>                    "irq-maintenance", NULL);
>>>>    }
>>>>    +void deinit_maintenance_interrupt(void)
>>>> +{
>>>> +    release_irq(gic_hw_ops->info->maintenance_irq, NULL);
>>>> +}
>>>> +
>>>>    int gic_make_hwdom_dt_node(const struct domain *d,
>>>>                               const struct dt_device_node *gic,
>>>>                               void *fdt)
>>>> diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
>>>> index abc642804f..449fefc77d 100644
>>>> --- a/xen/arch/arm/smpboot.c
>>>> +++ b/xen/arch/arm/smpboot.c
>>>> @@ -375,11 +375,18 @@ void __cpu_disable(void)
>>>>          local_irq_disable();
>>>>        gic_disable_cpu();
>>>> +
>>>
>>>
>>>
>>> Spurious change.
>>>
>>>>        /* Allow any queued timer interrupts to get serviced */
>>>>        local_irq_enable();
>>>>        mdelay(1);
>>>>        local_irq_disable();
>>>>    +    /*
>>>> +     * Deinitialize interrupts (this will free the memory that was
>>>> allocated
>>>> +     * in respective init interrupt functions called from
>>>> start_secondary)
>>>> +     */
>>>> +    deinit_maintenance_interrupt();
>>>
>>>
>>>
>>> Can you have a look at using a notifier (see CPU_DIYING)? This would
>>> avoid
>>> exporting too much new function.
>>
>>
>> I believe releasing of maintenance irq should happen after the dying
>> CPU's GIC interface is disabled.
>
>
> Why? The maintenance interrupt will only be fired when running in guest
> context. Furthermore, it is initialized after the GIC has been initialized,
> so it makes sense to disable before hand.
>
>> To make such ordering using notifiers I would need to move these lines
>> from __cpu_disable into the notifier callback under the CPU_DYING
>> case:
>>          local_irq_disable();
>>          gic_disable_cpu();
>>          local_irq_enable();
>
>
> This looks a bit weird. AFAIU, if you disable the CPU interface, then you
> should never receive interrupt after. So why would you re-enable them?
>
> I realize the code in __cpu_disbale do that, but this looks quite wrong to
> me. There are no way to receive queued timer interrupt afterwards.
>

That is what I took as a reference, but I asked myself the same.
There is (extremely small, but it exists) time window between
disabling irq locally and disabling CPU interface. An interrupt
received in that time window would propagate to the CPU but I'm not
sure would happen after the GIC CPU interface is disabled and
interrupts are locally enabled. That is the only explanation I can
come up with, although I believe the answer is nothing. Since you're
at ARM you could check this internally.

Anyway, since we're taking the notifier approach the timer interrupt
would be disabled before the GIC CPU interface, so I believe the
mdelay and the surrounding local_irq_enable/disable will not be
needed.
Please lets do such a cleanup out of this series.

>> then below these lines in the callback I would add
>>          release_irq(gic_hw_ops->info->maintenance_irq, NULL);
>>
>> This would have to be done because CPU_DYING notifiers execute before
>> __cpu_disable().
>> How that sounds? If it's ok, should these changes be split into 2
>> patches (1) notifier based call to gic_disable_cpu + 2) release
>> maintenance irq, I believe this is better) or should I merge them?
>
> I am not sure this is right to do. We want to disable the CPU interface very
> late (imagine we need to service interrupt).
>

This doesn't mean that the gic_disable_cpu can't be done using
notifiers, we would just first disable maintenance irq and then gic
cpu interface.
However, moving gic_disable_cpu in notifier would mean that interrupts
should be disabled using notifiers (whose priority is higher than gic
notifier's priority) as well.
Please lets finalize the discussion and make an agreement on what
should be done, I would like to get v3 ASAP.

Thanks,
Mirela

> Cheers,
>
> --
> Julien Grall

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  reply	other threads:[~2018-04-25 14:28 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-20 12:25 [PATCH v2 00/10] xen/arm64: Suspend preconditions and CPU hotplug fixes Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 01/10] xen/arm64: Added handling of the trapped access to OSLSR register Mirela Simonovic
2018-04-23 11:13   ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 02/10] xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2) Mirela Simonovic
2018-04-23 11:15   ` Julien Grall
2018-04-24 11:02     ` Mirela Simonovic
2018-04-24 16:12       ` Julien Grall
2018-04-24 16:45         ` Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 03/10] xen/arm: Implement CPU_OFF PSCI call (physical interface) Mirela Simonovic
2018-04-23 11:21   ` Julien Grall
2018-04-23 17:12     ` Mirela Simonovic
2018-04-23 17:15       ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 04/10] xen/arm: Remove __initdata and __init to enable CPU hotplug Mirela Simonovic
2018-04-23 11:21   ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 05/10] xen/arm: Setup virtual paging for non-boot CPUs on hotplug/resume Mirela Simonovic
2018-04-23 11:28   ` Julien Grall
2018-04-24 14:50     ` Mirela Simonovic
2018-04-24 16:33       ` Julien Grall
2018-04-25  8:23       ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 06/10] xen/common: Restore IRQ affinity when hotplugging a pCPU Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 07/10] xen/arm: Release maintenance interrupt when CPU is hot-unplugged Mirela Simonovic
2018-04-23 11:33   ` Julien Grall
2018-04-25 13:09     ` Mirela Simonovic
2018-04-25 13:23       ` Julien Grall
2018-04-25 14:28         ` Mirela Simonovic [this message]
2018-04-26 10:08           ` Julien Grall
2018-04-26 14:23             ` Tim Deegan
2018-04-27  9:28               ` Julien Grall
2018-04-27 14:15                 ` Tim Deegan
2018-04-27 14:38                   ` Mirela Simonovic
2018-04-27 15:12                     ` Julien Grall
2018-05-09 10:10                       ` Mirela Simonovic
2018-05-09 11:01                         ` Julien Grall
2018-05-09 11:14                           ` Mirela Simonovic
2018-05-09 11:15                             ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 08/10] xen/arm: Release timer interrupts " Mirela Simonovic
2018-04-25 10:34   ` Mirela Simonovic
2018-04-25 10:38     ` Julien Grall
2018-04-20 12:25 ` [PATCH v2 09/10] xen/arm: Free memory allocated for sibling/core maps on CPU hot-unplug Mirela Simonovic
2018-04-23 11:38   ` Julien Grall
2018-04-27 11:14     ` Mirela Simonovic
2018-04-20 12:25 ` [PATCH v2 10/10] xen/arm: Call check_local_cpu_errata for secondary CPU only on boot Mirela Simonovic
2018-04-23 11:46   ` Julien Grall
2018-04-25 15:13     ` Mirela Simonovic
2018-04-26 10:18       ` Julien Grall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAKPH-NgPkLRazeMJj6Z3ubyxF=_Q8yOo+3Lp_wF_ULjeiqVvxQ@mail.gmail.com' \
    --to=mirela.simonovic@aggios.com \
    --cc=edgar.iglesias@xilinx.com \
    --cc=julien.grall@arm.com \
    --cc=sstabellini@kernel.org \
    --cc=xen-devel@lists.xen.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.