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From: Marc Zyngier <marc.zyngier@arm.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jens Axboe <axboe@kernel.dk>,
	Hans de Goede <hdegoede@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org, Baruch Siach <baruch@tkos.co.il>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	linux-ide@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 08/10] ata: ahci: mvebu: Add support for A8k legacy bindings
Date: Thu, 7 Mar 2019 16:31:48 +0000	[thread overview]
Message-ID: <634bb5cc-aab9-eecb-cba9-8c7762e888c9@arm.com> (raw)
In-Reply-To: <20190306102146.13005-9-miquel.raynal@bootlin.com>

On 06/03/2019 10:21, Miquel Raynal wrote:
> The CP110 SATA unit has 2 ports, and a dedicated ICU entry per
> port. In the past, the AHCI SATA driver only supported one interrupt
> per SATA unit. To solve this conflict, the 2 SATA wired interrupts in
> the South-Bridge got configured as 1 GIC interrupt in the
> North-Bridge, regardless of the number of SATA ports actually
> enabled/in use, and the bindings only referenced the interrupt of one
> port.
> 
> Since then, this limitation has been addressed and this patch ensures
> backward compatibility with old DTs not describing SATA ports
> correctly directly from the AHCI MVEBU driver. This way, we will be
> able to drop the hack from the ICU driver. IOW, when the A8k
> compatible string is used and there is no sub-nodes in the DT, we
> fake the creation and mapping of the second (missing) interrupt.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

It'd be good to add that all these hacks only exist for the purpose of
DT. The same HW booting with ACPI doesn't require any of this because
the firmware abstracts stuff that the kernel shouldn't be concerned with
the first place.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jens Axboe <axboe@kernel.dk>,
	Hans de Goede <hdegoede@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org, Baruch Siach <baruch@tkos.co.il>,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	linux-ide@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 08/10] ata: ahci: mvebu: Add support for A8k legacy bindings
Date: Thu, 7 Mar 2019 16:31:48 +0000	[thread overview]
Message-ID: <634bb5cc-aab9-eecb-cba9-8c7762e888c9@arm.com> (raw)
In-Reply-To: <20190306102146.13005-9-miquel.raynal@bootlin.com>

On 06/03/2019 10:21, Miquel Raynal wrote:
> The CP110 SATA unit has 2 ports, and a dedicated ICU entry per
> port. In the past, the AHCI SATA driver only supported one interrupt
> per SATA unit. To solve this conflict, the 2 SATA wired interrupts in
> the South-Bridge got configured as 1 GIC interrupt in the
> North-Bridge, regardless of the number of SATA ports actually
> enabled/in use, and the bindings only referenced the interrupt of one
> port.
> 
> Since then, this limitation has been addressed and this patch ensures
> backward compatibility with old DTs not describing SATA ports
> correctly directly from the AHCI MVEBU driver. This way, we will be
> able to drop the hack from the ICU driver. IOW, when the A8k
> compatible string is used and there is no sub-nodes in the DT, we
> fake the creation and mapping of the second (missing) interrupt.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

It'd be good to add that all these hacks only exist for the purpose of
DT. The same HW booting with ACPI doesn't require any of this because
the firmware abstracts stuff that the kernel shouldn't be concerned with
the first place.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-03-07 16:31 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-06 10:21 [PATCH v2 00/10] Enable per-port SATA interrupts and drop an hack in the IRQ subsystem Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 01/10] ata: libahci: Ensure the host interrupt status bits are cleared Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-07 16:25   ` Marc Zyngier
2019-03-07 16:25     ` Marc Zyngier
2019-03-07 17:19     ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 02/10] ata: ahci: Support per-port interrupts Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 15:01   ` Hans de Goede
2019-03-06 15:01     ` Hans de Goede
2019-03-07  7:58     ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 03/10] dt-bindings: ata: Update ahci bindings with possible " Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-12 19:05   ` Rob Herring
2019-03-12 19:05     ` Rob Herring
2019-03-06 10:21 ` [PATCH v2 04/10] ata: ahci: mvebu: Rename a platform data flag Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 05/10] ata: ahci: mvebu: Add a parameter to a platform data callback Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 06/10] dt-bindings: ata: Update ahci_mvebu bindings Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-12 19:06   ` Rob Herring
2019-03-12 19:06     ` Rob Herring
2019-03-06 10:21 ` [PATCH v2 07/10] ata: ahci: mvebu: Support A8k compatible Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 08/10] ata: ahci: mvebu: Add support for A8k legacy bindings Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-07 16:31   ` Marc Zyngier [this message]
2019-03-07 16:31     ` Marc Zyngier
2019-03-06 10:21 ` [PATCH v2 09/10] irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 10:21 ` [PATCH v2 10/10] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts Miquel Raynal
2019-03-06 10:21   ` Miquel Raynal
2019-03-06 10:30   ` Baruch Siach
2019-03-06 10:30     ` Baruch Siach
2019-03-06 10:34     ` Miquel Raynal

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