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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
	Rob Herring <robh+dt@kernel.org>,
	linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: Magnus Damm <magnus.damm@gmail.com>, Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2] arm64: dts: renesas: r8a779{7|8}0: add CMT support
Date: Fri, 7 Sep 2018 21:58:41 +0300	[thread overview]
Message-ID: <63ac4c06-fd9c-2ced-2a7a-d68420f54746@cogentembedded.com> (raw)
In-Reply-To: <fb4eb097-40aa-82df-68c7-9b727c858a8b@cogentembedded.com>

Describe CMTs in the R8A779{7|8}0 device trees.

Based on the original (and large) patches by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
Simon Horman's 'renesas.git' repo.

The R8A779{7|8}0 CMT DT binding updates have been posted the other day...

Changes in version 2:
- added the "resets" prop to all CMT nodes;
- credited Vladimir Barinov as the formal author of the original patches.

 arch/arm64/boot/dts/renesas/r8a77970.dtsi |   70 ++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77980.dtsi |   70 ++++++++++++++++++++++++++++++
 2 files changed, 140 insertions(+)

Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -209,6 +209,76 @@
 			reg = <0 0xe6060000 0 0x504>;
 		};
 
+		cmt0: timer@e60f0000 {
+			compatible = "renesas,r8a77970-cmt0",
+				     "renesas,rcar-gen3-cmt0";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			resets = <&cpg 303>;
+			status = "disabled";
+		};
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,r8a77970-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			resets = <&cpg 302>;
+			status = "disabled";
+		};
+
+		cmt2: timer@e6140000 {
+			compatible = "renesas,r8a77970-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6140000 0 0x1004>;
+			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 301>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			resets = <&cpg 301>;
+			status = "disabled";
+		};
+
+		cmt3: timer@e6148000 {
+			compatible = "renesas,r8a77970-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6148000 0 0x1004>;
+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 300>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			resets = <&cpg 300>;
+			status = "disabled";
+		};
+
 		cpg: clock-controller@e6150000 {
 			compatible = "renesas,r8a77970-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -239,6 +239,76 @@
 			reg = <0 0xe6060000 0 0x50c>;
 		};
 
+		cmt0: timer@e60f0000 {
+			compatible = "renesas,r8a77980-cmt0",
+				     "renesas,rcar-gen3-cmt0";
+			reg = <0 0xe60f0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 303>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+			resets = <&cpg 303>;
+			status = "disabled";
+		};
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,r8a77980-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 302>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+			resets = <&cpg 302>;
+			status = "disabled";
+		};
+
+		cmt2: timer@e6140000 {
+			compatible = "renesas,r8a77980-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6140000 0 0x1004>;
+			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 301>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+			resets = <&cpg 301>;
+			status = "disabled";
+		};
+
+		cmt3: timer@e6148000 {
+			compatible = "renesas,r8a77980-cmt1",
+				     "renesas,rcar-gen3-cmt1";
+			reg = <0 0xe6148000 0 0x1004>;
+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 300>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+			resets = <&cpg 300>;
+			status = "disabled";
+		};
+
 		cpg: clock-controller@e6150000 {
 			compatible = "renesas,r8a77980-cpg-mssr";
 			reg = <0 0xe6150000 0 0x1000>;

  parent reply	other threads:[~2018-09-07 18:58 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-27 18:48 [PATCH v2 0/2] Add R8A77980/Condor PCIe support Sergei Shtylyov
2018-08-27 18:48 ` Sergei Shtylyov
2018-08-27 18:48 ` Sergei Shtylyov
2018-08-27 18:52 ` Sergei Shtylyov
2018-08-27 18:52   ` Sergei Shtylyov
2018-08-27 18:52   ` Sergei Shtylyov
2018-08-27 18:53 ` [PATCH v3 1/2] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2018-08-27 18:53   ` Sergei Shtylyov
2018-08-27 18:53   ` Sergei Shtylyov
2018-08-30 12:32   ` Simon Horman
2018-08-30 12:32     ` Simon Horman
2018-08-30 12:32     ` Simon Horman
2018-08-27 18:54 ` [PATCH v3 2/2] arm64: dts: renesas: condor: " Sergei Shtylyov
2018-08-27 18:54   ` Sergei Shtylyov
2018-08-27 18:54   ` Sergei Shtylyov
2018-08-30 12:32   ` Simon Horman
2018-08-30 12:32     ` Simon Horman
2018-08-30 12:32     ` Simon Horman
2018-09-06 17:02 ` [PATCH] arm64: dts: renesas: r8a779{7|8}0: add CMT support Sergei Shtylyov
2018-09-06 18:43   ` Sergei Shtylyov
2018-09-07 18:58 ` Sergei Shtylyov [this message]
2018-09-10  9:05   ` [PATCH v2] " Simon Horman
2018-09-19  7:47   ` Geert Uytterhoeven
2018-09-19  9:19     ` Simon Horman
2018-09-07 20:14 ` [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support Sergei Shtylyov
2018-09-10  9:23   ` Simon Horman
2018-09-10 12:04     ` Sergei Shtylyov
2018-09-11 13:36       ` Simon Horman
2018-09-11 14:12         ` Geert Uytterhoeven
2018-09-11 18:35         ` Sergei Shtylyov
2018-09-12  9:39           ` Simon Horman
2018-09-13 20:29             ` Sergei Shtylyov
2018-09-13 20:14           ` Sergei Shtylyov
2018-09-19 20:02 ` [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TPU support Sergei Shtylyov
2018-09-19 20:21   ` Sergei Shtylyov
2018-09-21  7:35     ` Simon Horman
2018-09-21  8:27       ` Sergei Shtylyov
2018-09-22 20:30 ` [PATCH v2] " Sergei Shtylyov
2018-09-24  9:07   ` Simon Horman
2018-09-24 14:44     ` Sergei Shtylyov
2018-09-24 15:32       ` Simon Horman
2018-09-24 11:29   ` Geert Uytterhoeven
2018-09-24 17:55     ` Sergei Shtylyov
2018-09-24 18:33 ` [PATCH v3] " Sergei Shtylyov
2018-09-24 19:36   ` Geert Uytterhoeven
2018-09-25  7:42     ` Simon Horman
2018-09-24 20:13 ` [PATCH v2] arm64: dts: renesas: r8a779{7|8}0: add TMU support Sergei Shtylyov
2018-10-18 18:32   ` Sergei Shtylyov
2018-10-19 13:43     ` Simon Horman
2018-10-01 20:25 ` [PATCH] arm64: dts: renesas: r8a779{7|8}0: add PWM support Sergei Shtylyov
2018-10-02  7:16   ` Geert Uytterhoeven
2018-10-04  9:33     ` Simon Horman
2018-10-05 19:25 ` [PATCH] arm64: dts: renesas: r8a77970: add thermal support Sergei Shtylyov
2018-10-05 19:33   ` Sergei Shtylyov
2018-10-08  7:55   ` Simon Horman
2018-10-08  8:12   ` Geert Uytterhoeven
2018-10-08 16:35     ` Sergei Shtylyov
2018-10-08 16:40       ` Geert Uytterhoeven
2018-10-08 18:04         ` Sergei Shtylyov
2018-10-10  7:10           ` Geert Uytterhoeven
2018-10-09 19:37 ` [PATCH] arm64: dts: renesas: r8a77980: " Sergei Shtylyov
2018-10-10  8:36   ` Simon Horman
2018-10-10 10:47     ` Sergei Shtylyov
2018-10-10 10:52       ` Niklas Söderlund
2018-10-10 10:57   ` Niklas Söderlund
2018-10-10 11:20     ` Sergei Shtylyov
2018-10-09 19:47 ` [PATCH v2] arm64: dts: renesas: r8a77970: " Sergei Shtylyov
2018-10-10  7:12   ` Geert Uytterhoeven
2018-10-12 11:21     ` Simon Horman
2018-10-12 14:36       ` Sergei Shtylyov
2018-10-15 15:43         ` Simon Horman
2018-10-10 19:18 ` [PATCH v2] arm64: dts: renesas: r8a77980: " Sergei Shtylyov
2018-10-10 22:11   ` Niklas Söderlund
2018-10-11  7:02     ` Geert Uytterhoeven
2018-10-11  7:30       ` Niklas Söderlund
2018-10-12 11:23         ` Simon Horman
2018-10-16 19:36 ` [PATCH] arm64: dts: renesas: r8a779{7|8}0: add MSIOF support Sergei Shtylyov
2018-10-17  8:12   ` Simon Horman
2018-10-17  8:52     ` Geert Uytterhoeven
2018-10-18 12:45       ` Simon Horman
2018-10-18 16:48 ` [PATCH] arm64: dts: renesas: condor: switch from EtherAVB to GEther Sergei Shtylyov
2018-10-31 14:30   ` Simon Horman
2018-10-31 17:29     ` Sergei Shtylyov
2018-11-02 11:25       ` Simon Horman
2018-10-19 19:10 ` [PATCH v2] arm64: dts: renesas: r8a779{7|8}0: add MSIOF support Sergei Shtylyov
2018-10-29 10:24   ` Simon Horman

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