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From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>,
	joro@8bytes.org, iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org,  robdclark@gmail.com
Subject: Re: [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling
Date: Thu, 24 Oct 2019 12:23:46 +0100	[thread overview]
Message-ID: <63fa5848-372d-fe09-7502-1b9ecbcc6cf0@arm.com> (raw)
In-Reply-To: <20191024105111.GB1242@willie-the-truck>

On 2019-10-24 11:51 am, Will Deacon wrote:
> On Thu, Oct 03, 2019 at 11:33:52AM -0600, Jordan Crouse wrote:
>> On Wed, Aug 21, 2019 at 01:56:20PM +0100, Robin Murphy wrote:
>>> On 21/08/2019 13:11, Will Deacon wrote:
>>>> On Tue, Aug 20, 2019 at 07:41:52PM +0100, Robin Murphy wrote:
>>>>> On 20/08/2019 17:07, Will Deacon wrote:
>>>>>> On Tue, Aug 20, 2019 at 04:25:56PM +0100, Robin Murphy wrote:
>>>>>>> On 20/08/2019 11:31, Will Deacon wrote:
>>>>>>>> On Mon, Aug 19, 2019 at 07:19:30PM +0100, Robin Murphy wrote:
>>>>>>>>> Although it's conceptually nice for the io_pgtable_cfg to provide a
>>>>>>>>> standard VMSA TCR value, the reality is that no VMSA-compliant IOMMU
>>>>>>>>> looks exactly like an Arm CPU, and they all have various other TCR
>>>>>>>>> controls which io-pgtable can't be expected to understand. Thus since
>>>>>>>>> there is an expectation that drivers will have to add to the given TCR
>>>>>>>>> value anyway, let's strip it down to just the essentials that are
>>>>>>>>> directly relevant to io-pgatble's inner workings - namely the address
>>>>>>>>> sizes, walk attributes, and where appropriate, format selection.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>>>>>>>>> ---
>>>>>>>>>     drivers/iommu/arm-smmu-v3.c        | 7 +------
>>>>>>>>>     drivers/iommu/arm-smmu.c           | 1 +
>>>>>>>>>     drivers/iommu/arm-smmu.h           | 2 ++
>>>>>>>>>     drivers/iommu/io-pgtable-arm-v7s.c | 6 ++----
>>>>>>>>>     drivers/iommu/io-pgtable-arm.c     | 4 ----
>>>>>>>>>     drivers/iommu/qcom_iommu.c         | 2 +-
>>>>>>>>>     6 files changed, 7 insertions(+), 15 deletions(-)
>>>>>>>>
>>>>>>>> Hmm, so I'm a bit nervous about this one since I think we really should
>>>>>>>> be providing a TCR with EPD1 set if we're only giving you TTBR0. Relying
>>>>>>>> on the driver to do this worries me. See my comments on the next patch.
>>>>>>>
>>>>>>> The whole idea is that we already know we can't provide a *complete* TCR
>>>>>>> value (not least because anything above bit 31 is the wild west), thus
>>>>>>> there's really no point in io-pgtable trying to provide anything other than
>>>>>>> the parts it definitely controls. It makes sense to provide this partial TCR
>>>>>>> value "as if" for TTBR0, since that's the most common case, but ultimately
>>>>>>> io-pgatble doesn't know (or need to) which TTBR the caller intends to
>>>>>>> actually use for this table. Even if the caller *is* allocating it for
>>>>>>> TTBR0, io-pgtable doesn't know that they haven't got something live in TTBR1
>>>>>>> already, so it still wouldn't be in a position to make the EPD1 call either
>>>>>>> way.
>>>>>>
>>>>>> Ok, but the driver can happily rewrite/ignore what it gets back. I suppose
>>>>>> an alternative would be scrapped the 'u64 tcr' and instead having a bunch
>>>>>> of named bitfields for the stuff we're actually providing, although I'd
>>>>>> still like EPDx to be in there.
>>>>>
>>>>> I like the bitfield idea; it would certainly emphasise the "you have to do
>>>>> something more with this" angle that I'm pushing towards here, but still
>>>>> leave things framed in TCR terms without having to go to some more general
>>>>> abstraction. It really doesn't play into your EPD argument though - such a
>>>>> config would be providing TxSZ/TGx/IRGNx/ORGNx/SHx, but EPDy, for y = !x.
>>>>> For a driver to understand that and do the right thing with it is even more
>>>>> involved than for the driver to just set EPD1 by itself anyway.
>>>>
>>>> Having considered the bitfield idea some more, I'm less attached to EPDx
>>>> because we simply wouldn't be making a statement about them, rather than a
>>>> (dangerous) zero value and expecting it to be ignored. So I think we're in
>>>> agreement on that.
>>>
>>> Cool, I'll give bitfields a go for v2.
>>>
>>>> The only part I'm still stuck to is that I think io-pgtable should know
>>>> whether it's targetting TTBR0 or TTBR1 so that it can sanitise input
>>>> addresses correctly. Doing this in the driver code is possible, but I'd
>>>> rather not start from that position, particularly as it would require things
>>>> like sign-extension in the TLBI callbacks.
>>
>> Bumping this as is our tradition in the -rc1 time frame before we get all
>> distracted with other stuff. It sounds like the last agreement was for a
>> TTBR1 hint for the EDP and the sign extension in the functions.
> 
> If somebody respins this using bitfields and an explicit TTBR1 quirk then
> I'll merge it.

Oops, the ping did register, I just didn't react outwardly ;)

I have been working on v2, and plan to have something ready next week - 
the holdup was that I started refactoring all the argument passing since 
the number of things we have to carry through from one end of map/unmap 
to the other is getting a bit silly, but I think I can still finish the 
TTBR1 quirk without that, so if I don't get it cracked imminently then 
I'll put it aside to revisit later.

Robin.
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>,
	joro@8bytes.org, iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org, robdclark@gmail.com
Subject: Re: [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling
Date: Thu, 24 Oct 2019 12:23:46 +0100	[thread overview]
Message-ID: <63fa5848-372d-fe09-7502-1b9ecbcc6cf0@arm.com> (raw)
In-Reply-To: <20191024105111.GB1242@willie-the-truck>

On 2019-10-24 11:51 am, Will Deacon wrote:
> On Thu, Oct 03, 2019 at 11:33:52AM -0600, Jordan Crouse wrote:
>> On Wed, Aug 21, 2019 at 01:56:20PM +0100, Robin Murphy wrote:
>>> On 21/08/2019 13:11, Will Deacon wrote:
>>>> On Tue, Aug 20, 2019 at 07:41:52PM +0100, Robin Murphy wrote:
>>>>> On 20/08/2019 17:07, Will Deacon wrote:
>>>>>> On Tue, Aug 20, 2019 at 04:25:56PM +0100, Robin Murphy wrote:
>>>>>>> On 20/08/2019 11:31, Will Deacon wrote:
>>>>>>>> On Mon, Aug 19, 2019 at 07:19:30PM +0100, Robin Murphy wrote:
>>>>>>>>> Although it's conceptually nice for the io_pgtable_cfg to provide a
>>>>>>>>> standard VMSA TCR value, the reality is that no VMSA-compliant IOMMU
>>>>>>>>> looks exactly like an Arm CPU, and they all have various other TCR
>>>>>>>>> controls which io-pgtable can't be expected to understand. Thus since
>>>>>>>>> there is an expectation that drivers will have to add to the given TCR
>>>>>>>>> value anyway, let's strip it down to just the essentials that are
>>>>>>>>> directly relevant to io-pgatble's inner workings - namely the address
>>>>>>>>> sizes, walk attributes, and where appropriate, format selection.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>>>>>>>>> ---
>>>>>>>>>     drivers/iommu/arm-smmu-v3.c        | 7 +------
>>>>>>>>>     drivers/iommu/arm-smmu.c           | 1 +
>>>>>>>>>     drivers/iommu/arm-smmu.h           | 2 ++
>>>>>>>>>     drivers/iommu/io-pgtable-arm-v7s.c | 6 ++----
>>>>>>>>>     drivers/iommu/io-pgtable-arm.c     | 4 ----
>>>>>>>>>     drivers/iommu/qcom_iommu.c         | 2 +-
>>>>>>>>>     6 files changed, 7 insertions(+), 15 deletions(-)
>>>>>>>>
>>>>>>>> Hmm, so I'm a bit nervous about this one since I think we really should
>>>>>>>> be providing a TCR with EPD1 set if we're only giving you TTBR0. Relying
>>>>>>>> on the driver to do this worries me. See my comments on the next patch.
>>>>>>>
>>>>>>> The whole idea is that we already know we can't provide a *complete* TCR
>>>>>>> value (not least because anything above bit 31 is the wild west), thus
>>>>>>> there's really no point in io-pgtable trying to provide anything other than
>>>>>>> the parts it definitely controls. It makes sense to provide this partial TCR
>>>>>>> value "as if" for TTBR0, since that's the most common case, but ultimately
>>>>>>> io-pgatble doesn't know (or need to) which TTBR the caller intends to
>>>>>>> actually use for this table. Even if the caller *is* allocating it for
>>>>>>> TTBR0, io-pgtable doesn't know that they haven't got something live in TTBR1
>>>>>>> already, so it still wouldn't be in a position to make the EPD1 call either
>>>>>>> way.
>>>>>>
>>>>>> Ok, but the driver can happily rewrite/ignore what it gets back. I suppose
>>>>>> an alternative would be scrapped the 'u64 tcr' and instead having a bunch
>>>>>> of named bitfields for the stuff we're actually providing, although I'd
>>>>>> still like EPDx to be in there.
>>>>>
>>>>> I like the bitfield idea; it would certainly emphasise the "you have to do
>>>>> something more with this" angle that I'm pushing towards here, but still
>>>>> leave things framed in TCR terms without having to go to some more general
>>>>> abstraction. It really doesn't play into your EPD argument though - such a
>>>>> config would be providing TxSZ/TGx/IRGNx/ORGNx/SHx, but EPDy, for y = !x.
>>>>> For a driver to understand that and do the right thing with it is even more
>>>>> involved than for the driver to just set EPD1 by itself anyway.
>>>>
>>>> Having considered the bitfield idea some more, I'm less attached to EPDx
>>>> because we simply wouldn't be making a statement about them, rather than a
>>>> (dangerous) zero value and expecting it to be ignored. So I think we're in
>>>> agreement on that.
>>>
>>> Cool, I'll give bitfields a go for v2.
>>>
>>>> The only part I'm still stuck to is that I think io-pgtable should know
>>>> whether it's targetting TTBR0 or TTBR1 so that it can sanitise input
>>>> addresses correctly. Doing this in the driver code is possible, but I'd
>>>> rather not start from that position, particularly as it would require things
>>>> like sign-extension in the TLBI callbacks.
>>
>> Bumping this as is our tradition in the -rc1 time frame before we get all
>> distracted with other stuff. It sounds like the last agreement was for a
>> TTBR1 hint for the EDP and the sign extension in the functions.
> 
> If somebody respins this using bitfields and an explicit TTBR1 quirk then
> I'll merge it.

Oops, the ping did register, I just didn't react outwardly ;)

I have been working on v2, and plan to have something ready next week - 
the holdup was that I started refactoring all the argument passing since 
the number of things we have to carry through from one end of map/unmap 
to the other is getting a bit silly, but I think I can still finish the 
TTBR1 quirk without that, so if I don't get it cracked imminently then 
I'll put it aside to revisit later.

Robin.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-10-24 11:24 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-19 18:19 [PATCH 0/4] iommu/io-pgtable: Cleanup and prep for split tables Robin Murphy
2019-08-19 18:19 ` Robin Murphy
2019-08-19 18:19 ` [PATCH 1/4] iommu/io-pgtable-arm: Rationalise MAIR handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-19 18:19 ` [PATCH 2/4] iommu/io-pgtable-arm: Rationalise TTBRn handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-20 10:19   ` Will Deacon
2019-08-20 10:19     ` Will Deacon
2019-08-20 14:17     ` Robin Murphy
2019-08-20 14:17       ` Robin Murphy
2019-08-20 15:50       ` Will Deacon
2019-08-20 15:50         ` Will Deacon
2019-08-19 18:19 ` [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-20 10:31   ` Will Deacon
2019-08-20 10:31     ` Will Deacon
2019-08-20 15:25     ` Robin Murphy
2019-08-20 15:25       ` Robin Murphy
2019-08-20 16:07       ` Will Deacon
2019-08-20 16:07         ` Will Deacon
2019-08-20 18:41         ` Robin Murphy
2019-08-20 18:41           ` Robin Murphy
2019-08-21 12:11           ` Will Deacon
2019-08-21 12:11             ` Will Deacon
2019-08-21 12:56             ` Robin Murphy
2019-08-21 12:56               ` Robin Murphy
2019-10-03 17:33               ` Jordan Crouse
2019-10-03 17:33                 ` Jordan Crouse
2019-10-24 10:51                 ` Will Deacon
2019-10-24 10:51                   ` Will Deacon
2019-10-24 11:23                   ` Robin Murphy [this message]
2019-10-24 11:23                     ` Robin Murphy
2019-10-24 11:40                     ` Will Deacon
2019-10-24 11:40                       ` Will Deacon
2019-08-20 16:23       ` Jordan Crouse
2019-08-20 16:23         ` Jordan Crouse
2019-08-19 18:19 ` [PATCH 4/4] iommu/io-pgtable-arm: Prepare for TTBR1 usage Robin Murphy
2019-08-19 18:19   ` Robin Murphy
2019-08-19 22:34   ` Jordan Crouse
2019-08-19 22:34     ` Jordan Crouse
2019-08-20 13:51     ` Robin Murphy
2019-08-20 13:51       ` Robin Murphy
2019-08-20 10:30   ` Will Deacon
2019-08-20 10:30     ` Will Deacon
2019-08-20 14:51     ` Robin Murphy
2019-08-20 14:51       ` Robin Murphy
2019-08-20 15:58       ` Will Deacon
2019-08-20 15:58         ` Will Deacon

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