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From: "Bhardwaj, Rajneesh" <rajneesh.bhardwaj@amd.com>
To: Oak Zeng <Oak.Zeng@amd.com>,
	dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	brahma_sw_dev@amd.com
Cc: Alexander.Deucher@amd.com, jinhuieric.huang@amd.com,
	Felix.Kuehling@amd.com, harish.kasiviswanathan@amd.com,
	christian.koenig@amd.com
Subject: Re: [PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting
Date: Thu, 4 Mar 2021 12:01:55 -0500	[thread overview]
Message-ID: <69501a46-ffbe-437c-3651-03400b3455a5@amd.com> (raw)
In-Reply-To: <1614873891-5836-1-git-send-email-Oak.Zeng@amd.com>

I was wondering if a managed version of such API exists but looks like 
none. We only have devm_ioremap_wc but that is valid only for 
PAGE_CACHE_MODE_WC whereas ioremap_cache uses _WB. One more small 
comment below.


Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>

On 3/4/2021 11:04 AM, Oak Zeng wrote:
> If tbo.mem.bus.caching is cached, buffer is intended to be mapped
> as cached from CPU. Map it with ioremap_cache.
>
> This wasn't necessary before as device memory was never mapped
> as cached from CPU side. It becomes necessary for aldebaran as
> device memory is mapped cached from CPU.
>
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> Reviewed-by: Christian Konig <Christian.Koenig@amd.com>
> ---
>   drivers/gpu/drm/ttm/ttm_bo_util.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
> index 031e581..7429464 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo_util.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
> @@ -91,6 +91,10 @@ static int ttm_resource_ioremap(struct ttm_device *bdev,
>   
>   		if (mem->bus.caching == ttm_write_combined)
>   			addr = ioremap_wc(mem->bus.offset, bus_size);
> +#ifdef CONFIG_X86


Please use #if defined (CONFIG_X86)

> +		else if (mem->bus.caching == ttm_cached)
> +			addr = ioremap_cache(mem->bus.offset, bus_size);
> +#endif
>   		else
>   			addr = ioremap(mem->bus.offset, bus_size);
>   		if (!addr) {
> @@ -372,6 +376,11 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo,
>   		if (mem->bus.caching == ttm_write_combined)
>   			map->virtual = ioremap_wc(bo->mem.bus.offset + offset,
>   						  size);
> +#ifdef CONFIG_X86
> +		else if (mem->bus.caching == ttm_cached)
> +			map->virtual = ioremap_cache(bo->mem.bus.offset + offset,
> +						  size);
> +#endif
>   		else
>   			map->virtual = ioremap(bo->mem.bus.offset + offset,
>   					       size);
> @@ -490,6 +499,11 @@ int ttm_bo_vmap(struct ttm_buffer_object *bo, struct dma_buf_map *map)
>   		else if (mem->bus.caching == ttm_write_combined)
>   			vaddr_iomem = ioremap_wc(mem->bus.offset,
>   						 bo->base.size);
> +		else if (mem->bus.caching == ttm_cached)
> +#ifdef CONFIG_X86
> +			vaddr_iomem = ioremap_cache(mem->bus.offset,
> +						  bo->base.size);
> +#endif
>   		else
>   			vaddr_iomem = ioremap(mem->bus.offset, bo->base.size);
>   
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Bhardwaj, Rajneesh" <rajneesh.bhardwaj@amd.com>
To: Oak Zeng <Oak.Zeng@amd.com>,
	dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	brahma_sw_dev@amd.com
Cc: Alexander.Deucher@amd.com, jinhuieric.huang@amd.com,
	Felix.Kuehling@amd.com, harish.kasiviswanathan@amd.com,
	christian.koenig@amd.com
Subject: Re: [PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting
Date: Thu, 4 Mar 2021 12:01:55 -0500	[thread overview]
Message-ID: <69501a46-ffbe-437c-3651-03400b3455a5@amd.com> (raw)
In-Reply-To: <1614873891-5836-1-git-send-email-Oak.Zeng@amd.com>

I was wondering if a managed version of such API exists but looks like 
none. We only have devm_ioremap_wc but that is valid only for 
PAGE_CACHE_MODE_WC whereas ioremap_cache uses _WB. One more small 
comment below.


Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>

On 3/4/2021 11:04 AM, Oak Zeng wrote:
> If tbo.mem.bus.caching is cached, buffer is intended to be mapped
> as cached from CPU. Map it with ioremap_cache.
>
> This wasn't necessary before as device memory was never mapped
> as cached from CPU side. It becomes necessary for aldebaran as
> device memory is mapped cached from CPU.
>
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> Reviewed-by: Christian Konig <Christian.Koenig@amd.com>
> ---
>   drivers/gpu/drm/ttm/ttm_bo_util.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
> index 031e581..7429464 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo_util.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
> @@ -91,6 +91,10 @@ static int ttm_resource_ioremap(struct ttm_device *bdev,
>   
>   		if (mem->bus.caching == ttm_write_combined)
>   			addr = ioremap_wc(mem->bus.offset, bus_size);
> +#ifdef CONFIG_X86


Please use #if defined (CONFIG_X86)

> +		else if (mem->bus.caching == ttm_cached)
> +			addr = ioremap_cache(mem->bus.offset, bus_size);
> +#endif
>   		else
>   			addr = ioremap(mem->bus.offset, bus_size);
>   		if (!addr) {
> @@ -372,6 +376,11 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo,
>   		if (mem->bus.caching == ttm_write_combined)
>   			map->virtual = ioremap_wc(bo->mem.bus.offset + offset,
>   						  size);
> +#ifdef CONFIG_X86
> +		else if (mem->bus.caching == ttm_cached)
> +			map->virtual = ioremap_cache(bo->mem.bus.offset + offset,
> +						  size);
> +#endif
>   		else
>   			map->virtual = ioremap(bo->mem.bus.offset + offset,
>   					       size);
> @@ -490,6 +499,11 @@ int ttm_bo_vmap(struct ttm_buffer_object *bo, struct dma_buf_map *map)
>   		else if (mem->bus.caching == ttm_write_combined)
>   			vaddr_iomem = ioremap_wc(mem->bus.offset,
>   						 bo->base.size);
> +		else if (mem->bus.caching == ttm_cached)
> +#ifdef CONFIG_X86
> +			vaddr_iomem = ioremap_cache(mem->bus.offset,
> +						  bo->base.size);
> +#endif
>   		else
>   			vaddr_iomem = ioremap(mem->bus.offset, bo->base.size);
>   
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  reply	other threads:[~2021-03-04 17:02 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-04 16:04 [PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting Oak Zeng
2021-03-04 16:04 ` Oak Zeng
2021-03-04 17:01 ` Bhardwaj, Rajneesh [this message]
2021-03-04 17:01   ` Bhardwaj, Rajneesh
2021-03-04 17:31   ` Christian König
2021-03-04 17:31     ` Christian König
2021-03-04 17:40     ` Bhardwaj, Rajneesh
2021-03-04 17:40       ` Bhardwaj, Rajneesh
2021-03-04 18:05       ` Christian König
2021-03-04 18:05         ` Christian König
2021-03-04 19:00 ` kernel test robot
2021-03-04 19:00   ` kernel test robot
2021-03-04 19:04 ` kernel test robot
2021-03-04 19:04   ` kernel test robot
  -- strict thread matches above, loose matches on Subject: below --
2021-03-04 19:16 Oak Zeng
2021-03-03 21:12 Oak Zeng
2021-03-03 21:12 ` Oak Zeng
2021-03-04  7:48 ` Christian König
2021-03-04  7:48   ` Christian König
2021-03-01 22:43 Oak Zeng
2021-03-01 22:43 ` Oak Zeng
2021-03-02  2:16 ` kernel test robot
2021-03-02  2:16   ` kernel test robot
2021-03-02  2:16   ` kernel test robot
2021-03-02  4:12 ` kernel test robot
2021-03-02  4:12   ` kernel test robot
2021-03-02  4:12   ` kernel test robot
2021-03-02 11:31   ` Christian König
2021-03-02 11:31     ` Christian König
2021-03-02 22:45     ` Zeng, Oak
2021-03-02 22:45       ` Zeng, Oak
2021-03-02 22:53       ` Dave Airlie
2021-03-02 22:53         ` Dave Airlie
2021-03-02 22:53         ` Dave Airlie
2021-03-03 10:45       ` Christian König
2021-03-03 10:45         ` Christian König
2021-03-03 20:59         ` Zeng, Oak
2021-03-03 20:59           ` Zeng, Oak
2021-03-04  7:46           ` Christian König
2021-03-04  7:46             ` Christian König
2021-03-11 13:06             ` Daniel Vetter
2021-03-11 13:06               ` Daniel Vetter
2021-03-11 13:06               ` Daniel Vetter
2021-03-03 20:59         ` Zeng, Oak
2021-03-02 22:45     ` Zeng, Oak
2021-03-03  8:49 ` Thomas Zimmermann
2021-03-03  8:49   ` Thomas Zimmermann
2021-03-03 10:37   ` Christian König
2021-03-03 10:37     ` Christian König

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