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From: Josua Mayer <josua@solid-run.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Yazan Shhady <yazan.shhady@solid-run.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
Date: Mon, 25 Mar 2024 20:12:23 +0000	[thread overview]
Message-ID: <6a6e7c4d-d5fd-42ae-bc3d-a3978d65e8e4@solid-run.com> (raw)
In-Reply-To: <e1836cb6-64cd-4866-9c0a-f0dda096aa18@linaro.org>

Am 25.03.24 um 20:34 schrieb Krzysztof Kozlowski:
> On 22/03/2024 11:08, Josua Mayer wrote:
>> Am 21.03.24 um 22:47 schrieb Josua Mayer:
>>> Add bindings for SolidRun Clearfog boards, using a new SoM based on
>>> CN9130 SoC.
>>> The carrier boards are identical to the older Armada 388 based Clearfog
>>> boards. For consistency the carrier part of compatible strings are
>>> copied, including the established "-a1" suffix.
>>>
>>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>>> ---
>>>  .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml        | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> index 16d2e132d3d1..36bdfd1bedd9 100644
>>> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> @@ -82,4 +82,16 @@ properties:
>>>            - const: marvell,armada-ap807-quad
>>>            - const: marvell,armada-ap807
>>>  
>>> +      - description:
>>> +          SolidRun CN9130 clearfog family single-board computers
>>> +        items:
>>> +          - enum:
>>> +              - solidrun,clearfog-base-a1
>>> +              - solidrun,clearfog-pro-a1
>>> +          - const: solidrun,clearfog-a1
>>> +          - const: solidrun,cn9130-sr-som
>>> +          - const: marvell,cn9130
>>> +          - const: marvell,armada-ap807-quad
>>> +          - const: marvell,armada-ap807
>>> +
>>>  additionalProperties: true
>> Before merging I would like some feedback about adding
>> another product later, to ensure the compatibles above
>> are adequate? In particular:
>> - sequence of soc, cp, carrier compatibles
>> - name of som compatible
>>
>> Draft for future bindings:
>>       - description:
>>           SolidRun CN9130 SoM based single-board computers
>>           with 1 external CP on the Carrier.
>>         items:
>>           - enum:
>>               - solidrun,cn9131-solidwan
>>           - const: marvell,cn9131
>>           - const: solidrun,cn9130-sr-som
> This does not look correct. cn9131 is not compatible with your som.
This is partially my question.
I considered changing the som to "cn913x-sr-som".

The SoM itself is always 9130, it contains the base SoC
with 1x AP and 1x CP in a single chip.
9131 and 9132 <happen> on the carrier boards.

>
>>           - const: marvell,cn9130
> SoCs are compatible only in some cases, e.g. one is a subset of another
> like stripped out of modem. Are you sure this is your case?
This is more complex, CN9131 and CN9132 are not single SoCs.
A "9132" is instantiated by connecting two southbridge chips
via a Marvell defined bus, each providing additional IO
such as network, i2c, gpio.

Note that even the first, "9130", while a single chip, contains two dies:
An "AP" (Application Processor I assume) with very limited IO (1xsdio, 1xi2c),
and a "CP" (Communication Processor I assume) with lots of IO.
This CP as far as I know today is identical to the southbridges
mentioned above.

>>           - const: marvell,armada-ap807-quad
>>           - const: marvell,armada-ap807
> Anyway, 6 compatibles is beyond useful amount. What are you expressing
> here?
I copied this part from the examples earlier in the file, such as:
      - description: Armada CN9132 SoC with two external CPs
        items:
          - const: marvell,cn9132
          - const: marvell,cn9131
          - const: marvell,cn9130
          - const: marvell,armada-ap807-quad
          - const: marvell,armada-ap807
>  Why is this even armada ap807?
We noticed ap807 != ap806 (cn913x != 8040),
because the thermal sensor coefficients converting
raw values to celsius differed.

WARNING: multiple messages have this Message-ID (diff)
From: Josua Mayer <josua@solid-run.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Yazan Shhady <yazan.shhady@solid-run.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
Date: Mon, 25 Mar 2024 20:12:23 +0000	[thread overview]
Message-ID: <6a6e7c4d-d5fd-42ae-bc3d-a3978d65e8e4@solid-run.com> (raw)
In-Reply-To: <e1836cb6-64cd-4866-9c0a-f0dda096aa18@linaro.org>

Am 25.03.24 um 20:34 schrieb Krzysztof Kozlowski:
> On 22/03/2024 11:08, Josua Mayer wrote:
>> Am 21.03.24 um 22:47 schrieb Josua Mayer:
>>> Add bindings for SolidRun Clearfog boards, using a new SoM based on
>>> CN9130 SoC.
>>> The carrier boards are identical to the older Armada 388 based Clearfog
>>> boards. For consistency the carrier part of compatible strings are
>>> copied, including the established "-a1" suffix.
>>>
>>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>>> ---
>>>  .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml        | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> index 16d2e132d3d1..36bdfd1bedd9 100644
>>> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>> @@ -82,4 +82,16 @@ properties:
>>>            - const: marvell,armada-ap807-quad
>>>            - const: marvell,armada-ap807
>>>  
>>> +      - description:
>>> +          SolidRun CN9130 clearfog family single-board computers
>>> +        items:
>>> +          - enum:
>>> +              - solidrun,clearfog-base-a1
>>> +              - solidrun,clearfog-pro-a1
>>> +          - const: solidrun,clearfog-a1
>>> +          - const: solidrun,cn9130-sr-som
>>> +          - const: marvell,cn9130
>>> +          - const: marvell,armada-ap807-quad
>>> +          - const: marvell,armada-ap807
>>> +
>>>  additionalProperties: true
>> Before merging I would like some feedback about adding
>> another product later, to ensure the compatibles above
>> are adequate? In particular:
>> - sequence of soc, cp, carrier compatibles
>> - name of som compatible
>>
>> Draft for future bindings:
>>       - description:
>>           SolidRun CN9130 SoM based single-board computers
>>           with 1 external CP on the Carrier.
>>         items:
>>           - enum:
>>               - solidrun,cn9131-solidwan
>>           - const: marvell,cn9131
>>           - const: solidrun,cn9130-sr-som
> This does not look correct. cn9131 is not compatible with your som.
This is partially my question.
I considered changing the som to "cn913x-sr-som".

The SoM itself is always 9130, it contains the base SoC
with 1x AP and 1x CP in a single chip.
9131 and 9132 <happen> on the carrier boards.

>
>>           - const: marvell,cn9130
> SoCs are compatible only in some cases, e.g. one is a subset of another
> like stripped out of modem. Are you sure this is your case?
This is more complex, CN9131 and CN9132 are not single SoCs.
A "9132" is instantiated by connecting two southbridge chips
via a Marvell defined bus, each providing additional IO
such as network, i2c, gpio.

Note that even the first, "9130", while a single chip, contains two dies:
An "AP" (Application Processor I assume) with very limited IO (1xsdio, 1xi2c),
and a "CP" (Communication Processor I assume) with lots of IO.
This CP as far as I know today is identical to the southbridges
mentioned above.

>>           - const: marvell,armada-ap807-quad
>>           - const: marvell,armada-ap807
> Anyway, 6 compatibles is beyond useful amount. What are you expressing
> here?
I copied this part from the examples earlier in the file, such as:
      - description: Armada CN9132 SoC with two external CPs
        items:
          - const: marvell,cn9132
          - const: marvell,cn9131
          - const: marvell,cn9130
          - const: marvell,armada-ap807-quad
          - const: marvell,armada-ap807
>  Why is this even armada ap807?
We noticed ap807 != ap806 (cn913x != 8040),
because the thermal sensor coefficients converting
raw values to celsius differed.
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-03-25 20:12 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-21 21:47 [PATCH 0/2] arm64: dts: add description for solidrun cn9130 som and clearfog boards Josua Mayer
2024-03-21 21:47 ` Josua Mayer
2024-03-21 21:47 ` [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 " Josua Mayer
2024-03-21 21:47   ` Josua Mayer
2024-03-22  2:16   ` Rob Herring
2024-03-22  2:16     ` Rob Herring
2024-03-22 10:08   ` Josua Mayer
2024-03-22 10:08     ` Josua Mayer
2024-03-25 19:34     ` Krzysztof Kozlowski
2024-03-25 19:34       ` Krzysztof Kozlowski
2024-03-25 20:12       ` Josua Mayer [this message]
2024-03-25 20:12         ` Josua Mayer
2024-03-26  6:41         ` Krzysztof Kozlowski
2024-03-26  6:41           ` Krzysztof Kozlowski
2024-03-26 19:26           ` Josua Mayer
2024-03-26 19:26             ` Josua Mayer
2024-03-27 10:19             ` Krzysztof Kozlowski
2024-03-27 10:19               ` Krzysztof Kozlowski
2024-03-27 10:55               ` Josua Mayer
2024-03-27 10:55                 ` Josua Mayer
2024-03-28  9:14                 ` Krzysztof Kozlowski
2024-03-28  9:14                   ` Krzysztof Kozlowski
2024-03-28  9:33                   ` Josua Mayer
2024-03-28  9:33                     ` Josua Mayer
2024-03-28  9:41                     ` Krzysztof Kozlowski
2024-03-28  9:41                       ` Krzysztof Kozlowski
2024-03-28  9:46                       ` Josua Mayer
2024-03-28  9:46                         ` Josua Mayer
2024-03-28 16:22   ` Josua Mayer
2024-03-28 16:22     ` Josua Mayer
2024-03-21 21:47 ` [PATCH 2/2] arm64: dts: add description for solidrun cn9130 som and " Josua Mayer
2024-03-21 21:47   ` Josua Mayer
2024-03-21 21:59   ` Andrew Lunn
2024-03-21 21:59     ` Andrew Lunn
2024-03-22  9:54     ` Josua Mayer
2024-03-22  9:54       ` Josua Mayer
2024-03-22 13:11       ` Andrew Lunn
2024-03-22 13:11         ` Andrew Lunn
2024-03-22 15:38         ` Josua Mayer
2024-03-22 15:38           ` Josua Mayer
2024-03-22 15:49           ` Andrew Lunn
2024-03-22 15:49             ` Andrew Lunn
2024-03-22 15:58             ` Josua Mayer
2024-03-22 15:58               ` Josua Mayer
2024-03-22 18:14           ` Josua Mayer
2024-03-22 18:14             ` Josua Mayer
2024-03-22 18:27             ` Andrew Lunn
2024-03-22 18:27               ` Andrew Lunn

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