* [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
@ 2021-06-23 12:45 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-23 12:45 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Akira Tsukamoto, Sagar Shrikant Kadam, linux-riscv, linux-kernel
Would like to have comments for adding jh7100 SoC to defconfig.
To make the upstream friendly, try to add as minimum as possible in
arch/riscv/configs/defconfig required for beaglev-beta against the
upstream defconfig. I might have added too much configs.
Then the distro vendors could use:
make defconfig beablev-fedora.config
or
make defconfig beablev-debian.config
while distro vendors keeping beablev-fedora.config and
beablev-debian.config in their own repositories to make one binary kernel
which boots for all riscv boards.
Probably, it is not good practice to add a different defconfig file under
arch/riscv/configs/ when each new riscv board comes out.
Akira Tsukamoto (1):
config: Enable jh7100 SoC
arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
--
2.17.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
@ 2021-06-23 12:45 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-23 12:45 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Akira Tsukamoto, Sagar Shrikant Kadam, linux-riscv, linux-kernel
Would like to have comments for adding jh7100 SoC to defconfig.
To make the upstream friendly, try to add as minimum as possible in
arch/riscv/configs/defconfig required for beaglev-beta against the
upstream defconfig. I might have added too much configs.
Then the distro vendors could use:
make defconfig beablev-fedora.config
or
make defconfig beablev-debian.config
while distro vendors keeping beablev-fedora.config and
beablev-debian.config in their own repositories to make one binary kernel
which boots for all riscv boards.
Probably, it is not good practice to add a different defconfig file under
arch/riscv/configs/ when each new riscv board comes out.
Akira Tsukamoto (1):
config: Enable jh7100 SoC
arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
--
2.17.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/1] config: Enable jh7100 SoC
2021-06-23 12:45 ` Akira Tsukamoto
@ 2021-06-23 12:46 ` Akira Tsukamoto
-1 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-23 12:46 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
---
arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 1f2be234b11c..e07d26d2743c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
CONFIG_MEMTEST=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_EFI=y
+CONFIG_FB_STARFIVE=y
+CONFIG_FB_STARFIVE_HDMI_ADV7513=y
+CONFIG_FB_STARFIVE_HDMI_TDA998X=y
+CONFIG_FB_STARFIVE_SEEED5INCH=y
+CONFIG_FB_STARFIVE_VIDEO=y
+CONFIG_HW_RANDOM_STARFIVE_VIC=y
+CONFIG_SOC_STARFIVE_VIC7100=y
+CONFIG_FPGA_GMAC_FLUSH_DDR=y
+CONFIG_MMC_DW_FLUSH_DDR=y
+CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
+CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
+CONFIG_VIDEO_STARFIVE_VIN=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+CONFIG_EFI_BOOTLOADER_CONTROL=y
+CONFIG_BLK_PM=y
+CONFIG_IOSCHED_BFQ=y
+CONFIG_KSM=y
+CONFIG_CMA=y
+CONFIG_CMA_AREAS=7
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_IRQ=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_PARTITIONED_MASTER=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
+CONFIG_BLK_DEV_NBD=y
+CONFIG_INPUT_LEDS=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_DESIGNWARE_CORE=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI_MEM=y
+CONFIG_SPI_CADENCE_QUADSPI=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_DMA=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_STARFIVE_VIC=y
+CONFIG_GPIO_TPS65086=y
+CONFIG_POWER_RESET_TPS65086=y
+CONFIG_MFD_TPS65086=y
+CONFIG_USB_HID=y
+CONFIG_USB_CDNS_SUPPORT=y
+CONFIG_USB_CDNS_HOST=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_USB_ROLE_SWITCH=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_OF=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DW_AXI_DMAC_STARFIVE=y
+CONFIG_COMMON_CLK_SI544=y
+CONFIG_COMMON_CLK_PWM=y
+CONFIG_SIFIVE_L2=y
+CONFIG_SIFIVE_L2_FLUSH=y
+CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
+CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
+CONFIG_SIFIVE_L2_IRQ_DISABLE=y
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+CONFIG_PWM_SIFIVE_PTC=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_PROC_KCORE=y
+CONFIG_EFIVAR_FS=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=640
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+CONFIG_DWMAC_GENERIC=y
+CONFIG_MICREL_PHY=y
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 1/1] config: Enable jh7100 SoC
@ 2021-06-23 12:46 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-23 12:46 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
---
arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 1f2be234b11c..e07d26d2743c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
CONFIG_MEMTEST=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_EFI=y
+CONFIG_FB_STARFIVE=y
+CONFIG_FB_STARFIVE_HDMI_ADV7513=y
+CONFIG_FB_STARFIVE_HDMI_TDA998X=y
+CONFIG_FB_STARFIVE_SEEED5INCH=y
+CONFIG_FB_STARFIVE_VIDEO=y
+CONFIG_HW_RANDOM_STARFIVE_VIC=y
+CONFIG_SOC_STARFIVE_VIC7100=y
+CONFIG_FPGA_GMAC_FLUSH_DDR=y
+CONFIG_MMC_DW_FLUSH_DDR=y
+CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
+CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
+CONFIG_VIDEO_STARFIVE_VIN=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
+CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
+CONFIG_PM=y
+CONFIG_PM_CLK=y
+CONFIG_EFI_BOOTLOADER_CONTROL=y
+CONFIG_BLK_PM=y
+CONFIG_IOSCHED_BFQ=y
+CONFIG_KSM=y
+CONFIG_CMA=y
+CONFIG_CMA_AREAS=7
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_IRQ=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_PARTITIONED_MASTER=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
+CONFIG_BLK_DEV_NBD=y
+CONFIG_INPUT_LEDS=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_DESIGNWARE_CORE=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI_MEM=y
+CONFIG_SPI_CADENCE_QUADSPI=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_DMA=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_STARFIVE_VIC=y
+CONFIG_GPIO_TPS65086=y
+CONFIG_POWER_RESET_TPS65086=y
+CONFIG_MFD_TPS65086=y
+CONFIG_USB_HID=y
+CONFIG_USB_CDNS_SUPPORT=y
+CONFIG_USB_CDNS_HOST=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_USB_ROLE_SWITCH=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_PLTFM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_OF=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DW_AXI_DMAC_STARFIVE=y
+CONFIG_COMMON_CLK_SI544=y
+CONFIG_COMMON_CLK_PWM=y
+CONFIG_SIFIVE_L2=y
+CONFIG_SIFIVE_L2_FLUSH=y
+CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
+CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
+CONFIG_SIFIVE_L2_IRQ_DISABLE=y
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+CONFIG_PWM_SIFIVE_PTC=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_PROC_KCORE=y
+CONFIG_EFIVAR_FS=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=640
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+CONFIG_DWMAC_GENERIC=y
+CONFIG_MICREL_PHY=y
--
2.17.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
2021-06-23 12:46 ` Akira Tsukamoto
@ 2021-06-23 13:21 ` Jisheng Zhang
-1 siblings, 0 replies; 16+ messages in thread
From: Jisheng Zhang @ 2021-06-23 13:21 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
Hi Akira,
On Wed, 23 Jun 2021 21:46:54 +0900
Akira Tsukamoto <akira.tsukamoto@gmail.com> wrote:
It's better to add some descriptions here.
> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
> ---
> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 1f2be234b11c..e07d26d2743c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> CONFIG_MEMTEST=y
> # CONFIG_SYSFS_SYSCALL is not set
> CONFIG_EFI=y
> +CONFIG_FB_STARFIVE=y
> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
> +CONFIG_FB_STARFIVE_SEEED5INCH=y
> +CONFIG_FB_STARFIVE_VIDEO=y
> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
I'm not sure which tree is this patch based. These config options are not
defined. I also see undefined options below. For example, SOC_STARFIVE_VIC7100
SOC_STARFIVE_VIC7100_I2C_GPIO and so on
> +CONFIG_SOC_STARFIVE_VIC7100=y
> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
> +CONFIG_MMC_DW_FLUSH_DDR=y
> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
> +CONFIG_VIDEO_STARFIVE_VIN=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
> +CONFIG_PM=y
> +CONFIG_PM_CLK=y
> +CONFIG_EFI_BOOTLOADER_CONTROL=y
> +CONFIG_BLK_PM=y
> +CONFIG_IOSCHED_BFQ=y
> +CONFIG_KSM=y
> +CONFIG_CMA=y
> +CONFIG_CMA_AREAS=7
> +CONFIG_REGMAP_I2C=y
> +CONFIG_REGMAP_IRQ=y
> +CONFIG_MTD_OF_PARTS=y
> +CONFIG_MTD_BLKDEVS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_PARTITIONED_MASTER=y
> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
> +CONFIG_MTD_CFI_I1=y
> +CONFIG_MTD_CFI_I2=y
> +CONFIG_MTD_SPI_NOR=y
> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
> +CONFIG_BLK_DEV_NBD=y
> +CONFIG_INPUT_LEDS=y
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_SERIAL_8250_DMA=y
> +CONFIG_SERIAL_8250_DWLIB=y
> +CONFIG_SERIAL_8250_DW=y
> +CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_DESIGNWARE_CORE=y
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> +CONFIG_SPI_MEM=y
> +CONFIG_SPI_CADENCE_QUADSPI=y
> +CONFIG_SPI_DESIGNWARE=y
> +CONFIG_SPI_DW_DMA=y
> +CONFIG_SPI_DW_MMIO=y
> +CONFIG_SPI_SPIDEV=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_STARFIVE_VIC=y
> +CONFIG_GPIO_TPS65086=y
> +CONFIG_POWER_RESET_TPS65086=y
> +CONFIG_MFD_TPS65086=y
> +CONFIG_USB_HID=y
> +CONFIG_USB_CDNS_SUPPORT=y
> +CONFIG_USB_CDNS_HOST=y
> +CONFIG_USB_CDNS3=y
> +CONFIG_USB_CDNS3_HOST=y
> +CONFIG_USB_ROLE_SWITCH=y
> +CONFIG_SDIO_UART=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_PLTFM=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=y
> +CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> +CONFIG_RTC_DRV_EFI=y
> +CONFIG_DMADEVICES=y
> +CONFIG_DMA_ENGINE=y
> +CONFIG_DMA_VIRTUAL_CHANNELS=y
> +CONFIG_DMA_OF=y
> +CONFIG_DW_AXI_DMAC=y
> +CONFIG_DW_AXI_DMAC_STARFIVE=y
> +CONFIG_COMMON_CLK_SI544=y
> +CONFIG_COMMON_CLK_PWM=y
> +CONFIG_SIFIVE_L2=y
> +CONFIG_SIFIVE_L2_FLUSH=y
> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
> +CONFIG_PWM=y
> +CONFIG_PWM_SYSFS=y
> +CONFIG_PWM_SIFIVE_PTC=y
> +CONFIG_RESET_CONTROLLER=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_EFIVAR_FS=y
> +CONFIG_ZLIB_DEFLATE=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=640
> +CONFIG_CMA_SIZE_SEL_MBYTES=y
> +CONFIG_CMA_ALIGNMENT=8
> +CONFIG_NET_VENDOR_STMICRO=y
> +CONFIG_STMMAC_ETH=y
> +CONFIG_STMMAC_PLATFORM=y
> +CONFIG_DWMAC_GENERIC=y
> +CONFIG_MICREL_PHY=y
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
@ 2021-06-23 13:21 ` Jisheng Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jisheng Zhang @ 2021-06-23 13:21 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
Hi Akira,
On Wed, 23 Jun 2021 21:46:54 +0900
Akira Tsukamoto <akira.tsukamoto@gmail.com> wrote:
It's better to add some descriptions here.
> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
> ---
> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 1f2be234b11c..e07d26d2743c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> CONFIG_MEMTEST=y
> # CONFIG_SYSFS_SYSCALL is not set
> CONFIG_EFI=y
> +CONFIG_FB_STARFIVE=y
> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
> +CONFIG_FB_STARFIVE_SEEED5INCH=y
> +CONFIG_FB_STARFIVE_VIDEO=y
> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
I'm not sure which tree is this patch based. These config options are not
defined. I also see undefined options below. For example, SOC_STARFIVE_VIC7100
SOC_STARFIVE_VIC7100_I2C_GPIO and so on
> +CONFIG_SOC_STARFIVE_VIC7100=y
> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
> +CONFIG_MMC_DW_FLUSH_DDR=y
> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
> +CONFIG_VIDEO_STARFIVE_VIN=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
> +CONFIG_PM=y
> +CONFIG_PM_CLK=y
> +CONFIG_EFI_BOOTLOADER_CONTROL=y
> +CONFIG_BLK_PM=y
> +CONFIG_IOSCHED_BFQ=y
> +CONFIG_KSM=y
> +CONFIG_CMA=y
> +CONFIG_CMA_AREAS=7
> +CONFIG_REGMAP_I2C=y
> +CONFIG_REGMAP_IRQ=y
> +CONFIG_MTD_OF_PARTS=y
> +CONFIG_MTD_BLKDEVS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_PARTITIONED_MASTER=y
> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
> +CONFIG_MTD_CFI_I1=y
> +CONFIG_MTD_CFI_I2=y
> +CONFIG_MTD_SPI_NOR=y
> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
> +CONFIG_BLK_DEV_NBD=y
> +CONFIG_INPUT_LEDS=y
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_SERIAL_8250_DMA=y
> +CONFIG_SERIAL_8250_DWLIB=y
> +CONFIG_SERIAL_8250_DW=y
> +CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_DESIGNWARE_CORE=y
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> +CONFIG_SPI_MEM=y
> +CONFIG_SPI_CADENCE_QUADSPI=y
> +CONFIG_SPI_DESIGNWARE=y
> +CONFIG_SPI_DW_DMA=y
> +CONFIG_SPI_DW_MMIO=y
> +CONFIG_SPI_SPIDEV=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_STARFIVE_VIC=y
> +CONFIG_GPIO_TPS65086=y
> +CONFIG_POWER_RESET_TPS65086=y
> +CONFIG_MFD_TPS65086=y
> +CONFIG_USB_HID=y
> +CONFIG_USB_CDNS_SUPPORT=y
> +CONFIG_USB_CDNS_HOST=y
> +CONFIG_USB_CDNS3=y
> +CONFIG_USB_CDNS3_HOST=y
> +CONFIG_USB_ROLE_SWITCH=y
> +CONFIG_SDIO_UART=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_PLTFM=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=y
> +CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> +CONFIG_RTC_DRV_EFI=y
> +CONFIG_DMADEVICES=y
> +CONFIG_DMA_ENGINE=y
> +CONFIG_DMA_VIRTUAL_CHANNELS=y
> +CONFIG_DMA_OF=y
> +CONFIG_DW_AXI_DMAC=y
> +CONFIG_DW_AXI_DMAC_STARFIVE=y
> +CONFIG_COMMON_CLK_SI544=y
> +CONFIG_COMMON_CLK_PWM=y
> +CONFIG_SIFIVE_L2=y
> +CONFIG_SIFIVE_L2_FLUSH=y
> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
> +CONFIG_PWM=y
> +CONFIG_PWM_SYSFS=y
> +CONFIG_PWM_SIFIVE_PTC=y
> +CONFIG_RESET_CONTROLLER=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_EFIVAR_FS=y
> +CONFIG_ZLIB_DEFLATE=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=640
> +CONFIG_CMA_SIZE_SEL_MBYTES=y
> +CONFIG_CMA_ALIGNMENT=8
> +CONFIG_NET_VENDOR_STMICRO=y
> +CONFIG_STMMAC_ETH=y
> +CONFIG_STMMAC_PLATFORM=y
> +CONFIG_DWMAC_GENERIC=y
> +CONFIG_MICREL_PHY=y
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
2021-06-23 13:21 ` Jisheng Zhang
@ 2021-06-24 14:35 ` Akira Tsukamoto
-1 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:35 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/23/2021 10:21 PM, Jisheng Zhang wrote:
> Hi Akira,
>
> On Wed, 23 Jun 2021 21:46:54 +0900
> Akira Tsukamoto <akira.tsukamoto@gmail.com> wrote:
>
> It's better to add some descriptions here.
Thanks, I will add it when the RFC is over and ready to spin the patch.
Akira
>
>> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
>> ---
>> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 105 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 1f2be234b11c..e07d26d2743c 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
>> CONFIG_MEMTEST=y
>> # CONFIG_SYSFS_SYSCALL is not set
>> CONFIG_EFI=y
>> +CONFIG_FB_STARFIVE=y
>> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
>> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
>> +CONFIG_FB_STARFIVE_SEEED5INCH=y
>> +CONFIG_FB_STARFIVE_VIDEO=y
>> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
>
> I'm not sure which tree is this patch based. These config options are not
> defined. I also see undefined options below. For example, SOC_STARFIVE_VIC7100
> SOC_STARFIVE_VIC7100_I2C_GPIO and so on
>
>> +CONFIG_SOC_STARFIVE_VIC7100=y
>> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
>> +CONFIG_MMC_DW_FLUSH_DDR=y
>> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
>> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
>> +CONFIG_VIDEO_STARFIVE_VIN=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
>> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
>> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
>> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
>> +CONFIG_PM=y
>> +CONFIG_PM_CLK=y
>> +CONFIG_EFI_BOOTLOADER_CONTROL=y
>> +CONFIG_BLK_PM=y
>> +CONFIG_IOSCHED_BFQ=y
>> +CONFIG_KSM=y
>> +CONFIG_CMA=y
>> +CONFIG_CMA_AREAS=7
>> +CONFIG_REGMAP_I2C=y
>> +CONFIG_REGMAP_IRQ=y
>> +CONFIG_MTD_OF_PARTS=y
>> +CONFIG_MTD_BLKDEVS=y
>> +CONFIG_MTD_BLOCK=y
>> +CONFIG_MTD_PARTITIONED_MASTER=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
>> +CONFIG_MTD_CFI_I1=y
>> +CONFIG_MTD_CFI_I2=y
>> +CONFIG_MTD_SPI_NOR=y
>> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
>> +CONFIG_BLK_DEV_NBD=y
>> +CONFIG_INPUT_LEDS=y
>> +CONFIG_INPUT_EVDEV=y
>> +CONFIG_SERIAL_8250_DMA=y
>> +CONFIG_SERIAL_8250_DWLIB=y
>> +CONFIG_SERIAL_8250_DW=y
>> +CONFIG_HW_RANDOM_VIRTIO=y
>> +CONFIG_I2C_CHARDEV=y
>> +CONFIG_I2C_MUX=y
>> +CONFIG_I2C_DESIGNWARE_CORE=y
>> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
>> +CONFIG_SPI_MEM=y
>> +CONFIG_SPI_CADENCE_QUADSPI=y
>> +CONFIG_SPI_DESIGNWARE=y
>> +CONFIG_SPI_DW_DMA=y
>> +CONFIG_SPI_DW_MMIO=y
>> +CONFIG_SPI_SPIDEV=y
>> +CONFIG_GPIO_SYSFS=y
>> +CONFIG_GPIO_STARFIVE_VIC=y
>> +CONFIG_GPIO_TPS65086=y
>> +CONFIG_POWER_RESET_TPS65086=y
>> +CONFIG_MFD_TPS65086=y
>> +CONFIG_USB_HID=y
>> +CONFIG_USB_CDNS_SUPPORT=y
>> +CONFIG_USB_CDNS_HOST=y
>> +CONFIG_USB_CDNS3=y
>> +CONFIG_USB_CDNS3_HOST=y
>> +CONFIG_USB_ROLE_SWITCH=y
>> +CONFIG_SDIO_UART=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_PLTFM=y
>> +CONFIG_NEW_LEDS=y
>> +CONFIG_LEDS_CLASS=y
>> +CONFIG_LEDS_GPIO=y
>> +CONFIG_LEDS_TRIGGERS=y
>> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
>> +CONFIG_RTC_DRV_EFI=y
>> +CONFIG_DMADEVICES=y
>> +CONFIG_DMA_ENGINE=y
>> +CONFIG_DMA_VIRTUAL_CHANNELS=y
>> +CONFIG_DMA_OF=y
>> +CONFIG_DW_AXI_DMAC=y
>> +CONFIG_DW_AXI_DMAC_STARFIVE=y
>> +CONFIG_COMMON_CLK_SI544=y
>> +CONFIG_COMMON_CLK_PWM=y
>> +CONFIG_SIFIVE_L2=y
>> +CONFIG_SIFIVE_L2_FLUSH=y
>> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
>> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
>> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
>> +CONFIG_PWM=y
>> +CONFIG_PWM_SYSFS=y
>> +CONFIG_PWM_SIFIVE_PTC=y
>> +CONFIG_RESET_CONTROLLER=y
>> +CONFIG_PROC_KCORE=y
>> +CONFIG_EFIVAR_FS=y
>> +CONFIG_ZLIB_DEFLATE=y
>> +CONFIG_DMA_CMA=y
>> +CONFIG_CMA_SIZE_MBYTES=640
>> +CONFIG_CMA_SIZE_SEL_MBYTES=y
>> +CONFIG_CMA_ALIGNMENT=8
>> +CONFIG_NET_VENDOR_STMICRO=y
>> +CONFIG_STMMAC_ETH=y
>> +CONFIG_STMMAC_PLATFORM=y
>> +CONFIG_DWMAC_GENERIC=y
>> +CONFIG_MICREL_PHY=y
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
@ 2021-06-24 14:35 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:35 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/23/2021 10:21 PM, Jisheng Zhang wrote:
> Hi Akira,
>
> On Wed, 23 Jun 2021 21:46:54 +0900
> Akira Tsukamoto <akira.tsukamoto@gmail.com> wrote:
>
> It's better to add some descriptions here.
Thanks, I will add it when the RFC is over and ready to spin the patch.
Akira
>
>> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
>> ---
>> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 105 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 1f2be234b11c..e07d26d2743c 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
>> CONFIG_MEMTEST=y
>> # CONFIG_SYSFS_SYSCALL is not set
>> CONFIG_EFI=y
>> +CONFIG_FB_STARFIVE=y
>> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
>> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
>> +CONFIG_FB_STARFIVE_SEEED5INCH=y
>> +CONFIG_FB_STARFIVE_VIDEO=y
>> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
>
> I'm not sure which tree is this patch based. These config options are not
> defined. I also see undefined options below. For example, SOC_STARFIVE_VIC7100
> SOC_STARFIVE_VIC7100_I2C_GPIO and so on
>
>> +CONFIG_SOC_STARFIVE_VIC7100=y
>> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
>> +CONFIG_MMC_DW_FLUSH_DDR=y
>> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
>> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
>> +CONFIG_VIDEO_STARFIVE_VIN=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
>> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
>> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
>> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
>> +CONFIG_PM=y
>> +CONFIG_PM_CLK=y
>> +CONFIG_EFI_BOOTLOADER_CONTROL=y
>> +CONFIG_BLK_PM=y
>> +CONFIG_IOSCHED_BFQ=y
>> +CONFIG_KSM=y
>> +CONFIG_CMA=y
>> +CONFIG_CMA_AREAS=7
>> +CONFIG_REGMAP_I2C=y
>> +CONFIG_REGMAP_IRQ=y
>> +CONFIG_MTD_OF_PARTS=y
>> +CONFIG_MTD_BLKDEVS=y
>> +CONFIG_MTD_BLOCK=y
>> +CONFIG_MTD_PARTITIONED_MASTER=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
>> +CONFIG_MTD_CFI_I1=y
>> +CONFIG_MTD_CFI_I2=y
>> +CONFIG_MTD_SPI_NOR=y
>> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
>> +CONFIG_BLK_DEV_NBD=y
>> +CONFIG_INPUT_LEDS=y
>> +CONFIG_INPUT_EVDEV=y
>> +CONFIG_SERIAL_8250_DMA=y
>> +CONFIG_SERIAL_8250_DWLIB=y
>> +CONFIG_SERIAL_8250_DW=y
>> +CONFIG_HW_RANDOM_VIRTIO=y
>> +CONFIG_I2C_CHARDEV=y
>> +CONFIG_I2C_MUX=y
>> +CONFIG_I2C_DESIGNWARE_CORE=y
>> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
>> +CONFIG_SPI_MEM=y
>> +CONFIG_SPI_CADENCE_QUADSPI=y
>> +CONFIG_SPI_DESIGNWARE=y
>> +CONFIG_SPI_DW_DMA=y
>> +CONFIG_SPI_DW_MMIO=y
>> +CONFIG_SPI_SPIDEV=y
>> +CONFIG_GPIO_SYSFS=y
>> +CONFIG_GPIO_STARFIVE_VIC=y
>> +CONFIG_GPIO_TPS65086=y
>> +CONFIG_POWER_RESET_TPS65086=y
>> +CONFIG_MFD_TPS65086=y
>> +CONFIG_USB_HID=y
>> +CONFIG_USB_CDNS_SUPPORT=y
>> +CONFIG_USB_CDNS_HOST=y
>> +CONFIG_USB_CDNS3=y
>> +CONFIG_USB_CDNS3_HOST=y
>> +CONFIG_USB_ROLE_SWITCH=y
>> +CONFIG_SDIO_UART=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_PLTFM=y
>> +CONFIG_NEW_LEDS=y
>> +CONFIG_LEDS_CLASS=y
>> +CONFIG_LEDS_GPIO=y
>> +CONFIG_LEDS_TRIGGERS=y
>> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
>> +CONFIG_RTC_DRV_EFI=y
>> +CONFIG_DMADEVICES=y
>> +CONFIG_DMA_ENGINE=y
>> +CONFIG_DMA_VIRTUAL_CHANNELS=y
>> +CONFIG_DMA_OF=y
>> +CONFIG_DW_AXI_DMAC=y
>> +CONFIG_DW_AXI_DMAC_STARFIVE=y
>> +CONFIG_COMMON_CLK_SI544=y
>> +CONFIG_COMMON_CLK_PWM=y
>> +CONFIG_SIFIVE_L2=y
>> +CONFIG_SIFIVE_L2_FLUSH=y
>> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
>> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
>> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
>> +CONFIG_PWM=y
>> +CONFIG_PWM_SYSFS=y
>> +CONFIG_PWM_SIFIVE_PTC=y
>> +CONFIG_RESET_CONTROLLER=y
>> +CONFIG_PROC_KCORE=y
>> +CONFIG_EFIVAR_FS=y
>> +CONFIG_ZLIB_DEFLATE=y
>> +CONFIG_DMA_CMA=y
>> +CONFIG_CMA_SIZE_MBYTES=640
>> +CONFIG_CMA_SIZE_SEL_MBYTES=y
>> +CONFIG_CMA_ALIGNMENT=8
>> +CONFIG_NET_VENDOR_STMICRO=y
>> +CONFIG_STMMAC_ETH=y
>> +CONFIG_STMMAC_PLATFORM=y
>> +CONFIG_DWMAC_GENERIC=y
>> +CONFIG_MICREL_PHY=y
>
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
2021-06-23 12:46 ` Akira Tsukamoto
@ 2021-06-23 19:08 ` Drew Fustini
-1 siblings, 0 replies; 16+ messages in thread
From: Drew Fustini @ 2021-06-23 19:08 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On Wed, Jun 23, 2021 at 09:46:54PM +0900, Akira Tsukamoto wrote:
>
> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
> ---
> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
Thanks for submitting this so we can review and discuss.
> index 1f2be234b11c..e07d26d2743c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> CONFIG_MEMTEST=y
> # CONFIG_SYSFS_SYSCALL is not set
> CONFIG_EFI=y
> +CONFIG_FB_STARFIVE=y
> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
> +CONFIG_FB_STARFIVE_SEEED5INCH=y
> +CONFIG_FB_STARFIVE_VIDEO=y
These should be dropped as they are vendor drivers that will never be
upstream as fbdev is deprecated [1]. StarFive is working on DRM driver
but that is a couple months away from being ready.
> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
> +CONFIG_SOC_STARFIVE_VIC7100=y
Before this gets merged upstream, we need to switch over to using JH7100
instead of VIC.
For those not familiar, VIC was the StarFive internal project name but
the product is named JH7100 [2].
> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
> +CONFIG_MMC_DW_FLUSH_DDR=y
> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
This config is being used in as a vendor hack in i2c_dw_configure_gpio()
drivers/i2c/busses/i2c-designware-master.c [3].
It's possible we may be able to eliminate this once I have completed
gpio and pinctrl drivers. Either way, this option will never be used in
an upstream kernel.
> +CONFIG_VIDEO_STARFIVE_VIN=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
These should be dropped as they are vendor drivers that do not use V4L2
and are not upstreamable [4]. StarFive is working on proper V4L2 drivers
but that is a couple months away from being ready.
> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
> +CONFIG_PM=y
> +CONFIG_PM_CLK=y
> +CONFIG_EFI_BOOTLOADER_CONTROL=y
> +CONFIG_BLK_PM=y
> +CONFIG_IOSCHED_BFQ=y
> +CONFIG_KSM=y
> +CONFIG_CMA=y
> +CONFIG_CMA_AREAS=7
> +CONFIG_REGMAP_I2C=y
> +CONFIG_REGMAP_IRQ=y
> +CONFIG_MTD_OF_PARTS=y
> +CONFIG_MTD_BLKDEVS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_PARTITIONED_MASTER=y
> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
> +CONFIG_MTD_CFI_I1=y
> +CONFIG_MTD_CFI_I2=y
> +CONFIG_MTD_SPI_NOR=y
> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
> +CONFIG_BLK_DEV_NBD=y
> +CONFIG_INPUT_LEDS=y
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_SERIAL_8250_DMA=y
> +CONFIG_SERIAL_8250_DWLIB=y
> +CONFIG_SERIAL_8250_DW=y
> +CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_DESIGNWARE_CORE=y
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> +CONFIG_SPI_MEM=y
> +CONFIG_SPI_CADENCE_QUADSPI=y
> +CONFIG_SPI_DESIGNWARE=y
> +CONFIG_SPI_DW_DMA=y
> +CONFIG_SPI_DW_MMIO=y
> +CONFIG_SPI_SPIDEV=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_STARFIVE_VIC=y
I am working on upstreamable version of the GPIO driver and will submit
RFC soon. This will be called CONFIG_GPIO_STARFIVE_JH7100.
> +CONFIG_GPIO_TPS65086=y
> +CONFIG_POWER_RESET_TPS65086=y
> +CONFIG_MFD_TPS65086=y
> +CONFIG_USB_HID=y
> +CONFIG_USB_CDNS_SUPPORT=y
> +CONFIG_USB_CDNS_HOST=y
> +CONFIG_USB_CDNS3=y
> +CONFIG_USB_CDNS3_HOST=y
> +CONFIG_USB_ROLE_SWITCH=y
> +CONFIG_SDIO_UART=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_PLTFM=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=y
> +CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> +CONFIG_RTC_DRV_EFI=y
> +CONFIG_DMADEVICES=y
> +CONFIG_DMA_ENGINE=y
> +CONFIG_DMA_VIRTUAL_CHANNELS=y
> +CONFIG_DMA_OF=y
> +CONFIG_DW_AXI_DMAC=y
> +CONFIG_DW_AXI_DMAC_STARFIVE=y
> +CONFIG_COMMON_CLK_SI544=y
> +CONFIG_COMMON_CLK_PWM=y
> +CONFIG_SIFIVE_L2=y
> +CONFIG_SIFIVE_L2_FLUSH=y
> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
> +CONFIG_PWM=y
> +CONFIG_PWM_SYSFS=y
> +CONFIG_PWM_SIFIVE_PTC=y
> +CONFIG_RESET_CONTROLLER=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_EFIVAR_FS=y
> +CONFIG_ZLIB_DEFLATE=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=640
> +CONFIG_CMA_SIZE_SEL_MBYTES=y
> +CONFIG_CMA_ALIGNMENT=8
> +CONFIG_NET_VENDOR_STMICRO=y
> +CONFIG_STMMAC_ETH=y
> +CONFIG_STMMAC_PLATFORM=y
> +CONFIG_DWMAC_GENERIC=y
> +CONFIG_MICREL_PHY=y
> --
> 2.17.1
>
>
Thanks,
Drew
[1] https://github.com/starfive-tech/linux/tree/beaglev/drivers/video/fbdev/starfive
[2] https://github.com/starfive-tech/beaglev_doc/
[3] https://github.com/starfive-tech/linux/blob/beaglev/drivers/i2c/busses/i2c-designware-master.c#L170
[4] https://github.com/starfive-tech/linux/tree/beaglev/drivers/media/platform/starfive
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
@ 2021-06-23 19:08 ` Drew Fustini
0 siblings, 0 replies; 16+ messages in thread
From: Drew Fustini @ 2021-06-23 19:08 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On Wed, Jun 23, 2021 at 09:46:54PM +0900, Akira Tsukamoto wrote:
>
> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
> ---
> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
Thanks for submitting this so we can review and discuss.
> index 1f2be234b11c..e07d26d2743c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> CONFIG_MEMTEST=y
> # CONFIG_SYSFS_SYSCALL is not set
> CONFIG_EFI=y
> +CONFIG_FB_STARFIVE=y
> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
> +CONFIG_FB_STARFIVE_SEEED5INCH=y
> +CONFIG_FB_STARFIVE_VIDEO=y
These should be dropped as they are vendor drivers that will never be
upstream as fbdev is deprecated [1]. StarFive is working on DRM driver
but that is a couple months away from being ready.
> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
> +CONFIG_SOC_STARFIVE_VIC7100=y
Before this gets merged upstream, we need to switch over to using JH7100
instead of VIC.
For those not familiar, VIC was the StarFive internal project name but
the product is named JH7100 [2].
> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
> +CONFIG_MMC_DW_FLUSH_DDR=y
> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
This config is being used in as a vendor hack in i2c_dw_configure_gpio()
drivers/i2c/busses/i2c-designware-master.c [3].
It's possible we may be able to eliminate this once I have completed
gpio and pinctrl drivers. Either way, this option will never be used in
an upstream kernel.
> +CONFIG_VIDEO_STARFIVE_VIN=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
These should be dropped as they are vendor drivers that do not use V4L2
and are not upstreamable [4]. StarFive is working on proper V4L2 drivers
but that is a couple months away from being ready.
> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
> +CONFIG_PM=y
> +CONFIG_PM_CLK=y
> +CONFIG_EFI_BOOTLOADER_CONTROL=y
> +CONFIG_BLK_PM=y
> +CONFIG_IOSCHED_BFQ=y
> +CONFIG_KSM=y
> +CONFIG_CMA=y
> +CONFIG_CMA_AREAS=7
> +CONFIG_REGMAP_I2C=y
> +CONFIG_REGMAP_IRQ=y
> +CONFIG_MTD_OF_PARTS=y
> +CONFIG_MTD_BLKDEVS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_PARTITIONED_MASTER=y
> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
> +CONFIG_MTD_CFI_I1=y
> +CONFIG_MTD_CFI_I2=y
> +CONFIG_MTD_SPI_NOR=y
> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
> +CONFIG_BLK_DEV_NBD=y
> +CONFIG_INPUT_LEDS=y
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_SERIAL_8250_DMA=y
> +CONFIG_SERIAL_8250_DWLIB=y
> +CONFIG_SERIAL_8250_DW=y
> +CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_DESIGNWARE_CORE=y
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> +CONFIG_SPI_MEM=y
> +CONFIG_SPI_CADENCE_QUADSPI=y
> +CONFIG_SPI_DESIGNWARE=y
> +CONFIG_SPI_DW_DMA=y
> +CONFIG_SPI_DW_MMIO=y
> +CONFIG_SPI_SPIDEV=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_STARFIVE_VIC=y
I am working on upstreamable version of the GPIO driver and will submit
RFC soon. This will be called CONFIG_GPIO_STARFIVE_JH7100.
> +CONFIG_GPIO_TPS65086=y
> +CONFIG_POWER_RESET_TPS65086=y
> +CONFIG_MFD_TPS65086=y
> +CONFIG_USB_HID=y
> +CONFIG_USB_CDNS_SUPPORT=y
> +CONFIG_USB_CDNS_HOST=y
> +CONFIG_USB_CDNS3=y
> +CONFIG_USB_CDNS3_HOST=y
> +CONFIG_USB_ROLE_SWITCH=y
> +CONFIG_SDIO_UART=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_PLTFM=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=y
> +CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> +CONFIG_RTC_DRV_EFI=y
> +CONFIG_DMADEVICES=y
> +CONFIG_DMA_ENGINE=y
> +CONFIG_DMA_VIRTUAL_CHANNELS=y
> +CONFIG_DMA_OF=y
> +CONFIG_DW_AXI_DMAC=y
> +CONFIG_DW_AXI_DMAC_STARFIVE=y
> +CONFIG_COMMON_CLK_SI544=y
> +CONFIG_COMMON_CLK_PWM=y
> +CONFIG_SIFIVE_L2=y
> +CONFIG_SIFIVE_L2_FLUSH=y
> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
> +CONFIG_PWM=y
> +CONFIG_PWM_SYSFS=y
> +CONFIG_PWM_SIFIVE_PTC=y
> +CONFIG_RESET_CONTROLLER=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_EFIVAR_FS=y
> +CONFIG_ZLIB_DEFLATE=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=640
> +CONFIG_CMA_SIZE_SEL_MBYTES=y
> +CONFIG_CMA_ALIGNMENT=8
> +CONFIG_NET_VENDOR_STMICRO=y
> +CONFIG_STMMAC_ETH=y
> +CONFIG_STMMAC_PLATFORM=y
> +CONFIG_DWMAC_GENERIC=y
> +CONFIG_MICREL_PHY=y
> --
> 2.17.1
>
>
Thanks,
Drew
[1] https://github.com/starfive-tech/linux/tree/beaglev/drivers/video/fbdev/starfive
[2] https://github.com/starfive-tech/beaglev_doc/
[3] https://github.com/starfive-tech/linux/blob/beaglev/drivers/i2c/busses/i2c-designware-master.c#L170
[4] https://github.com/starfive-tech/linux/tree/beaglev/drivers/media/platform/starfive
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
2021-06-23 19:08 ` Drew Fustini
@ 2021-06-24 14:49 ` Akira Tsukamoto
-1 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:49 UTC (permalink / raw)
To: Drew Fustini
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/24/2021 4:08 AM, Drew Fustini wrote:
> On Wed, Jun 23, 2021 at 09:46:54PM +0900, Akira Tsukamoto wrote:
>>
>> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
>> ---
>> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 105 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>
> Thanks for submitting this so we can review and discuss.
>
>> index 1f2be234b11c..e07d26d2743c 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
>> CONFIG_MEMTEST=y
>> # CONFIG_SYSFS_SYSCALL is not set
>> CONFIG_EFI=y
>> +CONFIG_FB_STARFIVE=y
>> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
>> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
>> +CONFIG_FB_STARFIVE_SEEED5INCH=y
>> +CONFIG_FB_STARFIVE_VIDEO=y
>
> These should be dropped as they are vendor drivers that will never be
> upstream as fbdev is deprecated [1]. StarFive is working on DRM driver
> but that is a couple months away from being ready.
I will remove fbdev. And enable DRM driver only when them become ready.
>
>> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
>> +CONFIG_SOC_STARFIVE_VIC7100=y
>
> Before this gets merged upstream, we need to switch over to using JH7100
> instead of VIC.
>
> For those not familiar, VIC was the StarFive internal project name but
> the product is named JH7100 [2].
I will wait to enable the configs above until the patches rename them
and become upstream ready.
>
>> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
>> +CONFIG_MMC_DW_FLUSH_DDR=y
>> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
>> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
>
> This config is being used in as a vendor hack in i2c_dw_configure_gpio()
> drivers/i2c/busses/i2c-designware-master.c [3].
>
> It's possible we may be able to eliminate this once I have completed
> gpio and pinctrl drivers. Either way, this option will never be used in
> an upstream kernel.
Sure, I will remove them and try it since I think your drivers were
in the Esmil branch.
>
>> +CONFIG_VIDEO_STARFIVE_VIN=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
>
> These should be dropped as they are vendor drivers that do not use V4L2
> and are not upstreamable [4]. StarFive is working on proper V4L2 drivers
> but that is a couple months away from being ready.
Thanks, I will also wait for the v4l2 being ready.
Akira
>
>> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
>> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
>> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
>> +CONFIG_PM=y
>> +CONFIG_PM_CLK=y
>> +CONFIG_EFI_BOOTLOADER_CONTROL=y
>> +CONFIG_BLK_PM=y
>> +CONFIG_IOSCHED_BFQ=y
>> +CONFIG_KSM=y
>> +CONFIG_CMA=y
>> +CONFIG_CMA_AREAS=7
>> +CONFIG_REGMAP_I2C=y
>> +CONFIG_REGMAP_IRQ=y
>> +CONFIG_MTD_OF_PARTS=y
>> +CONFIG_MTD_BLKDEVS=y
>> +CONFIG_MTD_BLOCK=y
>> +CONFIG_MTD_PARTITIONED_MASTER=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
>> +CONFIG_MTD_CFI_I1=y
>> +CONFIG_MTD_CFI_I2=y
>> +CONFIG_MTD_SPI_NOR=y
>> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
>> +CONFIG_BLK_DEV_NBD=y
>> +CONFIG_INPUT_LEDS=y
>> +CONFIG_INPUT_EVDEV=y
>> +CONFIG_SERIAL_8250_DMA=y
>> +CONFIG_SERIAL_8250_DWLIB=y
>> +CONFIG_SERIAL_8250_DW=y
>> +CONFIG_HW_RANDOM_VIRTIO=y
>> +CONFIG_I2C_CHARDEV=y
>> +CONFIG_I2C_MUX=y
>> +CONFIG_I2C_DESIGNWARE_CORE=y
>> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
>> +CONFIG_SPI_MEM=y
>> +CONFIG_SPI_CADENCE_QUADSPI=y
>> +CONFIG_SPI_DESIGNWARE=y
>> +CONFIG_SPI_DW_DMA=y
>> +CONFIG_SPI_DW_MMIO=y
>> +CONFIG_SPI_SPIDEV=y
>> +CONFIG_GPIO_SYSFS=y
>> +CONFIG_GPIO_STARFIVE_VIC=y
>
> I am working on upstreamable version of the GPIO driver and will submit
> RFC soon. This will be called CONFIG_GPIO_STARFIVE_JH7100.
>
>> +CONFIG_GPIO_TPS65086=y
>> +CONFIG_POWER_RESET_TPS65086=y
>> +CONFIG_MFD_TPS65086=y
>> +CONFIG_USB_HID=y
>> +CONFIG_USB_CDNS_SUPPORT=y
>> +CONFIG_USB_CDNS_HOST=y
>> +CONFIG_USB_CDNS3=y
>> +CONFIG_USB_CDNS3_HOST=y
>> +CONFIG_USB_ROLE_SWITCH=y
>> +CONFIG_SDIO_UART=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_PLTFM=y
>> +CONFIG_NEW_LEDS=y
>> +CONFIG_LEDS_CLASS=y
>> +CONFIG_LEDS_GPIO=y
>> +CONFIG_LEDS_TRIGGERS=y
>> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
>> +CONFIG_RTC_DRV_EFI=y
>> +CONFIG_DMADEVICES=y
>> +CONFIG_DMA_ENGINE=y
>> +CONFIG_DMA_VIRTUAL_CHANNELS=y
>> +CONFIG_DMA_OF=y
>> +CONFIG_DW_AXI_DMAC=y
>> +CONFIG_DW_AXI_DMAC_STARFIVE=y
>> +CONFIG_COMMON_CLK_SI544=y
>> +CONFIG_COMMON_CLK_PWM=y
>> +CONFIG_SIFIVE_L2=y
>> +CONFIG_SIFIVE_L2_FLUSH=y
>> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
>> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
>> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
>> +CONFIG_PWM=y
>> +CONFIG_PWM_SYSFS=y
>> +CONFIG_PWM_SIFIVE_PTC=y
>> +CONFIG_RESET_CONTROLLER=y
>> +CONFIG_PROC_KCORE=y
>> +CONFIG_EFIVAR_FS=y
>> +CONFIG_ZLIB_DEFLATE=y
>> +CONFIG_DMA_CMA=y
>> +CONFIG_CMA_SIZE_MBYTES=640
>> +CONFIG_CMA_SIZE_SEL_MBYTES=y
>> +CONFIG_CMA_ALIGNMENT=8
>> +CONFIG_NET_VENDOR_STMICRO=y
>> +CONFIG_STMMAC_ETH=y
>> +CONFIG_STMMAC_PLATFORM=y
>> +CONFIG_DWMAC_GENERIC=y
>> +CONFIG_MICREL_PHY=y
>> --
>> 2.17.1
>>
>>
>
> Thanks,
> Drew
>
> [1] https://github.com/starfive-tech/linux/tree/beaglev/drivers/video/fbdev/starfive
> [2] https://github.com/starfive-tech/beaglev_doc/
> [3] https://github.com/starfive-tech/linux/blob/beaglev/drivers/i2c/busses/i2c-designware-master.c#L170
> [4] https://github.com/starfive-tech/linux/tree/beaglev/drivers/media/platform/starfive
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/1] config: Enable jh7100 SoC
@ 2021-06-24 14:49 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:49 UTC (permalink / raw)
To: Drew Fustini
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/24/2021 4:08 AM, Drew Fustini wrote:
> On Wed, Jun 23, 2021 at 09:46:54PM +0900, Akira Tsukamoto wrote:
>>
>> Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com>
>> ---
>> arch/riscv/configs/defconfig | 105 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 105 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>
> Thanks for submitting this so we can review and discuss.
>
>> index 1f2be234b11c..e07d26d2743c 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -138,3 +138,108 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
>> CONFIG_MEMTEST=y
>> # CONFIG_SYSFS_SYSCALL is not set
>> CONFIG_EFI=y
>> +CONFIG_FB_STARFIVE=y
>> +CONFIG_FB_STARFIVE_HDMI_ADV7513=y
>> +CONFIG_FB_STARFIVE_HDMI_TDA998X=y
>> +CONFIG_FB_STARFIVE_SEEED5INCH=y
>> +CONFIG_FB_STARFIVE_VIDEO=y
>
> These should be dropped as they are vendor drivers that will never be
> upstream as fbdev is deprecated [1]. StarFive is working on DRM driver
> but that is a couple months away from being ready.
I will remove fbdev. And enable DRM driver only when them become ready.
>
>> +CONFIG_HW_RANDOM_STARFIVE_VIC=y
>> +CONFIG_SOC_STARFIVE_VIC7100=y
>
> Before this gets merged upstream, we need to switch over to using JH7100
> instead of VIC.
>
> For those not familiar, VIC was the StarFive internal project name but
> the product is named JH7100 [2].
I will wait to enable the configs above until the patches rename them
and become upstream ready.
>
>> +CONFIG_FPGA_GMAC_FLUSH_DDR=y
>> +CONFIG_MMC_DW_FLUSH_DDR=y
>> +CONFIG_USB_CDNS3_HOST_FLUSH_DMA=y
>> +CONFIG_SOC_STARFIVE_VIC7100_I2C_GPIO=y
>
> This config is being used in as a vendor hack in i2c_dw_configure_gpio()
> drivers/i2c/busses/i2c-designware-master.c [3].
>
> It's possible we may be able to eliminate this once I have completed
> gpio and pinctrl drivers. Either way, this option will never be used in
> an upstream kernel.
Sure, I will remove them and try it since I think your drivers were
in the Esmil branch.
>
>> +CONFIG_VIDEO_STARFIVE_VIN=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_IMX219=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_OV5640=y
>> +CONFIG_VIDEO_STARFIVE_VIN_SENSOR_SC2235=y
>
> These should be dropped as they are vendor drivers that do not use V4L2
> and are not upstreamable [4]. StarFive is working on proper V4L2 drivers
> but that is a couple months away from being ready.
Thanks, I will also wait for the v4l2 being ready.
Akira
>
>> +CONFIG_RCU_CPU_STALL_TIMEOUT=60
>> +CONFIG_LOG_CPU_MAX_BUF_SHIFT=15
>> +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
>> +CONFIG_PM=y
>> +CONFIG_PM_CLK=y
>> +CONFIG_EFI_BOOTLOADER_CONTROL=y
>> +CONFIG_BLK_PM=y
>> +CONFIG_IOSCHED_BFQ=y
>> +CONFIG_KSM=y
>> +CONFIG_CMA=y
>> +CONFIG_CMA_AREAS=7
>> +CONFIG_REGMAP_I2C=y
>> +CONFIG_REGMAP_IRQ=y
>> +CONFIG_MTD_OF_PARTS=y
>> +CONFIG_MTD_BLKDEVS=y
>> +CONFIG_MTD_BLOCK=y
>> +CONFIG_MTD_PARTITIONED_MASTER=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
>> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
>> +CONFIG_MTD_CFI_I1=y
>> +CONFIG_MTD_CFI_I2=y
>> +CONFIG_MTD_SPI_NOR=y
>> +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
>> +CONFIG_BLK_DEV_NBD=y
>> +CONFIG_INPUT_LEDS=y
>> +CONFIG_INPUT_EVDEV=y
>> +CONFIG_SERIAL_8250_DMA=y
>> +CONFIG_SERIAL_8250_DWLIB=y
>> +CONFIG_SERIAL_8250_DW=y
>> +CONFIG_HW_RANDOM_VIRTIO=y
>> +CONFIG_I2C_CHARDEV=y
>> +CONFIG_I2C_MUX=y
>> +CONFIG_I2C_DESIGNWARE_CORE=y
>> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
>> +CONFIG_SPI_MEM=y
>> +CONFIG_SPI_CADENCE_QUADSPI=y
>> +CONFIG_SPI_DESIGNWARE=y
>> +CONFIG_SPI_DW_DMA=y
>> +CONFIG_SPI_DW_MMIO=y
>> +CONFIG_SPI_SPIDEV=y
>> +CONFIG_GPIO_SYSFS=y
>> +CONFIG_GPIO_STARFIVE_VIC=y
>
> I am working on upstreamable version of the GPIO driver and will submit
> RFC soon. This will be called CONFIG_GPIO_STARFIVE_JH7100.
>
>> +CONFIG_GPIO_TPS65086=y
>> +CONFIG_POWER_RESET_TPS65086=y
>> +CONFIG_MFD_TPS65086=y
>> +CONFIG_USB_HID=y
>> +CONFIG_USB_CDNS_SUPPORT=y
>> +CONFIG_USB_CDNS_HOST=y
>> +CONFIG_USB_CDNS3=y
>> +CONFIG_USB_CDNS3_HOST=y
>> +CONFIG_USB_ROLE_SWITCH=y
>> +CONFIG_SDIO_UART=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_PLTFM=y
>> +CONFIG_NEW_LEDS=y
>> +CONFIG_LEDS_CLASS=y
>> +CONFIG_LEDS_GPIO=y
>> +CONFIG_LEDS_TRIGGERS=y
>> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
>> +CONFIG_RTC_DRV_EFI=y
>> +CONFIG_DMADEVICES=y
>> +CONFIG_DMA_ENGINE=y
>> +CONFIG_DMA_VIRTUAL_CHANNELS=y
>> +CONFIG_DMA_OF=y
>> +CONFIG_DW_AXI_DMAC=y
>> +CONFIG_DW_AXI_DMAC_STARFIVE=y
>> +CONFIG_COMMON_CLK_SI544=y
>> +CONFIG_COMMON_CLK_PWM=y
>> +CONFIG_SIFIVE_L2=y
>> +CONFIG_SIFIVE_L2_FLUSH=y
>> +CONFIG_SIFIVE_L2_FLUSH_START=0x80000000
>> +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x800000000
>> +CONFIG_SIFIVE_L2_IRQ_DISABLE=y
>> +CONFIG_PWM=y
>> +CONFIG_PWM_SYSFS=y
>> +CONFIG_PWM_SIFIVE_PTC=y
>> +CONFIG_RESET_CONTROLLER=y
>> +CONFIG_PROC_KCORE=y
>> +CONFIG_EFIVAR_FS=y
>> +CONFIG_ZLIB_DEFLATE=y
>> +CONFIG_DMA_CMA=y
>> +CONFIG_CMA_SIZE_MBYTES=640
>> +CONFIG_CMA_SIZE_SEL_MBYTES=y
>> +CONFIG_CMA_ALIGNMENT=8
>> +CONFIG_NET_VENDOR_STMICRO=y
>> +CONFIG_STMMAC_ETH=y
>> +CONFIG_STMMAC_PLATFORM=y
>> +CONFIG_DWMAC_GENERIC=y
>> +CONFIG_MICREL_PHY=y
>> --
>> 2.17.1
>>
>>
>
> Thanks,
> Drew
>
> [1] https://github.com/starfive-tech/linux/tree/beaglev/drivers/video/fbdev/starfive
> [2] https://github.com/starfive-tech/beaglev_doc/
> [3] https://github.com/starfive-tech/linux/blob/beaglev/drivers/i2c/busses/i2c-designware-master.c#L170
> [4] https://github.com/starfive-tech/linux/tree/beaglev/drivers/media/platform/starfive
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
2021-06-23 12:45 ` Akira Tsukamoto
@ 2021-06-23 18:50 ` Drew Fustini
-1 siblings, 0 replies; 16+ messages in thread
From: Drew Fustini @ 2021-06-23 18:50 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On Wed, Jun 23, 2021 at 09:45:52PM +0900, Akira Tsukamoto wrote:
>
> Would like to have comments for adding jh7100 SoC to defconfig.
Thanks for preparing this defconfig.
Let's refer to the SoC as StarFive JH7100 SoC [1] which is used in the
BeagleV Starlight JH7100 board [2].
> To make the upstream friendly, try to add as minimum as possible in
> arch/riscv/configs/defconfig required for beaglev-beta against the
Please use "BeagleV Starlight JH7100" instead of beaglev-beta.
> upstream defconfig. I might have added too much configs.
>
> Then the distro vendors could use:
> make defconfig beablev-fedora.config
> or
> make defconfig beablev-debian.config
>
> while distro vendors keeping beablev-fedora.config and
> beablev-debian.config in their own repositories to make one binary kernel
> which boots for all riscv boards.
Note about naming, BeagleV refers to any RISC-V board produced by
BeagleBoard.org and likely in the future will include other SoC
families.
>
> Probably, it is not good practice to add a different defconfig file under
> arch/riscv/configs/ when each new riscv board comes out.
We currently have:
defconfig
nommu_k210_defconfig
nommu_k210_sdcard_defconfig
nommu_virt_defconfig
rv32_defconfig
It seems like 'defconfig' supports the SiFive Unleashed board which
makes sense as it was the only board for a longtime:
$ git grep -i sifive
defconfig:CONFIG_SOC_SIFIVE=y
defconfig:CONFIG_SPI_SIFIVE=y
defconfig:CONFIG_GPIO_SIFIVE=y
I suppose the kconfig options needed for BeagleV Starlight JH7100 could
be added to 'defconfig' as long as there were no incompatibilities. I
assume the k210 versions were added because that is a rather odd SoC
that has a non-supported MMU and thus runs in m-mode.
Thanks,
Drew
[1] https://github.com/starfive-tech/beaglev_doc/
[2] https://github.com/beagleboard/beaglev-starlight
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
@ 2021-06-23 18:50 ` Drew Fustini
0 siblings, 0 replies; 16+ messages in thread
From: Drew Fustini @ 2021-06-23 18:50 UTC (permalink / raw)
To: Akira Tsukamoto
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On Wed, Jun 23, 2021 at 09:45:52PM +0900, Akira Tsukamoto wrote:
>
> Would like to have comments for adding jh7100 SoC to defconfig.
Thanks for preparing this defconfig.
Let's refer to the SoC as StarFive JH7100 SoC [1] which is used in the
BeagleV Starlight JH7100 board [2].
> To make the upstream friendly, try to add as minimum as possible in
> arch/riscv/configs/defconfig required for beaglev-beta against the
Please use "BeagleV Starlight JH7100" instead of beaglev-beta.
> upstream defconfig. I might have added too much configs.
>
> Then the distro vendors could use:
> make defconfig beablev-fedora.config
> or
> make defconfig beablev-debian.config
>
> while distro vendors keeping beablev-fedora.config and
> beablev-debian.config in their own repositories to make one binary kernel
> which boots for all riscv boards.
Note about naming, BeagleV refers to any RISC-V board produced by
BeagleBoard.org and likely in the future will include other SoC
families.
>
> Probably, it is not good practice to add a different defconfig file under
> arch/riscv/configs/ when each new riscv board comes out.
We currently have:
defconfig
nommu_k210_defconfig
nommu_k210_sdcard_defconfig
nommu_virt_defconfig
rv32_defconfig
It seems like 'defconfig' supports the SiFive Unleashed board which
makes sense as it was the only board for a longtime:
$ git grep -i sifive
defconfig:CONFIG_SOC_SIFIVE=y
defconfig:CONFIG_SPI_SIFIVE=y
defconfig:CONFIG_GPIO_SIFIVE=y
I suppose the kconfig options needed for BeagleV Starlight JH7100 could
be added to 'defconfig' as long as there were no incompatibilities. I
assume the k210 versions were added because that is a rather odd SoC
that has a non-supported MMU and thus runs in m-mode.
Thanks,
Drew
[1] https://github.com/starfive-tech/beaglev_doc/
[2] https://github.com/beagleboard/beaglev-starlight
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
2021-06-23 18:50 ` Drew Fustini
@ 2021-06-24 14:42 ` Akira Tsukamoto
-1 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:42 UTC (permalink / raw)
To: Drew Fustini
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/24/2021 3:50 AM, Drew Fustini wrote:
> On Wed, Jun 23, 2021 at 09:45:52PM +0900, Akira Tsukamoto wrote:
>>
>> Would like to have comments for adding jh7100 SoC to defconfig.
>
> Thanks for preparing this defconfig.
>
> Let's refer to the SoC as StarFive JH7100 SoC [1] which is used in the
> BeagleV Starlight JH7100 board [2].
>
>> To make the upstream friendly, try to add as minimum as possible in
>> arch/riscv/configs/defconfig required for beaglev-beta against the
>
> Please use "BeagleV Starlight JH7100" instead of beaglev-beta.
>
>> upstream defconfig. I might have added too much configs.
>>
>> Then the distro vendors could use:
>> make defconfig beablev-fedora.config
>> or
>> make defconfig beablev-debian.config
>>
>> while distro vendors keeping beablev-fedora.config and
>> beablev-debian.config in their own repositories to make one binary kernel
>> which boots for all riscv boards.
>
> Note about naming, BeagleV refers to any RISC-V board produced by
> BeagleBoard.org and likely in the future will include other SoC
> families.
No problem, I will rename them all to "StarFive JH7100 SoC" and
"BeagleV Starlight JH7100 board".
>
>>
>> Probably, it is not good practice to add a different defconfig file under
>> arch/riscv/configs/ when each new riscv board comes out.
>
> We currently have:
>
> defconfig
> nommu_k210_defconfig
> nommu_k210_sdcard_defconfig
> nommu_virt_defconfig
> rv32_defconfig
>
> It seems like 'defconfig' supports the SiFive Unleashed board which
> makes sense as it was the only board for a longtime:
>
> $ git grep -i sifive
> defconfig:CONFIG_SOC_SIFIVE=y
> defconfig:CONFIG_SPI_SIFIVE=y
> defconfig:CONFIG_GPIO_SIFIVE=y
>
> I suppose the kconfig options needed for BeagleV Starlight JH7100 could
> be added to 'defconfig' as long as there were no incompatibilities. I
> assume the k210 versions were added because that is a rather odd SoC
> that has a non-supported MMU and thus runs in m-mode.
By adding configs for BeagleV Starlight JH7100 booting fine on the current
defconfig which were SiFive Unleashed. Would like to have comments from
the users of Unleashed when this patch starts to settle down.
Akira
>
> Thanks,
> Drew
>
> [1] https://github.com/starfive-tech/beaglev_doc/
> [2] https://github.com/beagleboard/beaglev-starlight
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC PATCH 0/1] Adding jh7100 SoC to defconfig
@ 2021-06-24 14:42 ` Akira Tsukamoto
0 siblings, 0 replies; 16+ messages in thread
From: Akira Tsukamoto @ 2021-06-24 14:42 UTC (permalink / raw)
To: Drew Fustini
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
Anup Patel, Emil Renner Berthing, Björn Töpel,
Sagar Shrikant Kadam, linux-riscv, linux-kernel
On 6/24/2021 3:50 AM, Drew Fustini wrote:
> On Wed, Jun 23, 2021 at 09:45:52PM +0900, Akira Tsukamoto wrote:
>>
>> Would like to have comments for adding jh7100 SoC to defconfig.
>
> Thanks for preparing this defconfig.
>
> Let's refer to the SoC as StarFive JH7100 SoC [1] which is used in the
> BeagleV Starlight JH7100 board [2].
>
>> To make the upstream friendly, try to add as minimum as possible in
>> arch/riscv/configs/defconfig required for beaglev-beta against the
>
> Please use "BeagleV Starlight JH7100" instead of beaglev-beta.
>
>> upstream defconfig. I might have added too much configs.
>>
>> Then the distro vendors could use:
>> make defconfig beablev-fedora.config
>> or
>> make defconfig beablev-debian.config
>>
>> while distro vendors keeping beablev-fedora.config and
>> beablev-debian.config in their own repositories to make one binary kernel
>> which boots for all riscv boards.
>
> Note about naming, BeagleV refers to any RISC-V board produced by
> BeagleBoard.org and likely in the future will include other SoC
> families.
No problem, I will rename them all to "StarFive JH7100 SoC" and
"BeagleV Starlight JH7100 board".
>
>>
>> Probably, it is not good practice to add a different defconfig file under
>> arch/riscv/configs/ when each new riscv board comes out.
>
> We currently have:
>
> defconfig
> nommu_k210_defconfig
> nommu_k210_sdcard_defconfig
> nommu_virt_defconfig
> rv32_defconfig
>
> It seems like 'defconfig' supports the SiFive Unleashed board which
> makes sense as it was the only board for a longtime:
>
> $ git grep -i sifive
> defconfig:CONFIG_SOC_SIFIVE=y
> defconfig:CONFIG_SPI_SIFIVE=y
> defconfig:CONFIG_GPIO_SIFIVE=y
>
> I suppose the kconfig options needed for BeagleV Starlight JH7100 could
> be added to 'defconfig' as long as there were no incompatibilities. I
> assume the k210 versions were added because that is a rather odd SoC
> that has a non-supported MMU and thus runs in m-mode.
By adding configs for BeagleV Starlight JH7100 booting fine on the current
defconfig which were SiFive Unleashed. Would like to have comments from
the users of Unleashed when this patch starts to settle down.
Akira
>
> Thanks,
> Drew
>
> [1] https://github.com/starfive-tech/beaglev_doc/
> [2] https://github.com/beagleboard/beaglev-starlight
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-06-24 14:50 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-23 12:45 [RFC PATCH 0/1] Adding jh7100 SoC to defconfig Akira Tsukamoto
2021-06-23 12:45 ` Akira Tsukamoto
2021-06-23 12:46 ` [PATCH 1/1] config: Enable jh7100 SoC Akira Tsukamoto
2021-06-23 12:46 ` Akira Tsukamoto
2021-06-23 13:21 ` Jisheng Zhang
2021-06-23 13:21 ` Jisheng Zhang
2021-06-24 14:35 ` Akira Tsukamoto
2021-06-24 14:35 ` Akira Tsukamoto
2021-06-23 19:08 ` Drew Fustini
2021-06-23 19:08 ` Drew Fustini
2021-06-24 14:49 ` Akira Tsukamoto
2021-06-24 14:49 ` Akira Tsukamoto
2021-06-23 18:50 ` [RFC PATCH 0/1] Adding jh7100 SoC to defconfig Drew Fustini
2021-06-23 18:50 ` Drew Fustini
2021-06-24 14:42 ` Akira Tsukamoto
2021-06-24 14:42 ` Akira Tsukamoto
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