From: "Michel Dänzer" <michel@daenzer.net> To: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Vetter <daniel.vetter@intel.com>, dri-devel@lists.freedesktop.org, open list <linux-kernel@vger.kernel.org>, amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format Date: Thu, 27 Apr 2017 09:52:59 +0900 [thread overview] Message-ID: <6bd62182-0de5-a8a7-78c3-029fc73ecc91@daenzer.net> (raw) In-Reply-To: <1493208671.23739.19.camel@redhat.com> On 26/04/17 09:11 PM, Gerd Hoffmann wrote: > Hi, > >>>> Just to reiterate, this won't work for the radeon driver, which programs >>>> the GPU to use (effectively, per the current definition that these are >>>> little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and >>>> DRM_FORMAT_BGRX8888 with >= R600. >>> >>> Hmm, ok, how does bigendian fbdev emulation work on pre-R600 then? >> >> Using a GPU byte swapping mechanism which only affects CPU access to >> video RAM. > > That is done using the RADEON_TILING_SWAP_{16,32}BIT flag mentioned in > another thread? Right. > What about dumb bos? You've mentioned the swap flag isn't used for > those. Which implies they are in little endian byte order (both gpu and > cpu view). Right, AFAICT from looking at the code. > Does the modesetting driver work correctly on that hardware? Not sure. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer
WARNING: multiple messages have this Message-ID (diff)
From: "Michel Dänzer" <michel@daenzer.net> To: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Vetter <daniel.vetter@intel.com>, amd-gfx@lists.freedesktop.org, open list <linux-kernel@vger.kernel.org>, dri-devel@lists.freedesktop.org Subject: Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format Date: Thu, 27 Apr 2017 09:52:59 +0900 [thread overview] Message-ID: <6bd62182-0de5-a8a7-78c3-029fc73ecc91@daenzer.net> (raw) In-Reply-To: <1493208671.23739.19.camel@redhat.com> On 26/04/17 09:11 PM, Gerd Hoffmann wrote: > Hi, > >>>> Just to reiterate, this won't work for the radeon driver, which programs >>>> the GPU to use (effectively, per the current definition that these are >>>> little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and >>>> DRM_FORMAT_BGRX8888 with >= R600. >>> >>> Hmm, ok, how does bigendian fbdev emulation work on pre-R600 then? >> >> Using a GPU byte swapping mechanism which only affects CPU access to >> video RAM. > > That is done using the RADEON_TILING_SWAP_{16,32}BIT flag mentioned in > another thread? Right. > What about dumb bos? You've mentioned the swap flag isn't used for > those. Which implies they are in little endian byte order (both gpu and > cpu view). Right, AFAICT from looking at the code. > Does the modesetting driver work correctly on that hardware? Not sure. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2017-04-27 0:53 UTC|newest] Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-24 6:25 [PATCH 0/6] drm: tackle byteorder issues, take two Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 1/6] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 2/6] drm: fourcc byteorder: add DRM_FORMAT_CPU_* Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-25 3:18 ` Michel Dänzer 2017-04-25 3:18 ` Michel Dänzer 2017-04-25 9:52 ` Ville Syrjälä 2017-04-26 2:00 ` Michel Dänzer 2017-04-26 2:00 ` Michel Dänzer 2017-04-26 14:30 ` Ville Syrjälä 2017-04-26 14:30 ` Ville Syrjälä 2017-04-26 5:53 ` Gerd Hoffmann 2017-04-26 5:53 ` Gerd Hoffmann 2017-04-26 9:21 ` Michel Dänzer 2017-04-26 9:21 ` Michel Dänzer 2017-04-26 12:11 ` Gerd Hoffmann 2017-04-26 12:11 ` Gerd Hoffmann 2017-04-27 0:52 ` Michel Dänzer [this message] 2017-04-27 0:52 ` Michel Dänzer 2017-04-27 6:45 ` Gerd Hoffmann 2017-04-27 6:45 ` Gerd Hoffmann 2017-04-27 7:02 ` Michel Dänzer 2017-04-28 10:02 ` Gerd Hoffmann 2017-04-28 10:02 ` Gerd Hoffmann 2017-04-26 13:28 ` Eric Engestrom 2017-04-26 13:28 ` Eric Engestrom 2017-04-26 13:57 ` Gerd Hoffmann 2017-04-26 13:57 ` Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 4/6] drm: fourcc byteorder: adapt bochs-drm to drm_mode_legacy_fb_format update Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 5/6] drm: fourcc byteorder: adapt virtio " Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann 2017-04-24 6:25 ` [PATCH 6/6] drm: fourcc byteorder: virtio restrict to XRGB8888 Gerd Hoffmann 2017-04-24 6:25 ` Gerd Hoffmann [not found] ` <20170424062532.26722-1-kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2017-04-24 7:03 ` [PATCH 0/6] drm: tackle byteorder issues, take two Michel Dänzer [not found] ` <484f319e-c2b7-adc8-4ecf-537803cc2eee-otUistvHUpPR7s880joybQ@public.gmane.org> 2017-04-24 7:36 ` Gerd Hoffmann 2017-04-24 7:54 ` Michel Dänzer [not found] ` <f6555947-598f-0dfe-b15d-cda291778e8e-otUistvHUpPR7s880joybQ@public.gmane.org> 2017-04-24 14:26 ` Ville Syrjälä 2017-04-24 17:06 ` Daniel Stone [not found] ` <20170424142603.GX30290-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> 2017-04-24 17:28 ` Ville Syrjälä 2017-04-25 0:49 ` Michel Dänzer [not found] ` <65ba8ab7-d647-4b9e-1e8c-aa6e9b1ff996-otUistvHUpPR7s880joybQ@public.gmane.org> 2017-04-25 9:50 ` Ville Syrjälä
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