From: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
Simon Horman <horms-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Magnus Damm <magnus.damm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH 06/11] arm64: dts: renesas: r8a77980: add SYS-DMAC support
Date: Fri, 2 Feb 2018 21:36:16 +0300 [thread overview]
Message-ID: <70132f3d-0f37-ae7e-a44b-d65920620936@cogentembedded.com> (raw)
In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
Describe SYS-DMAC1/2 in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 68 ++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -85,6 +85,74 @@
#power-domain-cells = <1>;
};
+ dmac1: dma-controller@e7300000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac2: dma-controller@e7310000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
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WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Rob Herring <robh+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Simon Horman <horms@verge.net.au>,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 06/11] arm64: dts: renesas: r8a77980: add SYS-DMAC support
Date: Fri, 2 Feb 2018 21:36:16 +0300 [thread overview]
Message-ID: <70132f3d-0f37-ae7e-a44b-d65920620936@cogentembedded.com> (raw)
In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com>
Describe SYS-DMAC1/2 in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 68 ++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -85,6 +85,74 @@
#power-domain-cells = <1>;
};
+ dmac1: dma-controller@e7300000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac2: dma-controller@e7310000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 06/11] arm64: dts: renesas: r8a77980: add SYS-DMAC support
Date: Fri, 2 Feb 2018 21:36:16 +0300 [thread overview]
Message-ID: <70132f3d-0f37-ae7e-a44b-d65920620936@cogentembedded.com> (raw)
In-Reply-To: <46fca582-220d-e5a7-62cd-2fc77a29846b@cogentembedded.com>
Describe SYS-DMAC1/2 in the R8A77980 device tree.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 68 ++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -85,6 +85,74 @@
#power-domain-cells = <1>;
};
+ dmac1: dma-controller at e7300000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac2: dma-controller at e7310000 {
+ compatible = "renesas,dmac-r8a77980",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
gic: interrupt-controller at f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
next prev parent reply other threads:[~2018-02-02 18:36 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-02 18:18 [PATCH 00/11] Add R8A77980/Condor board support Sergei Shtylyov
2018-02-02 18:18 ` Sergei Shtylyov
2018-02-02 18:22 ` [PATCH 01/11] soc: renesas: identify R-Car V3H Sergei Shtylyov
2018-02-05 9:18 ` Simon Horman
2018-02-05 12:32 ` Geert Uytterhoeven
2018-02-06 12:44 ` Simon Horman
2018-02-06 16:15 ` Sergei Shtylyov
2018-02-07 9:36 ` Simon Horman
2018-02-02 18:27 ` [PATCH 02/11] soc: renesas: rcar-rst: add R8A77980 support Sergei Shtylyov
2018-02-05 9:19 ` Simon Horman
[not found] ` <76b4144e-423a-65fd-fe17-bfedbc0deb8e-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-05 12:37 ` Geert Uytterhoeven
2018-02-05 12:37 ` Geert Uytterhoeven
2018-02-06 12:45 ` Simon Horman
2018-02-02 18:33 ` [PATCH 05/11] arm64: dts: renesas: initial R8A77980 SoC device tree Sergei Shtylyov
2018-02-02 18:33 ` Sergei Shtylyov
2018-02-05 13:32 ` Geert Uytterhoeven
2018-02-05 13:32 ` Geert Uytterhoeven
[not found] ` <CAMuHMdWad2OJ33Hu0KbYS3nLWhgmj81_wRbtwApw-N81q3+nsA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-02-05 13:48 ` Sergei Shtylyov
2018-02-05 13:48 ` Sergei Shtylyov
2018-02-05 13:48 ` Sergei Shtylyov
2018-02-05 13:51 ` Geert Uytterhoeven
2018-02-05 13:51 ` Geert Uytterhoeven
[not found] ` <CAMuHMdVfuruK36OUVdOcHaJogoM8oee_+b+4UzjBfUBoMiEbOQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-02-06 12:52 ` Simon Horman
2018-02-06 12:52 ` Simon Horman
2018-02-06 12:52 ` Simon Horman
[not found] ` <46fca582-220d-e5a7-62cd-2fc77a29846b-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-02 18:29 ` [PATCH 03/11] dt-bindings: power: add R8A77980 SYSC power domain definitions Sergei Shtylyov
2018-02-02 18:29 ` Sergei Shtylyov
2018-02-05 9:56 ` Simon Horman
[not found] ` <5177bec1-422f-688d-ea67-f15951505b1e-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-05 12:43 ` Geert Uytterhoeven
2018-02-05 12:43 ` Geert Uytterhoeven
[not found] ` <CAMuHMdWUGbnF+vA6r4NCvNh3-TLhnWZCm3ixxfy2+s6+9giKiw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-02-06 12:47 ` Simon Horman
2018-02-06 12:47 ` Simon Horman
2018-02-02 18:31 ` [PATCH 04/11] soc: renesas: rcar-sysc: add R8A77980 support Sergei Shtylyov
[not found] ` <0309d18d-d5d8-ab59-9c15-79b4093e0a51-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-05 13:23 ` Geert Uytterhoeven
[not found] ` <CAMuHMdUQuUhbiPnO1L7t5W5F8wJ72iYLM5VtT4gg0RuePcx7RA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-02-15 16:48 ` Sergei Shtylyov
[not found] ` <b61b4bd9-a1ac-8145-237f-71049a13b90f-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-15 18:27 ` Sergei Shtylyov
2018-02-07 10:29 ` Simon Horman
[not found] ` <20180207102942.jmggcp5isiwdzwqt-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org>
2018-02-07 10:56 ` Sergei Shtylyov
2018-02-02 18:36 ` Sergei Shtylyov [this message]
2018-02-02 18:36 ` [PATCH 06/11] arm64: dts: renesas: r8a77980: add SYS-DMAC support Sergei Shtylyov
2018-02-02 18:36 ` Sergei Shtylyov
2018-02-06 11:40 ` Geert Uytterhoeven
2018-02-06 11:40 ` Geert Uytterhoeven
2018-02-06 12:55 ` Simon Horman
2018-02-06 12:55 ` Simon Horman
2018-02-02 18:42 ` [PATCH 08/11] arm64: dts: renesas: r8a77980: add EtherAVB support Sergei Shtylyov
2018-02-02 18:42 ` Sergei Shtylyov
2018-02-02 18:42 ` Sergei Shtylyov
2018-02-06 12:04 ` Geert Uytterhoeven
2018-02-06 12:04 ` Geert Uytterhoeven
2018-02-06 15:19 ` Sergei Shtylyov
2018-02-06 15:19 ` Sergei Shtylyov
2018-02-02 18:46 ` [PATCH 10/11] arm64: dts: renesas: initial Condor board device tree Sergei Shtylyov
2018-02-02 18:46 ` Sergei Shtylyov
2018-02-02 18:46 ` Sergei Shtylyov
[not found] ` <c35dca71-fc63-7628-d483-ad690bea7ced-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-09 7:42 ` Geert Uytterhoeven
2018-02-09 7:42 ` Geert Uytterhoeven
2018-02-09 7:42 ` Geert Uytterhoeven
2018-02-02 18:48 ` [PATCH 11/11] arm64: dts: renesas: condor: add EtherAVB support Sergei Shtylyov
2018-02-02 18:48 ` Sergei Shtylyov
2018-02-02 18:48 ` Sergei Shtylyov
2018-02-02 18:39 ` [PATCH 07/11] arm64: dts: renesas: r8a77980: add [H]SCIF support Sergei Shtylyov
2018-02-02 18:39 ` Sergei Shtylyov
2018-02-06 11:58 ` Geert Uytterhoeven
2018-02-06 11:58 ` Geert Uytterhoeven
[not found] ` <CAMuHMdWXc=1s5rMU5Tc_=tH4jrH+5P6z52J3ihiyYfseTpQ-kw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-02-06 16:41 ` Sergei Shtylyov
2018-02-06 16:41 ` Sergei Shtylyov
2018-02-06 16:41 ` Sergei Shtylyov
2018-02-02 18:45 ` [PATCH 09/11] DT: arm: shmobile: document Condor board bindings Sergei Shtylyov
2018-02-02 18:45 ` Sergei Shtylyov
[not found] ` <30a4e575-a2c9-e0d3-f41f-4e9b15543365-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-08 20:13 ` Rob Herring
2018-02-08 20:13 ` Rob Herring
2018-02-08 20:13 ` Rob Herring
2018-02-09 9:18 ` Simon Horman
2018-02-09 9:18 ` Simon Horman
2018-02-09 7:27 ` Geert Uytterhoeven
2018-02-09 7:27 ` Geert Uytterhoeven
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