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From: Auger Eric <eric.auger@redhat.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Andrew Jones <drjones@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: Marc Zyngier <maz@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 05/17] arm: gic: Prepare IRQ handler for handling SPIs
Date: Tue, 12 Nov 2019 21:56:12 +0100	[thread overview]
Message-ID: <76947b00-816b-9363-a9d6-5e4ef92b74c5@redhat.com> (raw)
In-Reply-To: <20191108144240.204202-6-andre.przywara@arm.com>

Hi Andre,

On 11/8/19 3:42 PM, Andre Przywara wrote:
> So far our IRQ handler routine checks that the received IRQ is actually
> the one SGI (IPI) that we are using for our testing.
> 
> To make the IRQ testing routine more versatile, also allow the IRQ to be
> one test SPI (shared interrupt).
> We use the penultimate IRQ of the first SPI group for that purpose.
I don't get the above sentence. What do you mean by group here?
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arm/gic.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arm/gic.c b/arm/gic.c
> index eca9188..c909668 100644
> --- a/arm/gic.c
> +++ b/arm/gic.c
> @@ -23,6 +23,7 @@
>  
>  #define IPI_SENDER	1
>  #define IPI_IRQ		1
> +#define SPI_IRQ		(GIC_FIRST_SPI + 30)
>  
>  struct gic {
>  	struct {
> @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused)
>  
>  	smp_rmb(); /* pairs with wmb in stats_reset */
>  	++acked[smp_processor_id()];
> -	check_ipi_sender(irqstat);
> -	check_irqnr(irqnr, IPI_IRQ);
> +	if (irqnr < GIC_NR_PRIVATE_IRQS) {
> +		check_ipi_sender(irqstat);
> +		check_irqnr(irqnr, IPI_IRQ);
> +	} else {
> +		check_irqnr(irqnr, SPI_IRQ);
I think I would rather have different handlers per test.
I have rebased the ITS series and I use a different LPI handler there.
I think you shouldn't be obliged to hardcode a specific intid in the
handler.

Can't we have
static void setup_irq(handler_t handler)?

Thanks

Eric

> +	}
>  	smp_wmb(); /* pairs with rmb in check_acked */
>  }
>  
> 


WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Andrew Jones <drjones@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: Marc Zyngier <maz@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 05/17] arm: gic: Prepare IRQ handler for handling SPIs
Date: Tue, 12 Nov 2019 21:56:12 +0100	[thread overview]
Message-ID: <76947b00-816b-9363-a9d6-5e4ef92b74c5@redhat.com> (raw)
In-Reply-To: <20191108144240.204202-6-andre.przywara@arm.com>

Hi Andre,

On 11/8/19 3:42 PM, Andre Przywara wrote:
> So far our IRQ handler routine checks that the received IRQ is actually
> the one SGI (IPI) that we are using for our testing.
> 
> To make the IRQ testing routine more versatile, also allow the IRQ to be
> one test SPI (shared interrupt).
> We use the penultimate IRQ of the first SPI group for that purpose.
I don't get the above sentence. What do you mean by group here?
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arm/gic.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arm/gic.c b/arm/gic.c
> index eca9188..c909668 100644
> --- a/arm/gic.c
> +++ b/arm/gic.c
> @@ -23,6 +23,7 @@
>  
>  #define IPI_SENDER	1
>  #define IPI_IRQ		1
> +#define SPI_IRQ		(GIC_FIRST_SPI + 30)
>  
>  struct gic {
>  	struct {
> @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused)
>  
>  	smp_rmb(); /* pairs with wmb in stats_reset */
>  	++acked[smp_processor_id()];
> -	check_ipi_sender(irqstat);
> -	check_irqnr(irqnr, IPI_IRQ);
> +	if (irqnr < GIC_NR_PRIVATE_IRQS) {
> +		check_ipi_sender(irqstat);
> +		check_irqnr(irqnr, IPI_IRQ);
> +	} else {
> +		check_irqnr(irqnr, SPI_IRQ);
I think I would rather have different handlers per test.
I have rebased the ITS series and I use a different LPI handler there.
I think you shouldn't be obliged to hardcode a specific intid in the
handler.

Can't we have
static void setup_irq(handler_t handler)?

Thanks

Eric

> +	}
>  	smp_wmb(); /* pairs with rmb in check_acked */
>  }
>  
> 

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Andrew Jones <drjones@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: Marc Zyngier <maz@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 05/17] arm: gic: Prepare IRQ handler for handling SPIs
Date: Tue, 12 Nov 2019 21:56:12 +0100	[thread overview]
Message-ID: <76947b00-816b-9363-a9d6-5e4ef92b74c5@redhat.com> (raw)
In-Reply-To: <20191108144240.204202-6-andre.przywara@arm.com>

Hi Andre,

On 11/8/19 3:42 PM, Andre Przywara wrote:
> So far our IRQ handler routine checks that the received IRQ is actually
> the one SGI (IPI) that we are using for our testing.
> 
> To make the IRQ testing routine more versatile, also allow the IRQ to be
> one test SPI (shared interrupt).
> We use the penultimate IRQ of the first SPI group for that purpose.
I don't get the above sentence. What do you mean by group here?
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arm/gic.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arm/gic.c b/arm/gic.c
> index eca9188..c909668 100644
> --- a/arm/gic.c
> +++ b/arm/gic.c
> @@ -23,6 +23,7 @@
>  
>  #define IPI_SENDER	1
>  #define IPI_IRQ		1
> +#define SPI_IRQ		(GIC_FIRST_SPI + 30)
>  
>  struct gic {
>  	struct {
> @@ -162,8 +163,12 @@ static void irq_handler(struct pt_regs *regs __unused)
>  
>  	smp_rmb(); /* pairs with wmb in stats_reset */
>  	++acked[smp_processor_id()];
> -	check_ipi_sender(irqstat);
> -	check_irqnr(irqnr, IPI_IRQ);
> +	if (irqnr < GIC_NR_PRIVATE_IRQS) {
> +		check_ipi_sender(irqstat);
> +		check_irqnr(irqnr, IPI_IRQ);
> +	} else {
> +		check_irqnr(irqnr, SPI_IRQ);
I think I would rather have different handlers per test.
I have rebased the ITS series and I use a different LPI handler there.
I think you shouldn't be obliged to hardcode a specific intid in the
handler.

Can't we have
static void setup_irq(handler_t handler)?

Thanks

Eric

> +	}
>  	smp_wmb(); /* pairs with rmb in check_acked */
>  }
>  
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-11-12 20:56 UTC|newest]

Thread overview: 153+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 14:42 [kvm-unit-tests PATCH 00/17] arm: gic: Test SPIs and interrupt groups Andre Przywara
2019-11-08 14:42 ` Andre Przywara
2019-11-08 14:42 ` Andre Przywara
2019-11-08 14:42 ` [kvm-unit-tests PATCH 01/17] arm: gic: Enable GIC MMIO tests for GICv3 as well Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 17:28   ` Alexandru Elisei
2019-11-08 17:28     ` Alexandru Elisei
2019-11-08 17:28     ` Alexandru Elisei
2019-11-12 12:49   ` Auger Eric
2019-11-12 12:49     ` Auger Eric
2019-11-12 12:49     ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 02/17] arm: gic: Generalise function names Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 11:11   ` Alexandru Elisei
2019-11-12 11:11     ` Alexandru Elisei
2019-11-12 11:11     ` Alexandru Elisei
2019-11-12 12:49   ` Auger Eric
2019-11-12 12:49     ` Auger Eric
2019-11-12 12:49     ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 03/17] arm: gic: Provide per-IRQ helper functions Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 12:51   ` Alexandru Elisei
2019-11-12 12:51     ` Alexandru Elisei
2019-11-12 12:51     ` Alexandru Elisei
2019-11-12 15:53     ` Auger Eric
2019-11-12 15:53       ` Auger Eric
2019-11-12 15:53       ` Auger Eric
2019-11-12 16:53       ` Alexandru Elisei
2019-11-12 16:53         ` Alexandru Elisei
2019-11-12 16:53         ` Alexandru Elisei
2019-11-12 13:49   ` Auger Eric
2019-11-12 13:49     ` Auger Eric
2019-11-12 13:49     ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 04/17] arm: gic: Support no IRQs test case Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 13:26   ` Alexandru Elisei
2019-11-12 13:26     ` Alexandru Elisei
2019-11-12 13:26     ` Alexandru Elisei
2019-11-12 21:14     ` Auger Eric
2019-11-12 21:14       ` Auger Eric
2019-11-12 21:14       ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 05/17] arm: gic: Prepare IRQ handler for handling SPIs Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 13:36   ` Alexandru Elisei
2019-11-12 13:36     ` Alexandru Elisei
2019-11-12 13:36     ` Alexandru Elisei
2019-11-12 20:56   ` Auger Eric [this message]
2019-11-12 20:56     ` Auger Eric
2019-11-12 20:56     ` Auger Eric
2019-11-08 14:42 ` [kvm-unit-tests PATCH 06/17] arm: gic: Add simple shared IRQ test Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 13:54   ` Alexandru Elisei
2019-11-12 13:54     ` Alexandru Elisei
2019-11-12 13:54     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 07/17] arm: gic: Extend check_acked() to allow silent call Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 15:23   ` Alexandru Elisei
2019-11-12 15:23     ` Alexandru Elisei
2019-11-12 15:23     ` Alexandru Elisei
2019-11-14 12:32     ` Andrew Jones
2019-11-14 12:32       ` Andrew Jones
2019-11-14 12:32       ` Andrew Jones
2019-11-15 11:32       ` Alexandru Elisei
2019-11-15 11:32         ` Alexandru Elisei
2019-11-15 11:32         ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 08/17] arm: gic: Add simple SPI MP test Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 15:41   ` Alexandru Elisei
2019-11-12 15:41     ` Alexandru Elisei
2019-11-12 15:41     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 09/17] arm: gic: Add test for flipping GICD_CTLR.DS Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 16:42   ` Alexandru Elisei
2019-11-12 16:42     ` Alexandru Elisei
2019-11-12 16:42     ` Alexandru Elisei
2019-11-14 13:39     ` Vladimir Murzin
2019-11-14 13:39       ` Vladimir Murzin
2019-11-14 13:39       ` Vladimir Murzin
2019-11-14 14:17       ` Andre Przywara
2019-11-14 14:17         ` Andre Przywara
2019-11-14 14:17         ` Andre Przywara
2019-11-14 14:50         ` Vladimir Murzin
2019-11-14 14:50           ` Vladimir Murzin
2019-11-14 14:50           ` Vladimir Murzin
2019-11-14 15:21           ` Alexandru Elisei
2019-11-14 15:21             ` Alexandru Elisei
2019-11-14 15:21             ` Alexandru Elisei
2019-11-14 15:27             ` Peter Maydell
2019-11-14 15:27               ` Peter Maydell
2019-11-14 15:27               ` Peter Maydell
2019-11-14 15:47               ` Alexandru Elisei
2019-11-14 15:47                 ` Alexandru Elisei
2019-11-14 15:47                 ` Alexandru Elisei
2019-11-14 15:56                 ` Peter Maydell
2019-11-14 15:56                   ` Peter Maydell
2019-11-14 15:56                   ` Peter Maydell
2019-11-08 14:42 ` [kvm-unit-tests PATCH 10/17] arm: gic: Check for writable IGROUPR registers Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 16:51   ` Alexandru Elisei
2019-11-12 16:51     ` Alexandru Elisei
2019-11-12 16:51     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 11/17] arm: gic: Check for validity of both group enable bits Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 16:58   ` Alexandru Elisei
2019-11-12 16:58     ` Alexandru Elisei
2019-11-12 16:58     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 12/17] arm: gic: Change gic_read_iar() to take group parameter Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 17:19   ` Alexandru Elisei
2019-11-12 17:19     ` Alexandru Elisei
2019-11-12 17:19     ` Alexandru Elisei
2019-11-14 12:50     ` Andrew Jones
2019-11-14 12:50       ` Andrew Jones
2019-11-14 12:50       ` Andrew Jones
2019-11-08 14:42 ` [kvm-unit-tests PATCH 13/17] arm: gic: Change write_eoir() " Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42 ` [kvm-unit-tests PATCH 14/17] arm: gic: Prepare for receiving GIC group 0 interrupts via FIQs Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-12 17:30   ` Alexandru Elisei
2019-11-12 17:30     ` Alexandru Elisei
2019-11-12 17:30     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 15/17] arm: gic: Provide FIQ handler Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-13 10:14   ` Alexandru Elisei
2019-11-13 10:14     ` Alexandru Elisei
2019-11-13 10:14     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 16/17] arm: gic: Prepare interrupt statistics for both groups Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-13 10:44   ` Alexandru Elisei
2019-11-13 10:44     ` Alexandru Elisei
2019-11-13 10:44     ` Alexandru Elisei
2019-11-08 14:42 ` [kvm-unit-tests PATCH 17/17] arm: gic: Test Group0 SPIs Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-08 14:42   ` Andre Przywara
2019-11-13 11:26   ` Alexandru Elisei
2019-11-13 11:26     ` Alexandru Elisei
2019-11-13 11:26     ` Alexandru Elisei

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