From: Marek Vasut <marex@denx.de> To: Hongxing Zhu <hongxing.zhu@nxp.com>, "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org> Cc: Fabio Estevam <festevam@denx.de>, Kishon Vijay Abraham I <kishon@ti.com>, Marcel Ziswiler <marcel.ziswiler@toradex.com>, dl-linux-imx <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>, Vinod Koul <vkoul@kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED Date: Mon, 14 Mar 2022 03:51:22 +0100 [thread overview] Message-ID: <7ebd66d1-0b16-9b6b-ff0a-4901f054217a@denx.de> (raw) In-Reply-To: <AS8PR04MB86766F6033FF0FDAB1E0693B8C0F9@AS8PR04MB8676.eurprd04.prod.outlook.com> On 3/14/22 02:51, Hongxing Zhu wrote: >> -----Original Message----- >> From: Marek Vasut <marex@denx.de> >> Sent: 2022年3月12日 9:38 >> To: linux-phy@lists.infradead.org >> Cc: Marek Vasut <marex@denx.de>; Fabio Estevam <festevam@denx.de>; >> Kishon Vijay Abraham I <kishon@ti.com>; Marcel Ziswiler >> <marcel.ziswiler@toradex.com>; dl-linux-imx <linux-imx@nxp.com>; Peng Fan >> <peng.fan@nxp.com>; Hongxing Zhu <hongxing.zhu@nxp.com>; Shawn Guo >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>; >> linux-arm-kernel@lists.infradead.org >> Subject: [PATCH] phy: freescale: imx8m-pcie: Handle >> IMX8_PCIE_REFCLK_PAD_UNUSED >> >> The 'fsl,refclk-pad-mode' DT property used to select clock source for PCIe PHY >> can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT, >> IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first >> two options are handled correctly by the driver, the last one is not, this patch >> implements support for the last option. >> >> The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input, >> the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC >> internal PLL and output to PCIE_RESREF external IO pin. The last >> IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY clock >> are sourced from SoC internal PLL and not output anywhere. >> >> Signed-off-by: Marek Vasut <marex@denx.de> > Hi Marek: > Thanks for your patch. > I assume that you had tested this IMX8_PCIE_REFCLK_PAD_UNUSED option. Yes > The CLK_N/P pads are not connected on the tested board, right? They are connected from MX8MP SoC to MiniPCIe slot. There is no external clock source like on the EVK, the MX8MP internal PLL is the clock source. > BTW, it's better to add the Fixes tag into the commit log. Do you think this should be considered a bugfix ? -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
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From: Marek Vasut <marex@denx.de> To: Hongxing Zhu <hongxing.zhu@nxp.com>, "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org> Cc: Fabio Estevam <festevam@denx.de>, Kishon Vijay Abraham I <kishon@ti.com>, Marcel Ziswiler <marcel.ziswiler@toradex.com>, dl-linux-imx <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>, Vinod Koul <vkoul@kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED Date: Mon, 14 Mar 2022 03:51:22 +0100 [thread overview] Message-ID: <7ebd66d1-0b16-9b6b-ff0a-4901f054217a@denx.de> (raw) In-Reply-To: <AS8PR04MB86766F6033FF0FDAB1E0693B8C0F9@AS8PR04MB8676.eurprd04.prod.outlook.com> On 3/14/22 02:51, Hongxing Zhu wrote: >> -----Original Message----- >> From: Marek Vasut <marex@denx.de> >> Sent: 2022年3月12日 9:38 >> To: linux-phy@lists.infradead.org >> Cc: Marek Vasut <marex@denx.de>; Fabio Estevam <festevam@denx.de>; >> Kishon Vijay Abraham I <kishon@ti.com>; Marcel Ziswiler >> <marcel.ziswiler@toradex.com>; dl-linux-imx <linux-imx@nxp.com>; Peng Fan >> <peng.fan@nxp.com>; Hongxing Zhu <hongxing.zhu@nxp.com>; Shawn Guo >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>; >> linux-arm-kernel@lists.infradead.org >> Subject: [PATCH] phy: freescale: imx8m-pcie: Handle >> IMX8_PCIE_REFCLK_PAD_UNUSED >> >> The 'fsl,refclk-pad-mode' DT property used to select clock source for PCIe PHY >> can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT, >> IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first >> two options are handled correctly by the driver, the last one is not, this patch >> implements support for the last option. >> >> The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input, >> the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC >> internal PLL and output to PCIE_RESREF external IO pin. The last >> IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY clock >> are sourced from SoC internal PLL and not output anywhere. >> >> Signed-off-by: Marek Vasut <marex@denx.de> > Hi Marek: > Thanks for your patch. > I assume that you had tested this IMX8_PCIE_REFCLK_PAD_UNUSED option. Yes > The CLK_N/P pads are not connected on the tested board, right? They are connected from MX8MP SoC to MiniPCIe slot. There is no external clock source like on the EVK, the MX8MP internal PLL is the clock source. > BTW, it's better to add the Fixes tag into the commit log. Do you think this should be considered a bugfix ? _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-03-14 2:51 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-12 1:38 [PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED Marek Vasut 2022-03-12 1:38 ` Marek Vasut 2022-03-14 1:51 ` Hongxing Zhu 2022-03-14 1:51 ` Hongxing Zhu 2022-03-14 2:51 ` Marek Vasut [this message] 2022-03-14 2:51 ` Marek Vasut 2022-03-14 3:29 ` Hongxing Zhu 2022-03-14 3:29 ` Hongxing Zhu 2022-03-14 10:52 ` Marek Vasut 2022-03-14 10:52 ` Marek Vasut 2022-03-15 0:15 ` Hongxing Zhu 2022-03-15 0:15 ` Hongxing Zhu 2022-04-13 9:36 ` Vinod Koul 2022-04-13 9:36 ` Vinod Koul 2022-04-13 14:08 ` Marek Vasut 2022-04-13 14:08 ` Marek Vasut
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