* [PATCH 9/9] KVM: x86: Disable intercept for Intel processor trace MSRs
@ 2017-10-16 12:14 Luwei Kang
2017-10-17 17:50 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 3+ messages in thread
From: Luwei Kang @ 2017-10-16 12:14 UTC (permalink / raw)
To: kvm
Cc: pbonzini, rkrcmar, tglx, mingo, hpa, x86, linux-kernel,
Chao Peng, Luwei Kang
From: Chao Peng <chao.p.peng@linux.intel.com>
Trap for Intel processor trace is none sense. Pass through to
guest directly.
Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
arch/x86/kvm/vmx.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 3c9ce3e..58606ce 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -7076,6 +7076,20 @@ static __init int hardware_setup(void)
if (pt_mode == PT_MODE_GUEST)
pt_register_virt_ops(&pt_virt_ops);
+ if (pt_mode == PT_MODE_GUEST || pt_mode == PT_MODE_HOST_GUEST) {
+ u32 i, eax, ebx, ecx, edx;
+
+ cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CTL, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_STATUS, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_BASE, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_MASK, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CR3_MATCH, false);
+ for (i = 0; i < (eax & 0x7); i++)
+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_ADDR0_A + i,
+ false);
+ }
+
return alloc_kvm_area();
out:
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 9/9] KVM: x86: Disable intercept for Intel processor trace MSRs
2017-10-16 12:14 [PATCH 9/9] KVM: x86: Disable intercept for Intel processor trace MSRs Luwei Kang
@ 2017-10-17 17:50 ` Konrad Rzeszutek Wilk
2017-10-18 7:15 ` Kang, Luwei
0 siblings, 1 reply; 3+ messages in thread
From: Konrad Rzeszutek Wilk @ 2017-10-17 17:50 UTC (permalink / raw)
To: Luwei Kang, kvm
Cc: pbonzini, rkrcmar, tglx, mingo, hpa, x86, linux-kernel, Chao Peng
On October 16, 2017 8:14:11 AM EDT, Luwei Kang <luwei.kang@intel.com> wrote:
>From: Chao Peng <chao.p.peng@linux.intel.com>
>
>Trap for Intel processor trace is none sense. Pass through to
>guest directly.
And none of those MSRs can be subverted by the guest? That is none of these should be filtered / audited first?
>
>Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
>Signed-off-by: Luwei Kang <luwei.kang@intel.com>
>---
> arch/x86/kvm/vmx.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
>diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>index 3c9ce3e..58606ce 100644
>--- a/arch/x86/kvm/vmx.c
>+++ b/arch/x86/kvm/vmx.c
>@@ -7076,6 +7076,20 @@ static __init int hardware_setup(void)
> if (pt_mode == PT_MODE_GUEST)
> pt_register_virt_ops(&pt_virt_ops);
>
>+ if (pt_mode == PT_MODE_GUEST || pt_mode == PT_MODE_HOST_GUEST) {
>+ u32 i, eax, ebx, ecx, edx;
>+
>+ cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CTL, false);
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_STATUS, false);
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_BASE, false);
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_MASK, false);
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CR3_MATCH, false);
>+ for (i = 0; i < (eax & 0x7); i++)
>+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_ADDR0_A + i,
>+ false);
>+ }
>+
> return alloc_kvm_area();
>
> out:
Thanks!
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH 9/9] KVM: x86: Disable intercept for Intel processor trace MSRs
2017-10-17 17:50 ` Konrad Rzeszutek Wilk
@ 2017-10-18 7:15 ` Kang, Luwei
0 siblings, 0 replies; 3+ messages in thread
From: Kang, Luwei @ 2017-10-18 7:15 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk, kvm
Cc: pbonzini, rkrcmar, tglx, mingo, hpa, x86, linux-kernel, Chao Peng
> On October 16, 2017 8:14:11 AM EDT, Luwei Kang <luwei.kang@intel.com> wrote:
> >From: Chao Peng <chao.p.peng@linux.intel.com>
> >
> >Trap for Intel processor trace is none sense. Pass through to guest
> >directly.
>
>
> And none of those MSRs can be subverted by the guest? That is none of these should be filtered / audited first?
>
Currently, I think it is no necessary. For example, host context(MSRs) would be saved and guest context would be restored before VM-entry in host-guest mode. And IA32_RTIT_CTL will be written with the value of the associated Guest State field of the VMCS on VM entry. I am not very clear what your point. Could you make a specific scenes?
Thanks,
Luwei Kang
>
> >
> >Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
> >Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> >---
> > arch/x86/kvm/vmx.c | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> >diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index
> >3c9ce3e..58606ce 100644
> >--- a/arch/x86/kvm/vmx.c
> >+++ b/arch/x86/kvm/vmx.c
> >@@ -7076,6 +7076,20 @@ static __init int hardware_setup(void)
> > if (pt_mode == PT_MODE_GUEST)
> > pt_register_virt_ops(&pt_virt_ops);
> >
> >+ if (pt_mode == PT_MODE_GUEST || pt_mode == PT_MODE_HOST_GUEST) {
> >+ u32 i, eax, ebx, ecx, edx;
> >+
> >+ cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CTL, false);
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_STATUS, false);
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_BASE, false);
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_MASK, false);
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CR3_MATCH, false);
> >+ for (i = 0; i < (eax & 0x7); i++)
> >+ vmx_disable_intercept_for_msr(MSR_IA32_RTIT_ADDR0_A + i,
> >+ false);
> >+ }
> >+
> > return alloc_kvm_area();
> >
> > out:
>
>
> Thanks!
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-10-18 7:15 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2017-10-16 12:14 [PATCH 9/9] KVM: x86: Disable intercept for Intel processor trace MSRs Luwei Kang
2017-10-17 17:50 ` Konrad Rzeszutek Wilk
2017-10-18 7:15 ` Kang, Luwei
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