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From: "Kang, Luwei" <luwei.kang@intel.com>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
	"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
	"bp@suse.de" <bp@suse.de>, "Liang, Kan" <kan.liang@intel.com>,
	"Janakarajan.Natarajan@amd.com" <Janakarajan.Natarajan@amd.com>,
	"dwmw@amazon.co.uk" <dwmw@amazon.co.uk>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"mathieu.poirier@linaro.org" <mathieu.poirier@linaro.org>,
	"kstewart@linuxfoundation.org" <kstewart@linuxfoundation.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
	"david@redhat.com" <david@redhat.com>,
	"bsd@redhat.com" <bsd@redhat.com>,
	"yu.c.zhang@linux.intel.com" <yu.c.zhang@linux.intel.com>,
	"joro@8bytes.org" <joro@8bytes.org>
Subject: RE: [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write
Date: Fri, 8 Jun 2018 15:16:15 +0000	[thread overview]
Message-ID: <82D7661F83C1A047AF7DC287873BF1E167FF021A@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20180607142201.btdz57ufzlogf25r@um.fi.intel.com>

> > From: Chao Peng <chao.p.peng@linux.intel.com>
> >
> > Disable intercept Intel PT MSRs only when Intel PT is enabled in
> > guest. But MSR_IA32_RTIT_CTL will alway be intercept.
> 
> "I'd like to offer some suggestions as to how to make the commit message
> friendlier for reviewing.
> 
> Generally, for every patch, we want to explain the following: what we want,
> why we want it and how we want to go about getting it. We also would
> prefer to do it in english rather than in C, because for the latter we can just
> look at the code." [1]
> 
> I apologize for quoting myself or if I'm stating the obvious, but it looks
> appropriate here.
> 
> [1] https://marc.info/?l=linux-kernel&m=152233031020263
> 

Thank you very much. My English is not good and lack some experience of how to make description more clearly.
Will improve it.

Thanks,
Luwei Kang

WARNING: multiple messages have this Message-ID (diff)
From: "Kang, Luwei" <luwei.kang@intel.com>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
	"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
	"bp@suse.de" <bp@suse.de>, "Liang, Kan" <kan.liang@intel.com>,
	"Janakarajan.Natarajan@amd.com" <Janakarajan.Natarajan@amd.com>,
	"dwmw@amazon.co.uk" <dwmw@amazon.co.uk>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"mathieu.poirier@linaro.org" <mathieu.poirier@linaro.org>,
	"kstewart@linuxfoundation.org" <kstewart@linuxfoundation.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"pbonzini@redha
Subject: RE: [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write
Date: Fri, 8 Jun 2018 15:16:15 +0000	[thread overview]
Message-ID: <82D7661F83C1A047AF7DC287873BF1E167FF021A@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20180607142201.btdz57ufzlogf25r@um.fi.intel.com>

> > From: Chao Peng <chao.p.peng@linux.intel.com>
> >
> > Disable intercept Intel PT MSRs only when Intel PT is enabled in
> > guest. But MSR_IA32_RTIT_CTL will alway be intercept.
> 
> "I'd like to offer some suggestions as to how to make the commit message
> friendlier for reviewing.
> 
> Generally, for every patch, we want to explain the following: what we want,
> why we want it and how we want to go about getting it. We also would
> prefer to do it in english rather than in C, because for the latter we can just
> look at the code." [1]
> 
> I apologize for quoting myself or if I'm stating the obvious, but it looks
> appropriate here.
> 
> [1] https://marc.info/?l=linux-kernel&m=152233031020263
> 

Thank you very much. My English is not good and lack some experience of how to make description more clearly.
Will improve it.

Thanks,
Luwei Kang

  reply	other threads:[~2018-06-08 15:16 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-22  4:52 [PATCH v9 00/12] Intel Processor Trace virtualization enabling Luwei Kang
2018-05-22  4:52 ` [PATCH v9 01/12] perf/x86/intel/pt: Move Intel-PT MSRs bit definitions to a public header Luwei Kang
2018-06-07  6:50   ` Kang, Luwei
2018-06-07 11:21     ` Paolo Bonzini
2018-05-22  4:52 ` [PATCH v9 02/12] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2018-05-22  4:52 ` [PATCH v9 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs Luwei Kang
2018-06-07 13:33   ` Alexander Shishkin
2018-06-08 14:26     ` Kang, Luwei
2018-06-08 14:26       ` Kang, Luwei
2018-05-22  4:52 ` [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-06-07 13:40   ` Alexander Shishkin
2018-06-07 13:51     ` Peter Zijlstra
2018-06-08 14:37       ` Kang, Luwei
2018-06-08 14:37         ` Kang, Luwei
2018-06-08 14:34     ` Kang, Luwei
2018-06-08 14:34       ` Kang, Luwei
2018-05-22  4:52 ` [PATCH v9 05/12] perf/x86/intel/pt: Introduce a new function to get capability of " Luwei Kang
2018-05-22  4:52 ` [PATCH v9 06/12] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2018-06-07 13:26   ` Alexander Shishkin
2018-06-08 14:19     ` Kang, Luwei
2018-06-08 14:19       ` Kang, Luwei
2018-06-11 11:39     ` Paolo Bonzini
2018-05-22  4:52 ` [PATCH v9 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-05-22  4:52 ` [PATCH v9 08/12] KVM: x86: Add Intel Processor Trace context switch for each vcpu Luwei Kang
2018-05-22  4:52 ` [PATCH v9 09/12] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-06-07 13:56   ` Alexander Shishkin
2018-06-08 14:56     ` Kang, Luwei
2018-06-08 14:56       ` Kang, Luwei
2018-06-11 11:41       ` Paolo Bonzini
2018-06-11 11:41         ` Paolo Bonzini
2018-06-12  1:30         ` Kang, Luwei
2018-06-12  1:30           ` Kang, Luwei
2018-05-22  4:52 ` [PATCH v9 10/12] KVM: x86: Implement Intel Processor Trace MSRs read/write emulation Luwei Kang
2018-06-07 14:12   ` Alexander Shishkin
2018-06-08 15:12     ` Kang, Luwei
2018-06-08 15:12       ` Kang, Luwei
2018-05-22  4:52 ` [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write Luwei Kang
2018-06-07 14:22   ` Alexander Shishkin
2018-06-08 15:16     ` Kang, Luwei [this message]
2018-06-08 15:16       ` Kang, Luwei
2018-05-22  4:52 ` [PATCH v9 12/12] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang

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