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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	<granquet@baylibre.com>
Cc: <airlied@linux.ie>, <chunfeng.yun@mediatek.com>,
	<chunkuang.hu@kernel.org>, <ck.hu@mediatek.com>,
	<daniel@ffwll.ch>, <deller@gmx.de>, <devicetree@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <jitao.shi@mediatek.com>,
	<kishon@ti.com>, <krzysztof.kozlowski+dt@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <matthias.bgg@gmail.com>,
	<mripard@kernel.org>, <msp@baylibre.com>,
	<p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
	<tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support
Date: Mon, 13 Jun 2022 14:05:45 +0800	[thread overview]
Message-ID: <85102b2a8abeac8719ffdb2a1ec1c6463e91ddd7.camel@mediatek.com> (raw)
In-Reply-To: <60d33448-1cc9-c662-167b-10c1f9660545@wanadoo.fr>

On Thu, 2022-06-02 at 07:48 +0200, Christophe JAILLET wrote:
> Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jason-JH.Lin <jason-jh.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > .
> > 
> > Signed-off-by: Markus Schneider-Pargmann <
> > msp-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Guillaume Ranquet <
> > granquet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 126
> > +++++++++++++++++---
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  35 ++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   8 ++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   5 +-
> >   include/linux/soc/mediatek/mtk-mmsys.h      |   4 +-
> >   6 files changed, 159 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index eb969c5c5c2e..763bfb700135 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *dpi_ck_cg;
> >   	struct clk *pixel_clk;
> >   	struct clk *tvd_clk;
> >   	int irq;
> > @@ -126,6 +127,7 @@ struct mtk_dpi_conf {
> >   	const u32 *output_fmts;
> >   	u32 num_output_fmts;
> >   	bool is_ck_de_pol;
> > +	bool is_dpintf;
> >   	bool swap_input_support;
> >   	/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
> > (no shift) */
> >   	u32 dimension_mask;
> > @@ -438,6 +440,8 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > *dpi)
> >   	mtk_dpi_disable(dpi);
> >   	clk_disable_unprepare(dpi->pixel_clk);
> >   	clk_disable_unprepare(dpi->engine_clk);
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +	clk_disable_unprepare(dpi->tvd_clk);
> >   }
> >   
> >   static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > @@ -447,12 +451,24 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	if (++dpi->refcount != 1)
> >   		return 0;
> >   
> 
> Hi,
> 
> belwo the error handling path looks odd. (both where we goto, and
> the 
> order of the clk_disable_unprepare() in the error handling path.
> 
> just my 2c,
> 
> CJ
> 

Hello Christophe,

Thanks for your review.
I will fix this order in enxt version.

Thanks

BRs,
Bo-Chen

> > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > ret);
> > +		goto err_pixel;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->engine_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable engine clock:
> > %d\n", ret);
> >   		goto err_refcount;
> >   	}
> >   
> > +	ret = clk_prepare_enable(dpi->dpi_ck_cg);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable dpi_ck_cg clock:
> > %d\n", ret);
> > +		goto err_ck_cg;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->pixel_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n",
> > ret);
> > @@ -466,6 +482,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	return 0;
> >   
> >   err_pixel:
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +err_ck_cg:
> >   	clk_disable_unprepare(dpi->engine_clk);
> >   err_refcount:
> >   	dpi->refcount--;
> 
> [...]
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	<granquet@baylibre.com>
Cc: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org,
	airlied@linux.ie, dri-devel@lists.freedesktop.org,
	krzysztof.kozlowski+dt@linaro.org, linux-phy@lists.infradead.org,
	deller@gmx.de, kishon@ti.com, chunkuang.hu@kernel.org,
	jitao.shi@mediatek.com, msp@baylibre.com,
	chunfeng.yun@mediatek.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org, tzimmermann@suse.de,
	linux-kernel@vger.kernel.org, vkoul@kernel.org
Subject: Re: [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support
Date: Mon, 13 Jun 2022 14:05:45 +0800	[thread overview]
Message-ID: <85102b2a8abeac8719ffdb2a1ec1c6463e91ddd7.camel@mediatek.com> (raw)
In-Reply-To: <60d33448-1cc9-c662-167b-10c1f9660545@wanadoo.fr>

On Thu, 2022-06-02 at 07:48 +0200, Christophe JAILLET wrote:
> Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jason-JH.Lin <jason-jh.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > .
> > 
> > Signed-off-by: Markus Schneider-Pargmann <
> > msp-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Guillaume Ranquet <
> > granquet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 126
> > +++++++++++++++++---
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  35 ++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   8 ++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   5 +-
> >   include/linux/soc/mediatek/mtk-mmsys.h      |   4 +-
> >   6 files changed, 159 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index eb969c5c5c2e..763bfb700135 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *dpi_ck_cg;
> >   	struct clk *pixel_clk;
> >   	struct clk *tvd_clk;
> >   	int irq;
> > @@ -126,6 +127,7 @@ struct mtk_dpi_conf {
> >   	const u32 *output_fmts;
> >   	u32 num_output_fmts;
> >   	bool is_ck_de_pol;
> > +	bool is_dpintf;
> >   	bool swap_input_support;
> >   	/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
> > (no shift) */
> >   	u32 dimension_mask;
> > @@ -438,6 +440,8 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > *dpi)
> >   	mtk_dpi_disable(dpi);
> >   	clk_disable_unprepare(dpi->pixel_clk);
> >   	clk_disable_unprepare(dpi->engine_clk);
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +	clk_disable_unprepare(dpi->tvd_clk);
> >   }
> >   
> >   static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > @@ -447,12 +451,24 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	if (++dpi->refcount != 1)
> >   		return 0;
> >   
> 
> Hi,
> 
> belwo the error handling path looks odd. (both where we goto, and
> the 
> order of the clk_disable_unprepare() in the error handling path.
> 
> just my 2c,
> 
> CJ
> 

Hello Christophe,

Thanks for your review.
I will fix this order in enxt version.

Thanks

BRs,
Bo-Chen

> > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > ret);
> > +		goto err_pixel;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->engine_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable engine clock:
> > %d\n", ret);
> >   		goto err_refcount;
> >   	}
> >   
> > +	ret = clk_prepare_enable(dpi->dpi_ck_cg);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable dpi_ck_cg clock:
> > %d\n", ret);
> > +		goto err_ck_cg;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->pixel_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n",
> > ret);
> > @@ -466,6 +482,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	return 0;
> >   
> >   err_pixel:
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +err_ck_cg:
> >   	clk_disable_unprepare(dpi->engine_clk);
> >   err_refcount:
> >   	dpi->refcount--;
> 
> [...]
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	<granquet@baylibre.com>
Cc: <airlied@linux.ie>, <chunfeng.yun@mediatek.com>,
	<chunkuang.hu@kernel.org>, <ck.hu@mediatek.com>,
	<daniel@ffwll.ch>, <deller@gmx.de>, <devicetree@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <jitao.shi@mediatek.com>,
	<kishon@ti.com>, <krzysztof.kozlowski+dt@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <matthias.bgg@gmail.com>,
	<mripard@kernel.org>, <msp@baylibre.com>,
	<p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
	<tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support
Date: Mon, 13 Jun 2022 14:05:45 +0800	[thread overview]
Message-ID: <85102b2a8abeac8719ffdb2a1ec1c6463e91ddd7.camel@mediatek.com> (raw)
In-Reply-To: <60d33448-1cc9-c662-167b-10c1f9660545@wanadoo.fr>

On Thu, 2022-06-02 at 07:48 +0200, Christophe JAILLET wrote:
> Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jason-JH.Lin <jason-jh.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > .
> > 
> > Signed-off-by: Markus Schneider-Pargmann <
> > msp-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Guillaume Ranquet <
> > granquet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 126
> > +++++++++++++++++---
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  35 ++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   8 ++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   5 +-
> >   include/linux/soc/mediatek/mtk-mmsys.h      |   4 +-
> >   6 files changed, 159 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index eb969c5c5c2e..763bfb700135 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *dpi_ck_cg;
> >   	struct clk *pixel_clk;
> >   	struct clk *tvd_clk;
> >   	int irq;
> > @@ -126,6 +127,7 @@ struct mtk_dpi_conf {
> >   	const u32 *output_fmts;
> >   	u32 num_output_fmts;
> >   	bool is_ck_de_pol;
> > +	bool is_dpintf;
> >   	bool swap_input_support;
> >   	/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
> > (no shift) */
> >   	u32 dimension_mask;
> > @@ -438,6 +440,8 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > *dpi)
> >   	mtk_dpi_disable(dpi);
> >   	clk_disable_unprepare(dpi->pixel_clk);
> >   	clk_disable_unprepare(dpi->engine_clk);
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +	clk_disable_unprepare(dpi->tvd_clk);
> >   }
> >   
> >   static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > @@ -447,12 +451,24 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	if (++dpi->refcount != 1)
> >   		return 0;
> >   
> 
> Hi,
> 
> belwo the error handling path looks odd. (both where we goto, and
> the 
> order of the clk_disable_unprepare() in the error handling path.
> 
> just my 2c,
> 
> CJ
> 

Hello Christophe,

Thanks for your review.
I will fix this order in enxt version.

Thanks

BRs,
Bo-Chen

> > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > ret);
> > +		goto err_pixel;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->engine_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable engine clock:
> > %d\n", ret);
> >   		goto err_refcount;
> >   	}
> >   
> > +	ret = clk_prepare_enable(dpi->dpi_ck_cg);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable dpi_ck_cg clock:
> > %d\n", ret);
> > +		goto err_ck_cg;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->pixel_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n",
> > ret);
> > @@ -466,6 +482,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	return 0;
> >   
> >   err_pixel:
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +err_ck_cg:
> >   	clk_disable_unprepare(dpi->engine_clk);
> >   err_refcount:
> >   	dpi->refcount--;
> 
> [...]
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


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WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	<granquet@baylibre.com>
Cc: <airlied@linux.ie>, <chunfeng.yun@mediatek.com>,
	<chunkuang.hu@kernel.org>, <ck.hu@mediatek.com>,
	<daniel@ffwll.ch>, <deller@gmx.de>, <devicetree@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <jitao.shi@mediatek.com>,
	<kishon@ti.com>, <krzysztof.kozlowski+dt@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <matthias.bgg@gmail.com>,
	<mripard@kernel.org>, <msp@baylibre.com>,
	<p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
	<tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support
Date: Mon, 13 Jun 2022 14:05:45 +0800	[thread overview]
Message-ID: <85102b2a8abeac8719ffdb2a1ec1c6463e91ddd7.camel@mediatek.com> (raw)
In-Reply-To: <60d33448-1cc9-c662-167b-10c1f9660545@wanadoo.fr>

On Thu, 2022-06-02 at 07:48 +0200, Christophe JAILLET wrote:
> Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jason-JH.Lin <jason-jh.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > .
> > 
> > Signed-off-by: Markus Schneider-Pargmann <
> > msp-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Guillaume Ranquet <
> > granquet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 126
> > +++++++++++++++++---
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  35 ++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   8 ++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   5 +-
> >   include/linux/soc/mediatek/mtk-mmsys.h      |   4 +-
> >   6 files changed, 159 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index eb969c5c5c2e..763bfb700135 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *dpi_ck_cg;
> >   	struct clk *pixel_clk;
> >   	struct clk *tvd_clk;
> >   	int irq;
> > @@ -126,6 +127,7 @@ struct mtk_dpi_conf {
> >   	const u32 *output_fmts;
> >   	u32 num_output_fmts;
> >   	bool is_ck_de_pol;
> > +	bool is_dpintf;
> >   	bool swap_input_support;
> >   	/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
> > (no shift) */
> >   	u32 dimension_mask;
> > @@ -438,6 +440,8 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > *dpi)
> >   	mtk_dpi_disable(dpi);
> >   	clk_disable_unprepare(dpi->pixel_clk);
> >   	clk_disable_unprepare(dpi->engine_clk);
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +	clk_disable_unprepare(dpi->tvd_clk);
> >   }
> >   
> >   static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > @@ -447,12 +451,24 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	if (++dpi->refcount != 1)
> >   		return 0;
> >   
> 
> Hi,
> 
> belwo the error handling path looks odd. (both where we goto, and
> the 
> order of the clk_disable_unprepare() in the error handling path.
> 
> just my 2c,
> 
> CJ
> 

Hello Christophe,

Thanks for your review.
I will fix this order in enxt version.

Thanks

BRs,
Bo-Chen

> > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > ret);
> > +		goto err_pixel;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->engine_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable engine clock:
> > %d\n", ret);
> >   		goto err_refcount;
> >   	}
> >   
> > +	ret = clk_prepare_enable(dpi->dpi_ck_cg);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable dpi_ck_cg clock:
> > %d\n", ret);
> > +		goto err_ck_cg;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->pixel_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n",
> > ret);
> > @@ -466,6 +482,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	return 0;
> >   
> >   err_pixel:
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +err_ck_cg:
> >   	clk_disable_unprepare(dpi->engine_clk);
> >   err_refcount:
> >   	dpi->refcount--;
> 
> [...]
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


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WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	<granquet@baylibre.com>
Cc: <airlied@linux.ie>, <chunfeng.yun@mediatek.com>,
	<chunkuang.hu@kernel.org>, <ck.hu@mediatek.com>,
	<daniel@ffwll.ch>, <deller@gmx.de>, <devicetree@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <jitao.shi@mediatek.com>,
	<kishon@ti.com>, <krzysztof.kozlowski+dt@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <matthias.bgg@gmail.com>,
	<mripard@kernel.org>, <msp@baylibre.com>,
	<p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
	<tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support
Date: Mon, 13 Jun 2022 14:05:45 +0800	[thread overview]
Message-ID: <85102b2a8abeac8719ffdb2a1ec1c6463e91ddd7.camel@mediatek.com> (raw)
In-Reply-To: <60d33448-1cc9-c662-167b-10c1f9660545@wanadoo.fr>

On Thu, 2022-06-02 at 07:48 +0200, Christophe JAILLET wrote:
> Le 23/05/2022 à 12:47, Guillaume Ranquet a écrit :
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jason-JH.Lin <jason-jh.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > .
> > 
> > Signed-off-by: Markus Schneider-Pargmann <
> > msp-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Guillaume Ranquet <
> > granquet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 126
> > +++++++++++++++++---
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  35 ++++++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   8 ++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   5 +-
> >   include/linux/soc/mediatek/mtk-mmsys.h      |   4 +-
> >   6 files changed, 159 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index eb969c5c5c2e..763bfb700135 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *dpi_ck_cg;
> >   	struct clk *pixel_clk;
> >   	struct clk *tvd_clk;
> >   	int irq;
> > @@ -126,6 +127,7 @@ struct mtk_dpi_conf {
> >   	const u32 *output_fmts;
> >   	u32 num_output_fmts;
> >   	bool is_ck_de_pol;
> > +	bool is_dpintf;
> >   	bool swap_input_support;
> >   	/* Mask used for HWIDTH, HPORCH, VSYNC_WIDTH and VSYNC_PORCH
> > (no shift) */
> >   	u32 dimension_mask;
> > @@ -438,6 +440,8 @@ static void mtk_dpi_power_off(struct mtk_dpi
> > *dpi)
> >   	mtk_dpi_disable(dpi);
> >   	clk_disable_unprepare(dpi->pixel_clk);
> >   	clk_disable_unprepare(dpi->engine_clk);
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +	clk_disable_unprepare(dpi->tvd_clk);
> >   }
> >   
> >   static int mtk_dpi_power_on(struct mtk_dpi *dpi)
> > @@ -447,12 +451,24 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	if (++dpi->refcount != 1)
> >   		return 0;
> >   
> 
> Hi,
> 
> belwo the error handling path looks odd. (both where we goto, and
> the 
> order of the clk_disable_unprepare() in the error handling path.
> 
> just my 2c,
> 
> CJ
> 

Hello Christophe,

Thanks for your review.
I will fix this order in enxt version.

Thanks

BRs,
Bo-Chen

> > +	ret = clk_prepare_enable(dpi->tvd_clk);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable tvd pll: %d\n",
> > ret);
> > +		goto err_pixel;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->engine_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable engine clock:
> > %d\n", ret);
> >   		goto err_refcount;
> >   	}
> >   
> > +	ret = clk_prepare_enable(dpi->dpi_ck_cg);
> > +	if (ret) {
> > +		dev_err(dpi->dev, "Failed to enable dpi_ck_cg clock:
> > %d\n", ret);
> > +		goto err_ck_cg;
> > +	}
> > +
> >   	ret = clk_prepare_enable(dpi->pixel_clk);
> >   	if (ret) {
> >   		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n",
> > ret);
> > @@ -466,6 +482,8 @@ static int mtk_dpi_power_on(struct mtk_dpi
> > *dpi)
> >   	return 0;
> >   
> >   err_pixel:
> > +	clk_disable_unprepare(dpi->dpi_ck_cg);
> > +err_ck_cg:
> >   	clk_disable_unprepare(dpi->engine_clk);
> >   err_refcount:
> >   	dpi->refcount--;
> 
> [...]
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


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  reply	other threads:[~2022-06-13  6:06 UTC|newest]

Thread overview: 450+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-23 10:47 [PATCH v10 00/21] drm/mediatek: Add mt8195 DisplayPort driver Guillaume Ranquet
2022-05-23 10:47 ` Guillaume Ranquet
2022-05-23 10:47 ` Guillaume Ranquet
2022-05-23 10:47 ` Guillaume Ranquet
2022-05-23 10:47 ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 01/21] dt-bindings: mediatek,dpi: Add DPINTF compatible Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 12:33   ` Rob Herring
2022-05-23 12:33     ` [PATCH v10 01/21] dt-bindings: mediatek, dpi: " Rob Herring
2022-05-23 12:33     ` Rob Herring
2022-05-23 12:33     ` Rob Herring
2022-05-23 12:33     ` Rob Herring
2022-05-24  3:29   ` [PATCH v10 01/21] dt-bindings: mediatek,dpi: " Chunfeng Yun
2022-05-24  3:29     ` Chunfeng Yun
2022-05-24  3:29     ` Chunfeng Yun
2022-05-24  3:29     ` Chunfeng Yun
2022-05-24  3:29     ` Chunfeng Yun
2022-05-25 11:55   ` AngeloGioacchino Del Regno
2022-05-25 11:55     ` AngeloGioacchino Del Regno
2022-05-25 11:55     ` AngeloGioacchino Del Regno
2022-05-25 11:55     ` AngeloGioacchino Del Regno
2022-05-25 11:55     ` AngeloGioacchino Del Regno
2022-06-07  2:31     ` Rex-BC Chen
2022-06-07  2:31       ` Rex-BC Chen
2022-06-07  2:31       ` Rex-BC Chen
2022-06-07  2:31       ` Rex-BC Chen
2022-06-07  2:31       ` Rex-BC Chen
2022-05-25 12:49   ` Maxime Ripard
2022-05-25 12:49     ` Maxime Ripard
2022-05-25 12:49     ` Maxime Ripard
2022-05-25 12:49     ` Maxime Ripard
2022-05-25 12:49     ` Maxime Ripard
2022-06-07  2:35     ` Rex-BC Chen
2022-06-07  2:35       ` Rex-BC Chen
2022-06-07  2:35       ` Rex-BC Chen
2022-06-07  2:35       ` Rex-BC Chen
2022-06-07  2:35       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 02/21] dt-bindings: mediatek,dp: Add Display Port binding Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-24  3:35   ` Chunfeng Yun
2022-05-24  3:35     ` Chunfeng Yun
2022-05-24  3:35     ` Chunfeng Yun
2022-05-24  3:35     ` Chunfeng Yun
2022-05-24  3:35     ` Chunfeng Yun
2022-06-10  2:27     ` Rex-BC Chen
2022-06-10  2:27       ` Rex-BC Chen
2022-06-10  2:27       ` Rex-BC Chen
2022-06-10  2:27       ` Rex-BC Chen
2022-06-10  2:27       ` Rex-BC Chen
2022-05-25 15:30   ` AngeloGioacchino Del Regno
2022-05-25 15:30     ` AngeloGioacchino Del Regno
2022-05-25 15:30     ` AngeloGioacchino Del Regno
2022-05-25 15:30     ` AngeloGioacchino Del Regno
2022-05-25 15:30     ` AngeloGioacchino Del Regno
2022-06-10  2:29     ` Rex-BC Chen
2022-06-10  2:29       ` Rex-BC Chen
2022-06-10  2:29       ` Rex-BC Chen
2022-06-10  2:29       ` Rex-BC Chen
2022-06-10  2:29       ` Rex-BC Chen
2022-06-02 13:20   ` Rob Herring
2022-06-02 13:20     ` Rob Herring
2022-06-02 13:20     ` Rob Herring
2022-06-02 13:20     ` Rob Herring
2022-06-02 13:20     ` Rob Herring
2022-05-23 10:47 ` [PATCH v10 03/21] drm/edid: Convert cea_sad helper struct to kernelDoc Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:57   ` Matthias Brugger
2022-05-23 10:57     ` Matthias Brugger
2022-05-23 10:57     ` Matthias Brugger
2022-05-23 10:57     ` Matthias Brugger
2022-05-23 10:57     ` Matthias Brugger
2022-06-07  2:44     ` Rex-BC Chen
2022-06-07  2:44       ` Rex-BC Chen
2022-06-07  2:44       ` Rex-BC Chen
2022-06-07  2:44       ` Rex-BC Chen
2022-06-07  2:44       ` Rex-BC Chen
2022-05-25 12:01   ` AngeloGioacchino Del Regno
2022-05-25 12:01     ` AngeloGioacchino Del Regno
2022-05-25 12:01     ` AngeloGioacchino Del Regno
2022-05-25 12:01     ` AngeloGioacchino Del Regno
2022-05-25 12:01     ` AngeloGioacchino Del Regno
2022-06-07  2:45     ` Rex-BC Chen
2022-06-07  2:45       ` Rex-BC Chen
2022-06-07  2:45       ` Rex-BC Chen
2022-06-07  2:45       ` Rex-BC Chen
2022-06-07  2:45       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 04/21] drm/edid: Add cea_sad helpers for freq/length Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-25 12:26   ` AngeloGioacchino Del Regno
2022-05-25 12:26     ` AngeloGioacchino Del Regno
2022-05-25 12:26     ` AngeloGioacchino Del Regno
2022-05-25 12:26     ` AngeloGioacchino Del Regno
2022-05-25 12:26     ` AngeloGioacchino Del Regno
2022-06-10  6:50     ` Rex-BC Chen
2022-06-10  6:50       ` Rex-BC Chen
2022-06-10  6:50       ` Rex-BC Chen
2022-06-10  6:50       ` Rex-BC Chen
2022-06-10  6:50       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 05/21] video/hdmi: Add audio_infoframe packing for DP Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-25 12:32   ` AngeloGioacchino Del Regno
2022-05-25 12:32     ` AngeloGioacchino Del Regno
2022-05-25 12:32     ` AngeloGioacchino Del Regno
2022-05-25 12:32     ` AngeloGioacchino Del Regno
2022-05-25 12:32     ` AngeloGioacchino Del Regno
2022-06-07  3:10     ` Rex-BC Chen
2022-06-07  3:10       ` Rex-BC Chen
2022-06-07  3:10       ` Rex-BC Chen
2022-06-07  3:10       ` Rex-BC Chen
2022-06-07  3:10       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 06/21] drm/mediatek: dpi: move dpi limits to SoC config Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 07/21] drm/mediatek: dpi: implement a CK/DE pol toggle in " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  7:44   ` CK Hu
2022-05-30  7:44     ` CK Hu
2022-05-30  7:44     ` CK Hu
2022-05-30  7:44     ` CK Hu
2022-05-30  7:44     ` CK Hu
2022-06-07  2:54     ` Rex-BC Chen
2022-06-07  2:54       ` Rex-BC Chen
2022-06-07  2:54       ` Rex-BC Chen
2022-06-07  2:54       ` Rex-BC Chen
2022-06-07  2:54       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 08/21] drm/mediatek: dpi: implement a swap_input " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  7:50   ` CK Hu
2022-05-30  7:50     ` CK Hu
2022-05-30  7:50     ` CK Hu
2022-05-30  7:50     ` CK Hu
2022-05-30  7:50     ` CK Hu
2022-06-13  3:12     ` Rex-BC Chen
2022-06-13  3:12       ` Rex-BC Chen
2022-06-13  3:12       ` Rex-BC Chen
2022-06-13  3:12       ` Rex-BC Chen
2022-06-13  3:12       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 09/21] drm/mediatek: dpi: move dimension mask to " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  7:55   ` CK Hu
2022-05-30  7:55     ` CK Hu
2022-05-30  7:55     ` CK Hu
2022-05-30  7:55     ` CK Hu
2022-05-30  7:55     ` CK Hu
2022-05-23 10:47 ` [PATCH v10 10/21] drm/mediatek: dpi: move hvsize_mask " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  8:21   ` CK Hu
2022-05-30  8:21     ` CK Hu
2022-05-30  8:21     ` CK Hu
2022-05-30  8:21     ` CK Hu
2022-05-30  8:21     ` CK Hu
2022-05-23 10:47 ` [PATCH v10 11/21] drm/mediatek: dpi: move swap_shift " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  8:38   ` CK Hu
2022-05-30  8:38     ` CK Hu
2022-05-30  8:38     ` CK Hu
2022-05-30  8:38     ` CK Hu
2022-05-30  8:38     ` CK Hu
2022-06-02 11:38     ` Rex-BC Chen
2022-06-02 11:38       ` Rex-BC Chen
2022-06-02 11:38       ` Rex-BC Chen
2022-06-02 11:38       ` Rex-BC Chen
2022-06-02 11:38       ` Rex-BC Chen
2022-06-02 12:19     ` Rex-BC Chen
2022-06-02 12:19       ` Rex-BC Chen
2022-06-02 12:19       ` Rex-BC Chen
2022-06-02 12:19       ` Rex-BC Chen
2022-06-02 12:19       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 12/21] drm/mediatek: dpi: move the yuv422_en_bit " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-30  8:47   ` CK Hu
2022-05-30  8:47     ` CK Hu
2022-05-30  8:47     ` CK Hu
2022-05-30  8:47     ` CK Hu
2022-05-30  8:47     ` CK Hu
2022-05-23 10:47 ` [PATCH v10 13/21] drm/mediatek: dpi: move the csc_enable bit " Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 14/21] drm/mediatek: dpi: Add dpintf support Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-25 12:58   ` AngeloGioacchino Del Regno
2022-05-25 12:58     ` AngeloGioacchino Del Regno
2022-05-25 12:58     ` AngeloGioacchino Del Regno
2022-05-25 12:58     ` AngeloGioacchino Del Regno
2022-05-25 12:58     ` AngeloGioacchino Del Regno
2022-06-13  6:10     ` Rex-BC Chen
2022-06-13  6:10       ` Rex-BC Chen
2022-06-13  6:10       ` Rex-BC Chen
2022-06-13  6:10       ` Rex-BC Chen
2022-06-13  6:10       ` Rex-BC Chen
2022-06-02  5:48   ` Christophe JAILLET
2022-06-02  5:48     ` Christophe JAILLET
2022-06-02  5:48     ` Christophe JAILLET
2022-06-02  5:48     ` Christophe JAILLET
2022-06-02  5:48     ` Christophe JAILLET
2022-06-13  6:05     ` Rex-BC Chen [this message]
2022-06-13  6:05       ` Rex-BC Chen
2022-06-13  6:05       ` Rex-BC Chen
2022-06-13  6:05       ` Rex-BC Chen
2022-06-13  6:05       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 15/21] drm/mediatek: dpi: Only enable dpi after the bridge is enabled Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 16/21] drm/meditek: dpi: Add matrix_sel helper Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 17/21] phy: phy-mtk-dp: Add driver for DP phy Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-06-08 16:31   ` Vinod Koul
2022-06-08 16:31     ` Vinod Koul
2022-06-08 16:31     ` Vinod Koul
2022-06-08 16:31     ` Vinod Koul
2022-06-08 16:31     ` Vinod Koul
2022-05-23 10:47 ` [PATCH v10 18/21] drm/mediatek: Add mt8195 Embedded DisplayPort driver Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-25  5:47   ` CK Hu
2022-05-25  5:47     ` CK Hu
2022-05-25  5:47     ` CK Hu
2022-05-25  5:47     ` CK Hu
2022-05-25  5:47     ` CK Hu
2022-05-30  9:34   ` CK Hu
2022-05-30  9:34     ` CK Hu
2022-05-30  9:34     ` CK Hu
2022-05-30  9:34     ` CK Hu
2022-05-30  9:34     ` CK Hu
2022-05-30 10:08   ` CK Hu
2022-05-30 10:08     ` CK Hu
2022-05-30 10:08     ` CK Hu
2022-05-30 10:08     ` CK Hu
2022-05-30 10:08     ` CK Hu
2022-06-07  6:21   ` CK Hu
2022-06-07  6:21     ` CK Hu
2022-06-07  6:21     ` CK Hu
2022-06-07  6:21     ` CK Hu
2022-06-07  6:21     ` CK Hu
2022-06-07 12:24     ` Rex-BC Chen
2022-06-07 12:24       ` Rex-BC Chen
2022-06-07 12:24       ` Rex-BC Chen
2022-06-07 12:24       ` Rex-BC Chen
2022-06-07 12:24       ` Rex-BC Chen
2022-06-08  2:23       ` CK Hu
2022-06-08  2:23         ` CK Hu
2022-06-08  2:23         ` CK Hu
2022-06-08  2:23         ` CK Hu
2022-06-08  2:23         ` CK Hu
2022-06-08  8:43         ` Rex-BC Chen
2022-06-08  8:43           ` Rex-BC Chen
2022-06-08  8:43           ` Rex-BC Chen
2022-06-08  8:43           ` Rex-BC Chen
2022-06-08  8:43           ` Rex-BC Chen
2022-06-08  9:15           ` CK Hu
2022-06-08  9:15             ` CK Hu
2022-06-08  9:15             ` CK Hu
2022-06-08  9:15             ` CK Hu
2022-06-08  9:15             ` CK Hu
2022-06-08 11:52             ` Rex-BC Chen
2022-06-08 11:52               ` Rex-BC Chen
2022-06-08 11:52               ` Rex-BC Chen
2022-06-08 11:52               ` Rex-BC Chen
2022-06-08 11:52               ` Rex-BC Chen
2022-06-07  6:44   ` CK Hu
2022-06-07  6:44     ` CK Hu
2022-06-07  6:44     ` CK Hu
2022-06-07  6:44     ` CK Hu
2022-06-07  6:44     ` CK Hu
2022-06-07 12:44     ` Rex-BC Chen
2022-06-07 12:44       ` Rex-BC Chen
2022-06-07 12:44       ` Rex-BC Chen
2022-06-07 12:44       ` Rex-BC Chen
2022-06-07 12:44       ` Rex-BC Chen
2022-06-08  2:44       ` CK Hu
2022-06-08  2:44         ` CK Hu
2022-06-08  2:44         ` CK Hu
2022-06-08  2:44         ` CK Hu
2022-06-08  2:44         ` CK Hu
2022-06-08 12:54         ` Rex-BC Chen
2022-06-08 12:54           ` Rex-BC Chen
2022-06-08 12:54           ` Rex-BC Chen
2022-06-08 12:54           ` Rex-BC Chen
2022-06-08 12:54           ` Rex-BC Chen
2022-06-07  7:30   ` CK Hu
2022-06-07  7:30     ` CK Hu
2022-06-07  7:30     ` CK Hu
2022-06-07  7:30     ` CK Hu
2022-06-07  7:30     ` CK Hu
2022-06-07 12:46     ` Rex-BC Chen
2022-06-07 12:46       ` Rex-BC Chen
2022-06-07 12:46       ` Rex-BC Chen
2022-06-07 12:46       ` Rex-BC Chen
2022-06-07 12:46       ` Rex-BC Chen
2022-06-07  7:47   ` CK Hu
2022-06-07  7:47     ` CK Hu
2022-06-07  7:47     ` CK Hu
2022-06-07  7:47     ` CK Hu
2022-06-07  7:47     ` CK Hu
2022-06-08 10:26     ` Rex-BC Chen
2022-06-08 10:26       ` Rex-BC Chen
2022-06-08 10:26       ` Rex-BC Chen
2022-06-08 10:26       ` Rex-BC Chen
2022-06-08 10:26       ` Rex-BC Chen
2022-06-09  2:30       ` CK Hu
2022-06-09  2:30         ` CK Hu
2022-06-09  2:30         ` CK Hu
2022-06-09  2:30         ` CK Hu
2022-06-09  2:30         ` CK Hu
2022-06-09  7:24         ` Rex-BC Chen
2022-06-09  7:24           ` Rex-BC Chen
2022-06-09  7:24           ` Rex-BC Chen
2022-06-09  7:24           ` Rex-BC Chen
2022-06-09  7:24           ` Rex-BC Chen
2022-06-07  8:01   ` CK Hu
2022-06-07  8:01     ` CK Hu
2022-06-07  8:01     ` CK Hu
2022-06-07  8:01     ` CK Hu
2022-06-07  8:01     ` CK Hu
2022-06-09  7:18     ` Rex-BC Chen
2022-06-09  7:18       ` Rex-BC Chen
2022-06-09  7:18       ` Rex-BC Chen
2022-06-09  7:18       ` Rex-BC Chen
2022-06-09  7:18       ` Rex-BC Chen
2022-06-07  8:12   ` CK Hu
2022-06-07  8:12     ` CK Hu
2022-06-07  8:12     ` CK Hu
2022-06-07  8:12     ` CK Hu
2022-06-07  8:12     ` CK Hu
2022-06-07 12:55     ` Rex-BC Chen
2022-06-07 12:55       ` Rex-BC Chen
2022-06-07 12:55       ` Rex-BC Chen
2022-06-07 12:55       ` Rex-BC Chen
2022-06-07 12:55       ` Rex-BC Chen
2022-06-07  9:04   ` CK Hu
2022-06-07  9:04     ` CK Hu
2022-06-07  9:04     ` CK Hu
2022-06-07  9:04     ` CK Hu
2022-06-07  9:04     ` CK Hu
2022-06-09  8:00     ` Rex-BC Chen
2022-06-09  8:00       ` Rex-BC Chen
2022-06-09  8:00       ` Rex-BC Chen
2022-06-09  8:00       ` Rex-BC Chen
2022-06-09  8:00       ` Rex-BC Chen
2022-06-08  8:30   ` CK Hu
2022-06-08  8:30     ` CK Hu
2022-06-08  8:30     ` CK Hu
2022-06-08  8:30     ` CK Hu
2022-06-08  8:30     ` CK Hu
2022-06-09  8:03     ` Rex-BC Chen
2022-06-09  8:03       ` Rex-BC Chen
2022-06-09  8:03       ` Rex-BC Chen
2022-06-09  8:03       ` Rex-BC Chen
2022-06-09  8:03       ` Rex-BC Chen
2022-06-08  8:45   ` CK Hu
2022-06-08  8:45     ` CK Hu
2022-06-08  8:45     ` CK Hu
2022-06-08  8:45     ` CK Hu
2022-06-08  8:45     ` CK Hu
2022-06-08  8:54     ` Rex-BC Chen
2022-06-08  8:54       ` Rex-BC Chen
2022-06-08  8:54       ` Rex-BC Chen
2022-06-08  8:54       ` Rex-BC Chen
2022-06-08  8:54       ` Rex-BC Chen
2022-06-09  9:37   ` CK Hu
2022-06-09  9:37     ` CK Hu
2022-06-09  9:37     ` CK Hu
2022-06-09  9:37     ` CK Hu
2022-06-09  9:37     ` CK Hu
2022-06-10  2:10     ` Rex-BC Chen
2022-06-10  2:10       ` Rex-BC Chen
2022-06-10  2:10       ` Rex-BC Chen
2022-06-10  2:10       ` Rex-BC Chen
2022-06-10  2:10       ` Rex-BC Chen
2022-05-23 10:47 ` [PATCH v10 19/21] drm/mediatek: Add mt8195 External DisplayPort support Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-25 13:04   ` AngeloGioacchino Del Regno
2022-05-25 13:04     ` AngeloGioacchino Del Regno
2022-05-25 13:04     ` AngeloGioacchino Del Regno
2022-05-25 13:04     ` AngeloGioacchino Del Regno
2022-05-25 13:04     ` AngeloGioacchino Del Regno
2022-05-23 10:47 ` [PATCH v10 20/21] drm/mediatek: add hpd debounce Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47 ` [PATCH v10 21/21] drm/mediatek: DP audio support for mt8195 Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-05-23 10:47   ` Guillaume Ranquet
2022-06-02  3:50 ` [PATCH v10 00/21] drm/mediatek: Add mt8195 DisplayPort driver Rex-BC Chen
2022-06-02  3:50   ` Rex-BC Chen
2022-06-02  3:50   ` Rex-BC Chen
2022-06-02  3:50   ` Rex-BC Chen
2022-06-02  3:50   ` Rex-BC Chen
2022-06-02  5:31   ` Rex-BC Chen
2022-06-02  5:31     ` Rex-BC Chen
2022-06-02  5:31     ` Rex-BC Chen
2022-06-02  5:31     ` Rex-BC Chen
2022-06-02  5:31     ` Rex-BC Chen

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