From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>,
Maling list - DRI developers <dri-devel@lists.freedesktop.org>,
Jason Ekstrand <jason@jlekstrand.net>
Subject: Re: [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy
Date: Fri, 30 Apr 2021 21:01:42 -0700 [thread overview]
Message-ID: <878s4zayqh.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20210501021959.GA50683@orsosgc001.ra.intel.com>
On Fri, 30 Apr 2021 19:19:59 -0700, Umesh Nerlige Ramappa wrote:
>
> On Fri, Apr 30, 2021 at 07:35:41PM -0500, Jason Ekstrand wrote:
> > On April 30, 2021 18:00:58 "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
> > wrote:
> >
> > On Fri, 30 Apr 2021 15:26:09 -0700, Umesh Nerlige Ramappa wrote:
> >
> > Looks like the engine can be dropped since all timestamps are in sync.
> > I
> > just have one more question here. The timestamp itself is 36 bits.
> > Should
> > the uapi also report the timestamp width to the user OR should I just
> > return the lower 32 bits of the timestamp?
> >
> > Yeah, I think reporting the timestamp width is a good idea since we're
> > reporting the period/frequency here.
>
> Actually, I forgot that we are handling the overflow before returning the
> cs_cycles to the user and overflow handling was the only reason I thought
> user should know the width. Would you stil recommend returning the width in
> the uapi?
The width is needed for userspace to figure out if overflow has occured
between two successive query calls. I don't think I see this happening in
the code.
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>,
Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy
Date: Fri, 30 Apr 2021 21:01:42 -0700 [thread overview]
Message-ID: <878s4zayqh.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20210501021959.GA50683@orsosgc001.ra.intel.com>
On Fri, 30 Apr 2021 19:19:59 -0700, Umesh Nerlige Ramappa wrote:
>
> On Fri, Apr 30, 2021 at 07:35:41PM -0500, Jason Ekstrand wrote:
> > On April 30, 2021 18:00:58 "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
> > wrote:
> >
> > On Fri, 30 Apr 2021 15:26:09 -0700, Umesh Nerlige Ramappa wrote:
> >
> > Looks like the engine can be dropped since all timestamps are in sync.
> > I
> > just have one more question here. The timestamp itself is 36 bits.
> > Should
> > the uapi also report the timestamp width to the user OR should I just
> > return the lower 32 bits of the timestamp?
> >
> > Yeah, I think reporting the timestamp width is a good idea since we're
> > reporting the period/frequency here.
>
> Actually, I forgot that we are handling the overflow before returning the
> cs_cycles to the user and overflow handling was the only reason I thought
> user should know the width. Would you stil recommend returning the width in
> the uapi?
The width is needed for userspace to figure out if overflow has occured
between two successive query calls. I don't think I see this happening in
the code.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-01 4:01 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 0:34 [PATCH 0/1] Add support for querying engine cycles Umesh Nerlige Ramappa
2021-04-29 0:34 ` [Intel-gfx] " Umesh Nerlige Ramappa
2021-04-29 0:34 ` [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy Umesh Nerlige Ramappa
2021-04-29 0:34 ` [Intel-gfx] " Umesh Nerlige Ramappa
2021-04-29 8:34 ` Lionel Landwerlin
2021-04-29 8:34 ` [Intel-gfx] " Lionel Landwerlin
2021-04-29 19:07 ` Jason Ekstrand
2021-04-29 19:07 ` [Intel-gfx] " Jason Ekstrand
2021-04-30 22:26 ` Umesh Nerlige Ramappa
2021-04-30 22:26 ` [Intel-gfx] " Umesh Nerlige Ramappa
2021-04-30 23:00 ` Dixit, Ashutosh
2021-04-30 23:00 ` [Intel-gfx] " Dixit, Ashutosh
2021-04-30 23:23 ` Dixit, Ashutosh
2021-04-30 23:23 ` [Intel-gfx] " Dixit, Ashutosh
2021-05-01 0:35 ` Jason Ekstrand
2021-05-01 0:35 ` [Intel-gfx] " Jason Ekstrand
2021-05-01 2:19 ` Umesh Nerlige Ramappa
2021-05-01 2:19 ` [Intel-gfx] " Umesh Nerlige Ramappa
2021-05-01 4:01 ` Dixit, Ashutosh [this message]
2021-05-01 4:01 ` Dixit, Ashutosh
2021-05-01 15:27 ` Jason Ekstrand
2021-05-01 15:27 ` [Intel-gfx] " Jason Ekstrand
2021-05-03 18:29 ` Umesh Nerlige Ramappa
2021-05-03 18:29 ` [Intel-gfx] " Umesh Nerlige Ramappa
2021-04-29 1:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for Add support for querying engine cycles Patchwork
2021-04-29 1:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-29 3:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-05-04 0:12 [PATCH 0/1] " Umesh Nerlige Ramappa
2021-05-04 0:12 ` [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy Umesh Nerlige Ramappa
2021-04-27 21:49 [Intel-gfx] [PATCH 0/1] Add support for querying engine cycles Umesh Nerlige Ramappa
2021-04-27 21:49 ` [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy Umesh Nerlige Ramappa
2021-04-28 8:43 ` Jani Nikula
2021-04-28 19:24 ` Jason Ekstrand
2021-04-28 19:49 ` Lionel Landwerlin
2021-04-28 19:54 ` Jason Ekstrand
2021-04-28 20:14 ` Lionel Landwerlin
2021-04-28 20:16 ` Lionel Landwerlin
2021-04-28 20:45 ` Jason Ekstrand
2021-04-28 21:18 ` Lionel Landwerlin
2021-04-29 11:15 ` Daniel Vetter
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