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From: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Miquel Raynal
	<miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Greg Kroah-Hartman
	<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>,
	Sebastian Hesselbarth
	<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jiri Slaby <jslaby-IBi9RG/b67k@public.gmane.org>,
	Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	Thomas Petazzoni
	<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Antoine Tenart
	<antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Wilson Ding <dingwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 08/16] serial: mvebu-uart: clear state register before IRQ request
Date: Fri, 06 Oct 2017 14:40:47 +0200	[thread overview]
Message-ID: <878tgofnzk.fsf@free-electrons.com> (raw)
In-Reply-To: <20171006101344.15590-9-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> (Miquel Raynal's message of "Fri, 6 Oct 2017 12:13:36 +0200")

Hi Miquel,
 
 On ven., oct. 06 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:

> From: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
>
> When receiving data on RX pin before ->uart_startup() is called, some
> error bits in the state register could be set up (like BRK_DET).
>
> This is harmless when using only the standard UART (error bits are
> read-only), but may procude an endless loop once in the extended UART
                      produce
> RX interrupt handler (error bits must be cleared).
>
> Clear the status register in ->uart_startup() to avoid this situation.
>
> Signed-off-by: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Thanks,

Gregory


> ---
>  drivers/tty/serial/mvebu-uart.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> index 81a3d2714fd3..67f302748b78 100644
> --- a/drivers/tty/serial/mvebu-uart.c
> +++ b/drivers/tty/serial/mvebu-uart.c
> @@ -322,6 +322,12 @@ static int mvebu_uart_startup(struct uart_port *port)
>  	writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>  	       port->membase + UART_CTRL(port));
>  	udelay(1);
> +
> +	/* Clear the error bits of state register before IRQ request */
> +	ret = readl(port->membase + UART_STAT);
> +	ret |= STAT_BRK_ERR;
> +	writel(ret, port->membase + UART_STAT);
> +
>  	writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
>  
>  	ctl = readl(port->membase + UART_INTR(port));
> -- 
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
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WARNING: multiple messages have this Message-ID (diff)
From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 08/16] serial: mvebu-uart: clear state register before IRQ request
Date: Fri, 06 Oct 2017 14:40:47 +0200	[thread overview]
Message-ID: <878tgofnzk.fsf@free-electrons.com> (raw)
In-Reply-To: <20171006101344.15590-9-miquel.raynal@free-electrons.com> (Miquel Raynal's message of "Fri, 6 Oct 2017 12:13:36 +0200")

Hi Miquel,
 
 On ven., oct. 06 2017, Miquel Raynal <miquel.raynal@free-electrons.com> wrote:

> From: Allen Yan <yanwei@marvell.com>
>
> When receiving data on RX pin before ->uart_startup() is called, some
> error bits in the state register could be set up (like BRK_DET).
>
> This is harmless when using only the standard UART (error bits are
> read-only), but may procude an endless loop once in the extended UART
                      produce
> RX interrupt handler (error bits must be cleared).
>
> Clear the status register in ->uart_startup() to avoid this situation.
>
> Signed-off-by: Allen Yan <yanwei@marvell.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Thanks,

Gregory


> ---
>  drivers/tty/serial/mvebu-uart.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
> index 81a3d2714fd3..67f302748b78 100644
> --- a/drivers/tty/serial/mvebu-uart.c
> +++ b/drivers/tty/serial/mvebu-uart.c
> @@ -322,6 +322,12 @@ static int mvebu_uart_startup(struct uart_port *port)
>  	writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
>  	       port->membase + UART_CTRL(port));
>  	udelay(1);
> +
> +	/* Clear the error bits of state register before IRQ request */
> +	ret = readl(port->membase + UART_STAT);
> +	ret |= STAT_BRK_ERR;
> +	writel(ret, port->membase + UART_STAT);
> +
>  	writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
>  
>  	ctl = readl(port->membase + UART_INTR(port));
> -- 
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  parent reply	other threads:[~2017-10-06 12:40 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-06 10:13 [PATCH 00/16] Support armada-37xx second UART port Miquel Raynal
2017-10-06 10:13 ` Miquel Raynal
2017-10-06 10:13 ` [PATCH 04/16] serial: mvebu-uart: support probe of multiple ports Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
     [not found]   ` <20171006101344.15590-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:23     ` Gregory CLEMENT
2017-10-06 12:23       ` Gregory CLEMENT
     [not found]       ` <87poa0foro.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-09  7:17         ` Miquel RAYNAL
2017-10-09  7:17           ` Miquel RAYNAL
2017-10-12 12:22           ` Gregory CLEMENT
2017-10-12 12:22             ` Gregory CLEMENT
     [not found]             ` <87vajkblol.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-13  7:29               ` Miquel RAYNAL
2017-10-13  7:29                 ` Miquel RAYNAL
2017-10-06 10:13 ` [PATCH 06/16] serial: mvebu-uart: add soft reset at probe Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
2017-10-06 12:33   ` Gregory CLEMENT
2017-10-06 12:33     ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 07/16] serial: mvebu-uart: add function to change baudrate Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
2017-10-06 12:39   ` Gregory CLEMENT
2017-10-06 12:39     ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 09/16] serial: mvebu-uart: add TX interrupt trigger for pulse interrupts Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
     [not found]   ` <20171006101344.15590-10-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 20:22     ` Gregory CLEMENT
2017-10-06 20:22       ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 10/16] serial: mvebu-uart: dissociate RX and TX interrupts Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
2017-10-06 13:11   ` Gregory CLEMENT
2017-10-06 13:11     ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 11/16] serial: mvebu-uart: augment the maximum number of ports Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
2017-10-06 12:45   ` Gregory CLEMENT
2017-10-06 12:45     ` Gregory CLEMENT
     [not found] ` <20171006101344.15590-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 10:13   ` [PATCH 01/16] dt-bindings: mvebu-uart: update documentation with extended UART Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
2017-10-06 12:17     ` Gregory CLEMENT
2017-10-06 12:17       ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
     [not found]     ` <20171006101344.15590-3-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:18       ` Gregory CLEMENT
2017-10-06 12:18         ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 03/16] serial: mvebu-uart: use driver name when requesting an interrupt Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
     [not found]     ` <20171006101344.15590-4-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:19       ` Gregory CLEMENT
2017-10-06 12:19         ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 05/16] serial: mvebu-uart: use a generic way to access the registers Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
2017-10-06 12:32     ` Gregory CLEMENT
2017-10-06 12:32       ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 08/16] serial: mvebu-uart: clear state register before IRQ request Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
     [not found]     ` <20171006101344.15590-9-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:40       ` Gregory CLEMENT [this message]
2017-10-06 12:40         ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 12/16] serial: mvebu-uart: support extended port registers layout Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
2017-10-06 12:46     ` Gregory CLEMENT
2017-10-06 12:46       ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 13/16] arm64: dts: marvell: armada-37xx: add UART clock Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
     [not found]     ` <20171006101344.15590-14-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:48       ` Gregory CLEMENT
2017-10-06 12:48         ` Gregory CLEMENT
2017-10-06 10:13   ` [PATCH 14/16] arm64: dts: marvell: armada-37xx: add second UART port Miquel Raynal
2017-10-06 10:13     ` Miquel Raynal
2017-10-06 12:49     ` Gregory CLEMENT
2017-10-06 12:49       ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 15/16] arm64: dts: marvell: armada-3720-db: enable " Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
     [not found]   ` <20171006101344.15590-16-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 12:51     ` Gregory CLEMENT
2017-10-06 12:51       ` Gregory CLEMENT
2017-10-06 10:13 ` [PATCH 16/16] arm64: dts: marvell: armada-3720-espressobin: fill UART nodes Miquel Raynal
2017-10-06 10:13   ` Miquel Raynal
     [not found]   ` <20171006101344.15590-17-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 13:01     ` Gregory CLEMENT
2017-10-06 13:01       ` Gregory CLEMENT
     [not found]       ` <87fuawe8gx.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-06 13:15         ` Thomas Petazzoni
2017-10-06 13:15           ` Thomas Petazzoni
2017-10-09  7:30           ` Miquel RAYNAL
2017-10-09  7:30             ` Miquel RAYNAL
2017-10-12 11:24             ` Gregory CLEMENT
2017-10-12 11:24               ` Gregory CLEMENT
     [not found]               ` <87zi8wbocl.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-10-13  7:01                 ` Miquel RAYNAL
2017-10-13  7:01                   ` Miquel RAYNAL

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