From: Baruch Siach <baruch@tkos.co.il> To: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: "Thierry Reding" <thierry.reding@gmail.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Lee Jones" <lee.jones@linaro.org>, "Linus Walleij" <linus.walleij@linaro.org>, "Rob Herring" <robh+dt@kernel.org>, "Andrew Lunn" <andrew@lunn.ch>, "Gregory Clement" <gregory.clement@bootlin.com>, "Russell King" <linux@armlinux.org.uk>, "Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>, "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>, "Chris Packham" <chris.packham@alliedtelesis.co.nz>, "Sascha Hauer" <s.hauer@pengutronix.de>, "Ralph Sennhauser" <ralph.sennhauser@gmail.com>, linux-pwm@vger.kernel.org, linux-gpio <linux-gpio@vger.kernel.org>, arm-soc <linux-arm-kernel@lists.infradead.org>, linux-devicetree <devicetree@vger.kernel.org> Subject: Re: [PATCH v7 1/3] gpio: mvebu: add pwm support for Armada 8K/7K Date: Sun, 24 Jan 2021 08:17:06 +0200 [thread overview] Message-ID: <87a6syeu59.fsf@tarshish> (raw) In-Reply-To: <CAMpxmJUGHqJ0C9A84LBF_xzwjbqwFnUnYqFTGBg2CXhKUWd-zg@mail.gmail.com> Hi Bartosz, Thanks for you review. On Fri, Jan 22 2021, Bartosz Golaszewski wrote: > On Mon, Jan 11, 2021 at 12:47 PM Baruch Siach <baruch@tkos.co.il> wrote: >> Use the marvell,pwm-offset DT property to store the location of PWM >> signal duration registers. >> >> Since we have more than two GPIO chips per system, we can't use the >> alias id to differentiate between them. Use the offset value for that. >> >> Signed-off-by: Baruch Siach <baruch@tkos.co.il> [...] >> + regmap_write(mvchip->regs, >> + GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); > > Can you confirm that this line is on purpose and that it should be > executed even for chips that use a separate regmap for PWM? Yes. The blink counter selection register is at the same offset is all chips that support the GPIO blink feature. Only the on/off registers offset is different. baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
WARNING: multiple messages have this Message-ID (diff)
From: Baruch Siach <baruch@tkos.co.il> To: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: "Andrew Lunn" <andrew@lunn.ch>, "Sascha Hauer" <s.hauer@pengutronix.de>, linux-pwm@vger.kernel.org, "Linus Walleij" <linus.walleij@linaro.org>, "Chris Packham" <chris.packham@alliedtelesis.co.nz>, "Russell King" <linux@armlinux.org.uk>, "Rob Herring" <robh+dt@kernel.org>, linux-gpio <linux-gpio@vger.kernel.org>, linux-devicetree <devicetree@vger.kernel.org>, "Thierry Reding" <thierry.reding@gmail.com>, "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>, "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>, "Ralph Sennhauser" <ralph.sennhauser@gmail.com>, "Lee Jones" <lee.jones@linaro.org>, "Gregory Clement" <gregory.clement@bootlin.com>, arm-soc <linux-arm-kernel@lists.infradead.org>, "Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com> Subject: Re: [PATCH v7 1/3] gpio: mvebu: add pwm support for Armada 8K/7K Date: Sun, 24 Jan 2021 08:17:06 +0200 [thread overview] Message-ID: <87a6syeu59.fsf@tarshish> (raw) In-Reply-To: <CAMpxmJUGHqJ0C9A84LBF_xzwjbqwFnUnYqFTGBg2CXhKUWd-zg@mail.gmail.com> Hi Bartosz, Thanks for you review. On Fri, Jan 22 2021, Bartosz Golaszewski wrote: > On Mon, Jan 11, 2021 at 12:47 PM Baruch Siach <baruch@tkos.co.il> wrote: >> Use the marvell,pwm-offset DT property to store the location of PWM >> signal duration registers. >> >> Since we have more than two GPIO chips per system, we can't use the >> alias id to differentiate between them. Use the offset value for that. >> >> Signed-off-by: Baruch Siach <baruch@tkos.co.il> [...] >> + regmap_write(mvchip->regs, >> + GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); > > Can you confirm that this line is on purpose and that it should be > executed even for chips that use a separate regmap for PWM? Yes. The blink counter selection register is at the same offset is all chips that support the GPIO blink feature. Only the on/off registers offset is different. baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il - _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-24 6:18 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-11 11:46 [PATCH v7 0/3] gpio: mvebu: Armada 8K/7K PWM support Baruch Siach 2021-01-11 11:46 ` Baruch Siach 2021-01-11 11:46 ` [PATCH v7 1/3] gpio: mvebu: add pwm support for Armada 8K/7K Baruch Siach 2021-01-11 11:46 ` Baruch Siach 2021-01-22 12:58 ` Bartosz Golaszewski 2021-01-22 12:58 ` Bartosz Golaszewski 2021-01-24 6:17 ` Baruch Siach [this message] 2021-01-24 6:17 ` Baruch Siach 2021-01-11 11:46 ` [PATCH v7 2/3] arm64: dts: armada: add pwm offsets for ap/cp gpios Baruch Siach 2021-01-11 11:46 ` Baruch Siach 2021-01-25 9:50 ` Bartosz Golaszewski 2021-01-25 9:50 ` Bartosz Golaszewski 2021-01-29 15:56 ` Gregory CLEMENT 2021-02-02 11:27 ` Bartosz Golaszewski 2021-02-02 11:27 ` Bartosz Golaszewski 2021-01-29 15:55 ` Gregory CLEMENT 2021-01-29 15:55 ` Gregory CLEMENT 2021-01-11 11:46 ` [PATCH v7 3/3] dt-bindings: ap806: document gpio marvell,pwm-offset property Baruch Siach 2021-01-11 11:46 ` [PATCH v7 3/3] dt-bindings: ap806: document gpio marvell, pwm-offset property Baruch Siach 2021-01-12 8:49 ` [PATCH v7 3/3] dt-bindings: ap806: document gpio marvell,pwm-offset property Linus Walleij 2021-01-12 8:49 ` Linus Walleij 2021-01-12 10:36 ` Russell King - ARM Linux admin 2021-01-12 10:36 ` Russell King - ARM Linux admin 2021-01-18 13:37 ` Linus Walleij 2021-01-18 13:37 ` Linus Walleij
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=87a6syeu59.fsf@tarshish \ --to=baruch@tkos.co.il \ --cc=andrew@lunn.ch \ --cc=bgolaszewski@baylibre.com \ --cc=chris.packham@alliedtelesis.co.nz \ --cc=devicetree@vger.kernel.org \ --cc=gregory.clement@bootlin.com \ --cc=lee.jones@linaro.org \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-pwm@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=ralph.sennhauser@gmail.com \ --cc=robh+dt@kernel.org \ --cc=s.hauer@pengutronix.de \ --cc=sebastian.hesselbarth@gmail.com \ --cc=thierry.reding@gmail.com \ --cc=thomas.petazzoni@bootlin.com \ --cc=u.kleine-koenig@pengutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.