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From: "Björn Töpel" <bjorn@kernel.org>
To: Andy Chiu <andy.chiu@sifive.com>,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
	paul.walmsley@sifive.com, guoren@linux.alibaba.com,
	anup@brainfault.org, atishp@atishpatra.org,
	heiko.stuebner@vrull.eu, "Andy Chiu" <andy.chiu@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Vincent Chen" <vincent.chen@sifive.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Kefeng Wang" <wangkefeng.wang@huawei.com>,
	"Jisheng Zhang" <jszhang@kernel.org>,
	"Björn Töpel" <bjorn@rivosinc.com>,
	"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
	"Mason Huo" <mason.huo@starfivetech.com>,
	"Andrew Bresticker" <abrestic@rivosinc.com>,
	"Fangrui Song" <maskray@google.com>,
	"Peter Zijlstra" <peterz@infradead.org>
Subject: Re: [v2, 5/5] riscv: vector: allow kernel-mode Vector with preemption
Date: Tue, 15 Aug 2023 14:19:30 +0200	[thread overview]
Message-ID: <87cyzoebvx.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <20230721112855.1006-6-andy.chiu@sifive.com>

Andy Chiu <andy.chiu@sifive.com> writes:

> Add kernel_vstate to keep track of kernel-mode Vector registers when
> trap introduced context switch happens. Also, provide trap_pt_regs to
> let context save/restore routine reference status.VS at which the trap
> takes place. The thread flag TIF_RISCV_V_KERNEL_MODE indicates whether
> a task is running in kernel-mode Vector with preemption 'ON'. So context
> switch routines know and would save V-regs to kernel_vstate and restore
> V-regs immediately from kernel_vstate if the bit is set.
>
> Apart from a task's preemption status, the capability of
> running preemptive kernel-mode Vector is jointly controlled by the
> RISCV_V_VSTATE_CTRL_PREEMPTIBLE mask in the task's
> thread.vstate_ctrl. This bit is masked whenever a trap takes place in
> kernel mode while executing preemptive Vector code.
>
> Also, provide a config CONFIG_RISCV_ISA_V_PREEMPTIVE to give users an
> option to disable preemptible kernel-mode Vector at build time. Users
> with constraint memory may want to disable this config as preemptible
> kernel-mode Vector needs extra space for tracking per thread's
> kernel-mode V context. Or, users might as well want to disable it if all
> kernel-mode Vector code is time sensitive and cannot tolerate context
> swicth overhead.

Nice idea! Did you perform any benchmarking? Would be really interesting
to get some numbers.

Nit: "switch"

I like that the most "controversial" patch is last, so it can easily be
dropped if the discussions doesn't settle! It would be nice with kernel
vector support in 6.6!

> diff --git a/arch/riscv/kernel/kernel_mode_vector.c b/arch/riscv/kernel/kernel_mode_vector.c
[...]
> @@ -70,11 +109,14 @@ void kernel_vector_begin(void)
>  
>  	riscv_v_vstate_save(&current->thread.vstate, task_pt_regs(current));
>  
> -	get_cpu_vector_context();
> +	if (!preemptible() || !kernel_vector_preemptible()) {
> +		get_cpu_vector_context();
> +	} else {
> +		if (riscv_v_start_kernel_context())
> +			get_cpu_vector_context();
> +	}

Wdyt about replacing this with:
        if (!preemptible() || !kernel_vector_preemptible() || riscv_v_start_kernel_context())
                get_cpu_vector_context();

Björn

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  parent reply	other threads:[~2023-08-15 12:19 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21 11:28 [v2, 0/5] riscv: support kernel-mode Vector Andy Chiu
2023-07-21 11:28 ` [v2, 1/5] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-08-15 10:41   ` Björn Töpel
2023-07-21 11:28 ` [v2, 2/5] riscv: Add support for kernel mode vector Andy Chiu
2023-07-24 10:48   ` Conor Dooley
2023-07-24 15:48     ` Andy Chiu
2023-08-15 11:28   ` Björn Töpel
2023-08-16 23:36   ` Guo Ren
2023-07-21 11:28 ` [v2, 3/5] riscv: Add vector extension XOR implementation Andy Chiu
2023-07-24 10:51   ` Conor Dooley
2023-07-21 11:28 ` [v2, 4/5] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Andy Chiu
2023-07-21 11:28 ` [v2, 5/5] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2023-07-24 12:18   ` Conor Dooley
2023-07-24 15:45     ` Andy Chiu
2023-07-24 16:26       ` Conor Dooley
2023-08-15 12:19   ` Björn Töpel [this message]
2023-08-16 23:18 ` [v2, 0/5] riscv: support kernel-mode Vector Guo Ren

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