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From: "Björn Töpel" <bjorn@kernel.org>
To: Andy Chiu <andy.chiu@sifive.com>,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
	paul.walmsley@sifive.com, guoren@linux.alibaba.com,
	anup@brainfault.org, atishp@atishpatra.org,
	heiko.stuebner@vrull.eu, "Vincent Chen" <vincent.chen@sifive.com>,
	"Andy Chiu" <andy.chiu@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Heiko Stuebner" <heiko@sntech.de>, "Guo Ren" <guoren@kernel.org>,
	"Björn Töpel" <bjorn@rivosinc.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	"Xianting Tian" <xianting.tian@linux.alibaba.com>,
	"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Jisheng Zhang" <jszhang@kernel.org>,
	"Masahiro Yamada" <masahiroy@kernel.org>
Subject: Re: [v2, 2/5] riscv: Add support for kernel mode vector
Date: Tue, 15 Aug 2023 13:28:08 +0200	[thread overview]
Message-ID: <87il9gee9j.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <20230721112855.1006-3-andy.chiu@sifive.com>

Andy Chiu <andy.chiu@sifive.com> writes:

> From: Greentime Hu <greentime.hu@sifive.com>
>
> Add kernel_vector_begin() and kernel_vector_end() function declarations
> and corresponding definitions in kernel_mode_vector.c
>
> These are needed to wrap uses of vector in kernel mode.
>
> Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> ---
> Changelog v2:
>  - 's/kernel_rvv/kernel_vector' and return void in kernel_vector_begin
>    (Conor)
>  - export may_use_simd to include/asm/simd.h
> ---
>  arch/riscv/include/asm/simd.h          |  50 ++++++++++++
>  arch/riscv/include/asm/vector.h        |   2 +
>  arch/riscv/kernel/Makefile             |   1 +
>  arch/riscv/kernel/kernel_mode_vector.c | 101 +++++++++++++++++++++++++
>  4 files changed, 154 insertions(+)
>  create mode 100644 arch/riscv/include/asm/simd.h
>  create mode 100644 arch/riscv/kernel/kernel_mode_vector.c
>
> diff --git a/arch/riscv/include/asm/simd.h b/arch/riscv/include/asm/simd.h
> new file mode 100644
> index 000000000000..ef70af78005d
> --- /dev/null
> +++ b/arch/riscv/include/asm/simd.h
> @@ -0,0 +1,50 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
> + * Copyright (C) 2023 SiFive
> + */
> +
> +#ifndef __ASM_SIMD_H
> +#define __ASM_SIMD_H
> +
> +#include <linux/compiler.h>
> +#include <linux/irqflags.h>
> +#include <linux/percpu.h>
> +#include <linux/preempt.h>
> +#include <linux/types.h>
> +
> +#ifdef CONFIG_RISCV_ISA_V
> +
> +DECLARE_PER_CPU(bool, vector_context_busy);
> +
> +/*
> + * may_use_simd - whether it is allowable at this time to issue vector
> + *                instructions or access the vector register file
> + *
> + * Callers must not assume that the result remains true beyond the next
> + * preempt_enable() or return from softirq context.
> + */
> +static __must_check inline bool may_use_simd(void)
> +{
> +	/*
> +	 * vector_context_busy is only set while preemption is disabled,
> +	 * and is clear whenever preemption is enabled. Since
> +	 * this_cpu_read() is atomic w.r.t. preemption, vector_context_busy
> +	 * cannot change under our feet -- if it's set we cannot be
> +	 * migrated, and if it's clear we cannot be migrated to a CPU
> +	 * where it is set.
> +	 */
> +	return !in_irq() && !irqs_disabled() && !in_nmi() &&

in_irq() is deprecated, use in_hardirq() instead.

Could you elaborate why !irqs_disabled() is required?

Nit: Use the full 100 chars for the line.


Björn

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  parent reply	other threads:[~2023-08-15 11:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21 11:28 [v2, 0/5] riscv: support kernel-mode Vector Andy Chiu
2023-07-21 11:28 ` [v2, 1/5] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-08-15 10:41   ` Björn Töpel
2023-07-21 11:28 ` [v2, 2/5] riscv: Add support for kernel mode vector Andy Chiu
2023-07-24 10:48   ` Conor Dooley
2023-07-24 15:48     ` Andy Chiu
2023-08-15 11:28   ` Björn Töpel [this message]
2023-08-16 23:36   ` Guo Ren
2023-07-21 11:28 ` [v2, 3/5] riscv: Add vector extension XOR implementation Andy Chiu
2023-07-24 10:51   ` Conor Dooley
2023-07-21 11:28 ` [v2, 4/5] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Andy Chiu
2023-07-21 11:28 ` [v2, 5/5] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2023-07-24 12:18   ` Conor Dooley
2023-07-24 15:45     ` Andy Chiu
2023-07-24 16:26       ` Conor Dooley
2023-08-15 12:19   ` Björn Töpel
2023-08-16 23:18 ` [v2, 0/5] riscv: support kernel-mode Vector Guo Ren

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