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From: Andy Chiu <andy.chiu@sifive.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	vineetg@rivosinc.com, bjorn@kernel.org, greentime.hu@sifive.com,
	paul.walmsley@sifive.com, guoren@linux.alibaba.com,
	anup@brainfault.org, atishp@atishpatra.org,
	heiko.stuebner@vrull.eu, "Vincent Chen" <vincent.chen@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Heiko Stuebner" <heiko@sntech.de>, "Guo Ren" <guoren@kernel.org>,
	"Björn Töpel" <bjorn@rivosinc.com>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	"Xianting Tian" <xianting.tian@linux.alibaba.com>,
	"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Jisheng Zhang" <jszhang@kernel.org>,
	"Masahiro Yamada" <masahiroy@kernel.org>
Subject: Re: [v2, 2/5] riscv: Add support for kernel mode vector
Date: Mon, 24 Jul 2023 23:48:37 +0800	[thread overview]
Message-ID: <CABgGipU3pTQPoHKmZLjiNjNRTNB3J2_Lq2GfeHGC69uLPcnh5A@mail.gmail.com> (raw)
In-Reply-To: <20230724-greedless-pardon-983bbe3178c0@wendy>

On Mon, Jul 24, 2023 at 6:49 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
> Hey Andy,
>
> On Fri, Jul 21, 2023 at 11:28:52AM +0000, Andy Chiu wrote:
> > From: Greentime Hu <greentime.hu@sifive.com>
> >
> > Add kernel_vector_begin() and kernel_vector_end() function declarations
> > and corresponding definitions in kernel_mode_vector.c
> >
> > These are needed to wrap uses of vector in kernel mode.
> >
> > Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
> > Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> > Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> > ---
> > Changelog v2:
> >  - 's/kernel_rvv/kernel_vector' and return void in kernel_vector_begin
> >    (Conor)
> >  - export may_use_simd to include/asm/simd.h
> > ---
>
> > +/*
> > + * kernel_vector_begin(): obtain the CPU vector registers for use by the calling
> > + * context
> > + *
> > + * Must not be called unless may_use_simd() returns true.
> > + * Task context in the vector registers is saved back to memory as necessary.
> > + *
> > + * A matching call to kernel_vector_end() must be made before returning from the
> > + * calling context.
> > + *
> > + * The caller may freely use the vector registers until kernel_vector_end() is
> > + * called.
> > + */
> > +void kernel_vector_begin(void)
> > +{
> > +     if (WARN_ON(!has_vector()))
> > +             return;
> > +
> > +     BUG_ON(!may_use_simd());
> > +
> > +     riscv_v_vstate_save(current, task_pt_regs(current));
> > +
> > +     get_cpu_vector_context();
> > +
> > +     riscv_v_enable();
> > +
>
> > +     return 0;
>
> This breaks the build as you have made the function void.

Sorry, my bad again..
I will send a v3 to address this when we close the discussion on patch 5/5.

>
> Otherwise, this looks fine to me.

Thanks,
Andy

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  reply	other threads:[~2023-07-24 15:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21 11:28 [v2, 0/5] riscv: support kernel-mode Vector Andy Chiu
2023-07-21 11:28 ` [v2, 1/5] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-08-15 10:41   ` Björn Töpel
2023-07-21 11:28 ` [v2, 2/5] riscv: Add support for kernel mode vector Andy Chiu
2023-07-24 10:48   ` Conor Dooley
2023-07-24 15:48     ` Andy Chiu [this message]
2023-08-15 11:28   ` Björn Töpel
2023-08-16 23:36   ` Guo Ren
2023-07-21 11:28 ` [v2, 3/5] riscv: Add vector extension XOR implementation Andy Chiu
2023-07-24 10:51   ` Conor Dooley
2023-07-21 11:28 ` [v2, 4/5] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Andy Chiu
2023-07-21 11:28 ` [v2, 5/5] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2023-07-24 12:18   ` Conor Dooley
2023-07-24 15:45     ` Andy Chiu
2023-07-24 16:26       ` Conor Dooley
2023-08-15 12:19   ` Björn Töpel
2023-08-16 23:18 ` [v2, 0/5] riscv: support kernel-mode Vector Guo Ren

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