From: Lars Povlsen <lars.povlsen@microchip.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Rob Herring <robh+dt@kernel.org>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-mchp-sgpio driver
Date: Thu, 8 Oct 2020 13:43:48 +0200 [thread overview]
Message-ID: <87eem9x7rf.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <CACRpkda0RAK2gp-ZB6LDxAnQP3=VGrsfqkfV0=3FiSFfNhOmjA@mail.gmail.com>
Linus Walleij writes:
> Hi Lars,
>
> a new version of the patch set arrives while I'm reviewing, haha :D
Well, luckily not too much changed per Rob's input.
>
> On Wed, Oct 7, 2020 at 1:12 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>
>> This adds DT bindings for the Microsemi/Microchip SGPIO controller,
>> bindings microchip,sparx5-sgpio, mscc,ocelot-sgpio and
>> mscc,luton-sgpio.
>>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>
> (...)
>> + reg:
>> + description: |
>> + The GPIO bank number. "0" is designates the input pin bank,
>> + "1" the output bank.
>> + maxItems: 1
>
> Excellent.
>
>> + '#gpio-cells':
>> + const: 3
>
> So I thought you needed three cells exactly because the
> middle cell would get you the bank. That you now have in
> reg. So what about using the standard twocell?
I think I answered that in the 'v3 2/3' reply.
Basically the pins are addressed with two indices, and there are good
reasons to expose these to the GPIO cells, f.ex. hardware documentation
cross reference.
---Lars
>
> Yours,
> Linus Walleij
--
Lars Povlsen,
Microchip
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Lars Povlsen <lars.povlsen@microchip.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v4 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-mchp-sgpio driver
Date: Thu, 8 Oct 2020 13:43:48 +0200 [thread overview]
Message-ID: <87eem9x7rf.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <CACRpkda0RAK2gp-ZB6LDxAnQP3=VGrsfqkfV0=3FiSFfNhOmjA@mail.gmail.com>
Linus Walleij writes:
> Hi Lars,
>
> a new version of the patch set arrives while I'm reviewing, haha :D
Well, luckily not too much changed per Rob's input.
>
> On Wed, Oct 7, 2020 at 1:12 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>
>> This adds DT bindings for the Microsemi/Microchip SGPIO controller,
>> bindings microchip,sparx5-sgpio, mscc,ocelot-sgpio and
>> mscc,luton-sgpio.
>>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>
> (...)
>> + reg:
>> + description: |
>> + The GPIO bank number. "0" is designates the input pin bank,
>> + "1" the output bank.
>> + maxItems: 1
>
> Excellent.
>
>> + '#gpio-cells':
>> + const: 3
>
> So I thought you needed three cells exactly because the
> middle cell would get you the bank. That you now have in
> reg. So what about using the standard twocell?
I think I answered that in the 'v3 2/3' reply.
Basically the pins are addressed with two indices, and there are good
reasons to expose these to the GPIO cells, f.ex. hardware documentation
cross reference.
---Lars
>
> Yours,
> Linus Walleij
--
Lars Povlsen,
Microchip
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next prev parent reply other threads:[~2020-10-08 11:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-07 11:11 [PATCH v4 0/3] pinctrl: Adding support for Microchip/Microsemi serial GPIO controller Lars Povlsen
2020-10-07 11:11 ` Lars Povlsen
2020-10-07 11:11 ` [PATCH v4 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-mchp-sgpio driver Lars Povlsen
2020-10-07 11:11 ` Lars Povlsen
2020-10-07 13:35 ` Linus Walleij
2020-10-07 13:35 ` Linus Walleij
2020-10-08 11:43 ` Lars Povlsen [this message]
2020-10-08 11:43 ` Lars Povlsen
2020-10-07 11:11 ` [PATCH v4 2/3] pinctrl: pinctrl-mchp-sgpio: Add pinctrl driver for Microsemi Serial GPIO Lars Povlsen
2020-10-07 11:11 ` Lars Povlsen
2020-10-07 11:11 ` [PATCH v4 3/3] arm64: dts: sparx5: Add SGPIO devices Lars Povlsen
2020-10-07 11:11 ` Lars Povlsen
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