From: Lars Povlsen <lars.povlsen@microchip.com> To: Robin Murphy <robin.murphy@arm.com> Cc: Lars Povlsen <lars.povlsen@microchip.com>, Marc Zyngier <maz@misterjones.org>, <devicetree@vger.kernel.org>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-gpio@vger.kernel.org>, SoC Team <soc@kernel.org>, Michael Turquette <mturquette@baylibre.com>, <linux-arm-kernel@lists.infradead.org>, "Olof Johansson" <olof@lixom.net>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com> Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support Date: Mon, 18 May 2020 09:43:16 +0200 [thread overview] Message-ID: <87wo59ofhn.fsf@soft-dev15.microsemi.net> (raw) In-Reply-To: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> Robin Murphy writes: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 2020-05-15 16:09, Lars Povlsen wrote: > [...] >>>> + cpu0: cpu@0 { >>>> + compatible = "arm,cortex-a53", "arm,armv8"; > > Side note: only one compatible string for the real CPU please, running a > DT bindings check should complain about that. > I'll change this. >>>> + device_type = "cpu"; >>>> + reg = <0x0 0x0>; >>>> + enable-method = "spin-table"; >>> >>> Really? This is 2020, not 2012 any more. Surely a new platform >>> boots using PSCI, and not *this*. >>> >> >> We don't currently support PSCI. The platform does not have TrustZone, >> hence we don't use ATF. > AIUI, part of the purpose of ATF is to provide a nice standardised > platform interface regardless of whether you care about Secure software > or not. It shouldn't take much to knock up a trivial ATF port that just > uses an internal spin-table for its PSCI backend - in fact I suspect > that's probably just a copy-paste from the RPi3 port ;) > I'll change this to PSCI if that's whats expected these days. We actually already have an ATF port. I fully understand the desire to standardize on PSCI. > Robin. -- Lars Povlsen, Microchip
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com> To: Robin Murphy <robin.murphy@arm.com> Cc: devicetree@vger.kernel.org, Alexandre Belloni <alexandre.belloni@bootlin.com>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Olof Johansson <olof@lixom.net>, linux-kernel@vger.kernel.org, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, linux-gpio@vger.kernel.org, SoC Team <soc@kernel.org>, Michael Turquette <mturquette@baylibre.com>, linux-arm-kernel@lists.infradead.org, Marc Zyngier <maz@misterjones.org>, Steen Hegelund <Steen.Hegelund@microchip.com>, linux-clk@vger.kernel.org, Lars Povlsen <lars.povlsen@microchip.com> Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support Date: Mon, 18 May 2020 09:43:16 +0200 [thread overview] Message-ID: <87wo59ofhn.fsf@soft-dev15.microsemi.net> (raw) In-Reply-To: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> Robin Murphy writes: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 2020-05-15 16:09, Lars Povlsen wrote: > [...] >>>> + cpu0: cpu@0 { >>>> + compatible = "arm,cortex-a53", "arm,armv8"; > > Side note: only one compatible string for the real CPU please, running a > DT bindings check should complain about that. > I'll change this. >>>> + device_type = "cpu"; >>>> + reg = <0x0 0x0>; >>>> + enable-method = "spin-table"; >>> >>> Really? This is 2020, not 2012 any more. Surely a new platform >>> boots using PSCI, and not *this*. >>> >> >> We don't currently support PSCI. The platform does not have TrustZone, >> hence we don't use ATF. > AIUI, part of the purpose of ATF is to provide a nice standardised > platform interface regardless of whether you care about Secure software > or not. It shouldn't take much to knock up a trivial ATF port that just > uses an internal spin-table for its PSCI backend - in fact I suspect > that's probably just a copy-paste from the RPi3 port ;) > I'll change this to PSCI if that's whats expected these days. We actually already have an ATF port. I fully understand the desire to standardize on PSCI. > Robin. -- Lars Povlsen, Microchip _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-18 7:43 UTC|newest] Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-13 12:55 [PATCH 00/14] Adding support for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 01/14] pinctrl: ocelot: Should register GPIO's even if not irq controller Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:29 ` Linus Walleij 2020-05-18 7:29 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 02/14] pinctrl: ocelot: Remove instance number from pin functions Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 03/14] pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2 Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:31 ` Linus Walleij 2020-05-18 7:31 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 04/14] arm64: sparx5: Add support for Microchip 2xA53 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 05/14] dt-bindings: arm: sparx5: Add documentation for Microchip Sparx5 SoC Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-28 2:11 ` Rob Herring 2020-05-28 2:11 ` Rob Herring 2020-06-02 9:10 ` Lars Povlsen 2020-06-02 9:10 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 15:39 ` Marc Zyngier 2020-05-13 15:39 ` Marc Zyngier 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:09 ` Lars Povlsen 2020-05-15 15:30 ` Robin Murphy 2020-05-15 15:30 ` Robin Murphy 2020-05-18 7:43 ` Lars Povlsen [this message] 2020-05-18 7:43 ` Lars Povlsen 2020-05-15 16:31 ` Marc Zyngier 2020-05-13 12:55 ` [PATCH 07/14] dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-18 7:33 ` Linus Walleij 2020-05-18 7:33 ` Linus Walleij 2020-05-13 12:55 ` [PATCH 08/14] arm64: dts: sparx5: Add pinctrl support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 09/14] pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-14 18:09 ` kbuild test robot 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-15 15:52 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:46 ` Stephen Boyd 2020-05-29 14:04 ` Lars Povlsen 2020-05-29 14:04 ` Lars Povlsen 2020-05-28 2:18 ` Rob Herring 2020-05-28 2:18 ` Rob Herring 2020-06-02 8:39 ` Lars Povlsen 2020-06-02 8:39 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 11/14] dt-bindings: clock: sparx5: Add bindings include file Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 12/14] clk: sparx5: Add Sparx5 SoC DPLL clock driver Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-27 2:56 ` Stephen Boyd 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 14:29 ` Lars Povlsen 2020-05-27 19:08 ` Stephen Boyd 2020-05-13 12:55 ` [PATCH 13/14] arm64: dts: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-13 12:55 ` [PATCH 14/14] arm64: dts: sparx5: Add i2c devices, i2c muxes Lars Povlsen 2020-05-13 12:55 ` Lars Povlsen 2020-05-21 10:16 ` [PATCH 00/14] Adding support for Microchip Sparx5 SoC Arnd Bergmann 2020-05-21 10:16 ` Arnd Bergmann
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