* [PATCH 00/15] OMAP: GPIO: Cleanup OMAP GPIO driver
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Tarun Kanti DebBarma
Do some more cleanup of OMAP GPIO driver and avoid usage of gpio_bank_count
and gpio_bank pointer array by means of maintaining a list.
Patch series is on following commit of linux-omap-pm (branch: wip/gpio-cleanup):
commit d04952091a3b9b4b47696cee48e92a9173fd9ffb
GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only once
Diff summary between RFC(prev version) and this version:
*Patches 0012*-0015* are added to the series
*Call gpio_save(restore)_context from OMAP GPIO driver instead
of calling them from PM sepcific funcs
-For this, few more patches (patches 0004*-8*) are added
to the series
*Move mpuio_init() from probe() to omap_gpio_mod_init()
*Correctly add the wake set/clear/status regs offsets at omap16xx_gpio_regs
*Remove usage of unnecessary variable "offset" locally inside prepare_for_idle()
*wake_set/clear related access is done only after validity check
Links to previous version (RFC) of this series:
https://patchwork.kernel.org/patch/787692/
https://patchwork.kernel.org/patch/787742/
https://patchwork.kernel.org/patch/787762/
https://patchwork.kernel.org/patch/787722/
https://patchwork.kernel.org/patch/787712/
https://patchwork.kernel.org/patch/787732/
http://permalink.gmane.org/gmane.linux.ports.arm.omap/57524
Test Details:
Compile tested for omap1_defconfig and omap2plus_defconfig.
Bootup success on OMAP1710-H3.
Functional testing success on OMAP2430-SDP, OMAP3430-SDP, OMAP4430-SDP.
PM Testing success on OMAP3430-SDP: retention, off_mode, system_wide
suspend and gpio wakeup.
Charulatha V (12):
OMAP: GPIO: Avoid cpu_is checks during module ena/disable
OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
OMAP: GPIO: Remove dependency on gpio_bank_count
OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
OMAP: GPIO: Make gpio_context part of gpio_bank structure
OMAP4: GPIO: Save/restore context
OMAP: GPIO: handle save/restore ctx in GPIO driver
OMAP2+: GPIO: make workaround_enabled bank specific
OMAP: GPIO: Fix: use wake set/clear regs
OMAP: GPIO: clean set_gpio_triggering function
OMAP: GPIO: Use memset for omap_gpio_reg_offs
OMAP: GPIO: clean omap_gpio_mod_init function
Tarun Kanti DebBarma (3):
OMAP: GPIO: cleanup suspend and resume functions
OMAP: GPIO: cleanup prepare/resume idle functions
OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
arch/arm/mach-omap1/gpio15xx.c | 42 +-
arch/arm/mach-omap1/gpio16xx.c | 55 ++-
arch/arm/mach-omap1/gpio7xx.c | 42 +-
arch/arm/mach-omap2/gpio.c | 53 ++-
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 22 +-
arch/arm/plat-omap/include/plat/gpio.h | 20 +-
drivers/gpio/gpio_omap.c | 797 ++++++++++------------------
10 files changed, 438 insertions(+), 599 deletions(-)
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 00/15] OMAP: GPIO: Cleanup OMAP GPIO driver
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
Do some more cleanup of OMAP GPIO driver and avoid usage of gpio_bank_count
and gpio_bank pointer array by means of maintaining a list.
Patch series is on following commit of linux-omap-pm (branch: wip/gpio-cleanup):
commit d04952091a3b9b4b47696cee48e92a9173fd9ffb
GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only once
Diff summary between RFC(prev version) and this version:
*Patches 0012*-0015* are added to the series
*Call gpio_save(restore)_context from OMAP GPIO driver instead
of calling them from PM sepcific funcs
-For this, few more patches (patches 0004*-8*) are added
to the series
*Move mpuio_init() from probe() to omap_gpio_mod_init()
*Correctly add the wake set/clear/status regs offsets at omap16xx_gpio_regs
*Remove usage of unnecessary variable "offset" locally inside prepare_for_idle()
*wake_set/clear related access is done only after validity check
Links to previous version (RFC) of this series:
https://patchwork.kernel.org/patch/787692/
https://patchwork.kernel.org/patch/787742/
https://patchwork.kernel.org/patch/787762/
https://patchwork.kernel.org/patch/787722/
https://patchwork.kernel.org/patch/787712/
https://patchwork.kernel.org/patch/787732/
http://permalink.gmane.org/gmane.linux.ports.arm.omap/57524
Test Details:
Compile tested for omap1_defconfig and omap2plus_defconfig.
Bootup success on OMAP1710-H3.
Functional testing success on OMAP2430-SDP, OMAP3430-SDP, OMAP4430-SDP.
PM Testing success on OMAP3430-SDP: retention, off_mode, system_wide
suspend and gpio wakeup.
Charulatha V (12):
OMAP: GPIO: Avoid cpu_is checks during module ena/disable
OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
OMAP: GPIO: Remove dependency on gpio_bank_count
OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
OMAP: GPIO: Make gpio_context part of gpio_bank structure
OMAP4: GPIO: Save/restore context
OMAP: GPIO: handle save/restore ctx in GPIO driver
OMAP2+: GPIO: make workaround_enabled bank specific
OMAP: GPIO: Fix: use wake set/clear regs
OMAP: GPIO: clean set_gpio_triggering function
OMAP: GPIO: Use memset for omap_gpio_reg_offs
OMAP: GPIO: clean omap_gpio_mod_init function
Tarun Kanti DebBarma (3):
OMAP: GPIO: cleanup suspend and resume functions
OMAP: GPIO: cleanup prepare/resume idle functions
OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
arch/arm/mach-omap1/gpio15xx.c | 42 +-
arch/arm/mach-omap1/gpio16xx.c | 55 ++-
arch/arm/mach-omap1/gpio7xx.c | 42 +-
arch/arm/mach-omap2/gpio.c | 53 ++-
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
arch/arm/mach-omap2/pm34xx.c | 22 +-
arch/arm/plat-omap/include/plat/gpio.h | 20 +-
drivers/gpio/gpio_omap.c | 797 ++++++++++------------------
10 files changed, 438 insertions(+), 599 deletions(-)
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
Remove cpu-is checks while enabling/disabling OMAP GPIO module
during a gpio request/free.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 2 +
arch/arm/mach-omap1/gpio16xx.c | 2 +
arch/arm/mach-omap1/gpio7xx.c | 2 +
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 53 ++++++++++++++------------------
6 files changed, 32 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f79c6ae..6d83e0a 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus = OMAP1510_GPIO_INT_STATUS,
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index c69b3b1..6bba196 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d7f2ad3..0fc2557 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9a46d77..0446bd1 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+ pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+ pdata->regs->ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3..caf432c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+ u16 ctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index a490cb1..dfdc45e 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -89,6 +89,7 @@ int gpio_bank_count;
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT BIT(0)
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
@@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is enabled, clocks are not gated */
- ctrl &= 0xFFFFFFFE;
- __raw_writel(ctrl, reg);
- }
- bank->mod_usage |= 1 << offset;
+ if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is enabled, clocks are not gated */
+ ctrl &= ~GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
+ bank->mod_usage |= 1 << offset;
+
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- bank->mod_usage &= ~(1 << offset);
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
- }
+ bank->mod_usage &= ~(1 << offset);
+
+ if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Remove cpu-is checks while enabling/disabling OMAP GPIO module
during a gpio request/free.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 2 +
arch/arm/mach-omap1/gpio16xx.c | 2 +
arch/arm/mach-omap1/gpio7xx.c | 2 +
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 53 ++++++++++++++------------------
6 files changed, 32 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f79c6ae..6d83e0a 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus = OMAP1510_GPIO_INT_STATUS,
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index c69b3b1..6bba196 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d7f2ad3..0fc2557 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
+ .ctrl = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9a46d77..0446bd1 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+ pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+ pdata->regs->ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3..caf432c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+ u16 ctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index a490cb1..dfdc45e 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -89,6 +89,7 @@ int gpio_bank_count;
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT BIT(0)
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
@@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is enabled, clocks are not gated */
- ctrl &= 0xFFFFFFFE;
- __raw_writel(ctrl, reg);
- }
- bank->mod_usage |= 1 << offset;
+ if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is enabled, clocks are not gated */
+ ctrl &= ~GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
+ bank->mod_usage |= 1 << offset;
+
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- bank->mod_usage &= ~(1 << offset);
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
- }
+ bank->mod_usage &= ~(1 << offset);
+
+ if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V,
Cousson, Benoit, Paul Walmsley
From: Charulatha V <charu@ti.com>
Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
(bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
Fix the above by providing non-wakeup GPIO information through pdata
specific to the SoC.
The GPIO rev id provided in the hwmod database is the same for OMAP2420
and OMAP2430. Change the GPIO rev ids in hwmod database as given below
so that it can be used to identify OMAP2420 and OMAP2430.
OMAP2420 - 0
OMAP2430 - 1
OMAP3 - 2
OMAP4 - 3
Signed-off-by: Charulatha V <charu@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/gpio.c | 26 ++++++++++++++++++++++++--
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 11 +++--------
6 files changed, 31 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0446bd1..6cd26b4 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
+ switch (oh->class->rev) {
+ case 0:
+ if (id == 1)
+ /* non-wakeup GPIO pins for OMAP2420 Bank1 */
+ pdata->non_wakeup_gpios = 0xe203ffc0;
+ else if (id == 2)
+ /* non-wakeup GPIO pins for OMAP2420 Bank2 */
+ pdata->non_wakeup_gpios = 0x08700040;
+ break;
+ case 2:
+ if (id == 2)
+ /* non-wakeup GPIO pins for OMAP3 Bank2 */
+ pdata->non_wakeup_gpios = 0x00000001;
+ else if (id == 6)
+ /* non-wakeup GPIO pins for OMAP3 Bank6 */
+ pdata->non_wakeup_gpios = 0x08000000;
+ break;
+ default:
+ /* No non-wakeup GPIO pins for other SoCs */
+ break;
+ }
+
dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
pdata->bank_width = dev_attr->bank_width;
pdata->dbck_flag = dev_attr->dbck_flag;
@@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
switch (oh->class->rev) {
case 0:
case 1:
+ case 2:
pdata->bank_type = METHOD_GPIO_24XX;
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
pdata->regs->direction = OMAP24XX_GPIO_OE;
@@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
- case 2:
+ case 3:
pdata->bank_type = METHOD_GPIO_44XX;
pdata->regs->revision = OMAP4_GPIO_REVISION;
pdata->regs->direction = OMAP4_GPIO_OE;
@@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
kfree(pdata);
return -EINVAL;
}
-
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 9682dd5..ae702b5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap243x_gpio_sysc,
- .rev = 0,
+ .rev = 1,
};
/* gpio1 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 909a84d..05e7005 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap3xxx_gpio_sysc,
- .rev = 1,
+ .rev = 2,
};
/* gpio_dev_attr*/
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index abc548a..ea30752 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap44xx_gpio_sysc,
- .rev = 2,
+ .rev = 3,
};
/* gpio dev_attr */
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index caf432c..8014a8a 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index dfdc45e..0ba4cdb 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
}
/* TODO: Cleanup cpu_is_* checks */
-static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
+static void omap_gpio_mod_init(struct gpio_bank *bank)
{
if (cpu_class_is_omap2()) {
if (cpu_is_omap44xx()) {
@@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- } else if (cpu_is_omap24xx()) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
- if (id < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios = non_wakeup_gpios[id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank))
@@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
+ bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
bank->regs = pdata->regs;
@@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
- omap_gpio_mod_init(bank, id);
+ omap_gpio_mod_init(bank);
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
(bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
Fix the above by providing non-wakeup GPIO information through pdata
specific to the SoC.
The GPIO rev id provided in the hwmod database is the same for OMAP2420
and OMAP2430. Change the GPIO rev ids in hwmod database as given below
so that it can be used to identify OMAP2420 and OMAP2430.
OMAP2420 - 0
OMAP2430 - 1
OMAP3 - 2
OMAP4 - 3
Signed-off-by: Charulatha V <charu@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/gpio.c | 26 ++++++++++++++++++++++++--
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 11 +++--------
6 files changed, 31 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0446bd1..6cd26b4 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
+ switch (oh->class->rev) {
+ case 0:
+ if (id == 1)
+ /* non-wakeup GPIO pins for OMAP2420 Bank1 */
+ pdata->non_wakeup_gpios = 0xe203ffc0;
+ else if (id == 2)
+ /* non-wakeup GPIO pins for OMAP2420 Bank2 */
+ pdata->non_wakeup_gpios = 0x08700040;
+ break;
+ case 2:
+ if (id == 2)
+ /* non-wakeup GPIO pins for OMAP3 Bank2 */
+ pdata->non_wakeup_gpios = 0x00000001;
+ else if (id == 6)
+ /* non-wakeup GPIO pins for OMAP3 Bank6 */
+ pdata->non_wakeup_gpios = 0x08000000;
+ break;
+ default:
+ /* No non-wakeup GPIO pins for other SoCs */
+ break;
+ }
+
dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
pdata->bank_width = dev_attr->bank_width;
pdata->dbck_flag = dev_attr->dbck_flag;
@@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
switch (oh->class->rev) {
case 0:
case 1:
+ case 2:
pdata->bank_type = METHOD_GPIO_24XX;
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
pdata->regs->direction = OMAP24XX_GPIO_OE;
@@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
- case 2:
+ case 3:
pdata->bank_type = METHOD_GPIO_44XX;
pdata->regs->revision = OMAP4_GPIO_REVISION;
pdata->regs->direction = OMAP4_GPIO_OE;
@@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
kfree(pdata);
return -EINVAL;
}
-
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 9682dd5..ae702b5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap243x_gpio_sysc,
- .rev = 0,
+ .rev = 1,
};
/* gpio1 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 909a84d..05e7005 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap3xxx_gpio_sysc,
- .rev = 1,
+ .rev = 2,
};
/* gpio_dev_attr*/
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index abc548a..ea30752 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
.name = "gpio",
.sysc = &omap44xx_gpio_sysc,
- .rev = 2,
+ .rev = 3,
};
/* gpio dev_attr */
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index caf432c..8014a8a 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index dfdc45e..0ba4cdb 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
}
/* TODO: Cleanup cpu_is_* checks */
-static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
+static void omap_gpio_mod_init(struct gpio_bank *bank)
{
if (cpu_class_is_omap2()) {
if (cpu_is_omap44xx()) {
@@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- } else if (cpu_is_omap24xx()) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
- if (id < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios = non_wakeup_gpios[id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank))
@@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
+ bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
bank->regs = pdata->regs;
@@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
- omap_gpio_mod_init(bank, id);
+ omap_gpio_mod_init(bank);
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 03/15] OMAP: GPIO: Remove dependency on gpio_bank_count
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
gpio_bank_count is the count of number of GPIO devices
in a SoC. Remove this dependency from the driver. Also remove
the dependency on array of pointers to gpio_bank struct of
all GPIO devices.
TODO:
The save_context/ restore_context need to be modified to be
called from the prepare_for_/resume_after_ idle, only for the
specific banks and remove the gpio_save_context call from
pm34xx.c. This would be handled in one of the later patches in this
series.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 1 -
arch/arm/mach-omap1/gpio16xx.c | 2 -
arch/arm/mach-omap1/gpio7xx.c | 2 -
arch/arm/mach-omap2/gpio.c | 1 -
arch/arm/plat-omap/include/plat/gpio.h | 3 -
drivers/gpio/gpio_omap.c | 156 ++++++++++++++++----------------
6 files changed, 76 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 6d83e0a..f18a4a9 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -117,7 +117,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(&omap15xx_mpu_gpio);
platform_device_register(&omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 6bba196..d886b88 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -223,8 +223,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 0fc2557..c7684ce 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -284,8 +284,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 6cd26b4..487b49a 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -143,7 +143,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return PTR_ERR(od);
}
- gpio_bank_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 8014a8a..ad9e668 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -204,9 +204,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
};
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 0ba4cdb..c6a1ec9 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -28,7 +28,10 @@
#include <mach/gpio.h>
#include <asm/mach/irq.h>
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+ u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -857,9 +852,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = &gpio_bank[0];
platform_set_drvdata(&omap_mpuio_device, bank);
if (platform_driver_register(&omap_mpuio_driver) == 0)
@@ -867,13 +861,13 @@ static inline void mpuio_init(void)
}
#else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif /* 16xx */
#else
#define bank_is_mpuio(bank) 0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif
@@ -995,18 +989,6 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
*/
static struct lock_class_key gpio_lock_class;
-static inline int init_gpio_info(struct platform_device *pdev)
-{
- /* TODO: Analyze removing gpio_bank_count usage from driver code */
- gpio_bank = kzalloc(gpio_bank_count * sizeof(struct gpio_bank),
- GFP_KERNEL);
- if (!gpio_bank) {
- dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
- return -ENOMEM;
- }
- return 0;
-}
-
/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
@@ -1030,9 +1012,11 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
}
} else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank))
+ if (bank_is_mpuio(bank)) {
__raw_writew(0xffff, bank->base +
OMAP_MPUIO_GPIO_MASKIT / bank->stride);
+ mpuio_init(bank);
+ }
if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
__raw_writew(0xffff, bank->base
+ OMAP1510_GPIO_INT_MASK);
@@ -1138,36 +1122,37 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
static int __devinit omap_gpio_probe(struct platform_device *pdev)
{
- static int gpio_init_done;
struct omap_gpio_platform_data *pdata;
struct resource *res;
- int id;
struct gpio_bank *bank;
+ int ret = 0;
- if (!pdev->dev.platform_data)
- return -EINVAL;
-
- pdata = pdev->dev.platform_data;
-
- if (!gpio_init_done) {
- int ret;
-
- ret = init_gpio_info(pdev);
- if (ret)
- return ret;
+ if (!pdev->dev.platform_data) {
+ ret = -EINVAL;
+ goto err_exit;
}
- id = pdev->id;
- bank = &gpio_bank[id];
+ bank = kzalloc(sizeof(struct gpio_bank), GFP_KERNEL);
+ if (!bank) {
+ dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
+ ret = -ENOMEM;
+ goto err_exit;
+ }
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->irq = res->start;
+ bank->id = pdev->id;
+
+ pdata = pdev->dev.platform_data;
bank->virtual_irq_start = pdata->virtual_irq_start;
+
bank->method = pdata->bank_type;
bank->dev = &pdev->dev;
bank->dbck_flag = pdata->dbck_flag;
@@ -1187,14 +1172,18 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
/* Static mapping, never released */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->base = ioremap(res->start, resource_size(res));
if (!bank->base) {
- dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n", id);
- return -ENOMEM;
+ dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n",
+ pdev->id);
+ ret = -ENOMEM;
+ goto err_free;
}
pm_runtime_enable(bank->dev);
@@ -1204,22 +1193,25 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
- if (!gpio_init_done)
- gpio_init_done = 1;
+ list_add_tail(&bank->node, &omap_gpio_list);
- return 0;
+ return ret;
+
+err_free:
+ kfree(bank);
+err_exit:
+ return ret;
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return 0;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_status;
void __iomem *wake_clear;
void __iomem *wake_set;
@@ -1263,13 +1255,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
static int omap_gpio_resume(struct sys_device *dev)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return 0;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_clear;
void __iomem *wake_set;
unsigned long flags;
@@ -1325,17 +1316,17 @@ static int workaround_enabled;
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int i, c = 0;
- int min = 0;
-
- if (cpu_is_omap34xx())
- min = 1;
+ int c = 0;
+ struct gpio_bank *bank;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l1 = 0, l2 = 0;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
@@ -1394,16 +1385,16 @@ void omap2_gpio_prepare_for_idle(int off_mode)
void omap2_gpio_resume_after_idle(void)
{
- int i;
- int min = 0;
+ struct gpio_bank *bank;
- if (cpu_is_omap34xx())
- min = 1;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l = 0, gen, gen0, gen1;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
@@ -1492,14 +1483,17 @@ void omap2_gpio_resume_after_idle(void)
#endif
#ifdef CONFIG_ARCH_OMAP3
-/* save the registers of bank 2-6 */
void omap_gpio_save_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- /* saving banks from 2-6 only since GPIO1 is in WKUP */
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
gpio_context[i].irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
gpio_context[i].irqenable2 =
@@ -1523,13 +1517,17 @@ void omap_gpio_save_context(void)
}
}
-/* restore the required registers of bank 2-6 */
void omap_gpio_restore_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
__raw_writel(gpio_context[i].irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
__raw_writel(gpio_context[i].irqenable2,
@@ -1576,8 +1574,6 @@ static int __init omap_gpio_sysinit(void)
{
int ret = 0;
- mpuio_init();
-
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
if (ret == 0) {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 03/15] OMAP: GPIO: Remove dependency on gpio_bank_count
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
gpio_bank_count is the count of number of GPIO devices
in a SoC. Remove this dependency from the driver. Also remove
the dependency on array of pointers to gpio_bank struct of
all GPIO devices.
TODO:
The save_context/ restore_context need to be modified to be
called from the prepare_for_/resume_after_ idle, only for the
specific banks and remove the gpio_save_context call from
pm34xx.c. This would be handled in one of the later patches in this
series.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 1 -
arch/arm/mach-omap1/gpio16xx.c | 2 -
arch/arm/mach-omap1/gpio7xx.c | 2 -
arch/arm/mach-omap2/gpio.c | 1 -
arch/arm/plat-omap/include/plat/gpio.h | 3 -
drivers/gpio/gpio_omap.c | 156 ++++++++++++++++----------------
6 files changed, 76 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 6d83e0a..f18a4a9 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -117,7 +117,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(&omap15xx_mpu_gpio);
platform_device_register(&omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 6bba196..d886b88 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -223,8 +223,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 0fc2557..c7684ce 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -284,8 +284,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 6cd26b4..487b49a 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -143,7 +143,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return PTR_ERR(od);
}
- gpio_bank_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 8014a8a..ad9e668 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -204,9 +204,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
};
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 0ba4cdb..c6a1ec9 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -28,7 +28,10 @@
#include <mach/gpio.h>
#include <asm/mach/irq.h>
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+ u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -857,9 +852,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = &gpio_bank[0];
platform_set_drvdata(&omap_mpuio_device, bank);
if (platform_driver_register(&omap_mpuio_driver) == 0)
@@ -867,13 +861,13 @@ static inline void mpuio_init(void)
}
#else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif /* 16xx */
#else
#define bank_is_mpuio(bank) 0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif
@@ -995,18 +989,6 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
*/
static struct lock_class_key gpio_lock_class;
-static inline int init_gpio_info(struct platform_device *pdev)
-{
- /* TODO: Analyze removing gpio_bank_count usage from driver code */
- gpio_bank = kzalloc(gpio_bank_count * sizeof(struct gpio_bank),
- GFP_KERNEL);
- if (!gpio_bank) {
- dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
- return -ENOMEM;
- }
- return 0;
-}
-
/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
@@ -1030,9 +1012,11 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
}
} else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank))
+ if (bank_is_mpuio(bank)) {
__raw_writew(0xffff, bank->base +
OMAP_MPUIO_GPIO_MASKIT / bank->stride);
+ mpuio_init(bank);
+ }
if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
__raw_writew(0xffff, bank->base
+ OMAP1510_GPIO_INT_MASK);
@@ -1138,36 +1122,37 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
static int __devinit omap_gpio_probe(struct platform_device *pdev)
{
- static int gpio_init_done;
struct omap_gpio_platform_data *pdata;
struct resource *res;
- int id;
struct gpio_bank *bank;
+ int ret = 0;
- if (!pdev->dev.platform_data)
- return -EINVAL;
-
- pdata = pdev->dev.platform_data;
-
- if (!gpio_init_done) {
- int ret;
-
- ret = init_gpio_info(pdev);
- if (ret)
- return ret;
+ if (!pdev->dev.platform_data) {
+ ret = -EINVAL;
+ goto err_exit;
}
- id = pdev->id;
- bank = &gpio_bank[id];
+ bank = kzalloc(sizeof(struct gpio_bank), GFP_KERNEL);
+ if (!bank) {
+ dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
+ ret = -ENOMEM;
+ goto err_exit;
+ }
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->irq = res->start;
+ bank->id = pdev->id;
+
+ pdata = pdev->dev.platform_data;
bank->virtual_irq_start = pdata->virtual_irq_start;
+
bank->method = pdata->bank_type;
bank->dev = &pdev->dev;
bank->dbck_flag = pdata->dbck_flag;
@@ -1187,14 +1172,18 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
/* Static mapping, never released */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!res)) {
- dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n", id);
- return -ENODEV;
+ dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n",
+ pdev->id);
+ ret = -ENODEV;
+ goto err_free;
}
bank->base = ioremap(res->start, resource_size(res));
if (!bank->base) {
- dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n", id);
- return -ENOMEM;
+ dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n",
+ pdev->id);
+ ret = -ENOMEM;
+ goto err_free;
}
pm_runtime_enable(bank->dev);
@@ -1204,22 +1193,25 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
- if (!gpio_init_done)
- gpio_init_done = 1;
+ list_add_tail(&bank->node, &omap_gpio_list);
- return 0;
+ return ret;
+
+err_free:
+ kfree(bank);
+err_exit:
+ return ret;
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return 0;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_status;
void __iomem *wake_clear;
void __iomem *wake_set;
@@ -1263,13 +1255,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
static int omap_gpio_resume(struct sys_device *dev)
{
- int i;
+ struct gpio_bank *bank;
if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
return 0;
- for (i = 0; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
void __iomem *wake_clear;
void __iomem *wake_set;
unsigned long flags;
@@ -1325,17 +1316,17 @@ static int workaround_enabled;
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int i, c = 0;
- int min = 0;
-
- if (cpu_is_omap34xx())
- min = 1;
+ int c = 0;
+ struct gpio_bank *bank;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l1 = 0, l2 = 0;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
@@ -1394,16 +1385,16 @@ void omap2_gpio_prepare_for_idle(int off_mode)
void omap2_gpio_resume_after_idle(void)
{
- int i;
- int min = 0;
+ struct gpio_bank *bank;
- if (cpu_is_omap34xx())
- min = 1;
- for (i = min; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
+ list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l = 0, gen, gen0, gen1;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
+ if ((cpu_is_omap34xx()) && (bank->id == 0))
+ continue;
+
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
@@ -1492,14 +1483,17 @@ void omap2_gpio_resume_after_idle(void)
#endif
#ifdef CONFIG_ARCH_OMAP3
-/* save the registers of bank 2-6 */
void omap_gpio_save_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- /* saving banks from 2-6 only since GPIO1 is in WKUP */
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
gpio_context[i].irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
gpio_context[i].irqenable2 =
@@ -1523,13 +1517,17 @@ void omap_gpio_save_context(void)
}
}
-/* restore the required registers of bank 2-6 */
void omap_gpio_restore_context(void)
{
- int i;
+ struct gpio_bank *bank;
+ int i = 0;
+
+ list_for_each_entry(bank, &omap_gpio_list, node) {
+ i++;
+
+ if (bank->id == 0)
+ continue;
- for (i = 1; i < gpio_bank_count; i++) {
- struct gpio_bank *bank = &gpio_bank[i];
__raw_writel(gpio_context[i].irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
__raw_writel(gpio_context[i].irqenable2,
@@ -1576,8 +1574,6 @@ static int __init omap_gpio_sysinit(void)
{
int ret = 0;
- mpuio_init();
-
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
if (ret == 0) {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 04/15] OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
In omap3, save/restore context is implemented for GPIO
banks 2-6 as GPIO bank1 is in wakeup domain. Instead
of identifying bank's power domain by bank id, make use
of a flag "loses_context" which is filled by
pwrdm_can_ever_lose_context() during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm()
is used. omap_device_get_pwrdm() could not be used as the
pwrdm information needs to be filled in pdata, whereas
omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 7 +++++++
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 12 ++++++------
3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 487b49a..0782e06 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
+#include "powerdomain.h"
+
static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
@@ -39,6 +41,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = "omap_gpio";
int id;
+ struct powerdomain *pwrdm;
/*
* extract the device id from name field available in the
@@ -131,6 +134,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
kfree(pdata);
return -EINVAL;
}
+
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index ad9e668..64b1ee7 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ bool loses_context; /* whether the bank would ever lose context */
u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index c6a1ec9..3f1c932 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+ bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1159,6 +1160,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
+ bank->loses_context = pdata->loses_context;
bank->regs = pdata->regs;
@@ -1323,8 +1325,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1391,8 +1392,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1491,7 +1491,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
gpio_context[i].irqenable1 =
@@ -1525,7 +1525,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
__raw_writel(gpio_context[i].irqenable1,
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 04/15] OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
In omap3, save/restore context is implemented for GPIO
banks 2-6 as GPIO bank1 is in wakeup domain. Instead
of identifying bank's power domain by bank id, make use
of a flag "loses_context" which is filled by
pwrdm_can_ever_lose_context() during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm()
is used. omap_device_get_pwrdm() could not be used as the
pwrdm information needs to be filled in pdata, whereas
omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 7 +++++++
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 12 ++++++------
3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 487b49a..0782e06 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
+#include "powerdomain.h"
+
static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
@@ -39,6 +41,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = "omap_gpio";
int id;
+ struct powerdomain *pwrdm;
/*
* extract the device id from name field available in the
@@ -131,6 +134,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
kfree(pdata);
return -EINVAL;
}
+
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index ad9e668..64b1ee7 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride; /* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ bool loses_context; /* whether the bank would ever lose context */
u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index c6a1ec9..3f1c932 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+ bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1159,6 +1160,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
+ bank->loses_context = pdata->loses_context;
bank->regs = pdata->regs;
@@ -1323,8 +1325,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1391,8 +1392,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1491,7 +1491,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
gpio_context[i].irqenable1 =
@@ -1525,7 +1525,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
__raw_writel(gpio_context[i].irqenable1,
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
gpio_context array, which is used to save gpio bank's context,
is used only for OMAP3 architecture.
Move gpio_context as part of gpio_bank structure so that
it can be specific to each gpio bank and can be used for
any OMAP architecture
TODO: extend the gpio save/restore context function for OMAP4
architecture. This is done in one of the next patches in this
series
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 76 ++++++++++++++++++++-------------------------
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 3f1c932..5673951 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -30,6 +30,19 @@
static LIST_HEAD(omap_gpio_list);
+struct gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -1486,33 +1482,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- gpio_context[i].irqenable1 =
+ bank->context.irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- gpio_context[i].irqenable2 =
+ bank->context.irqenable2 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- gpio_context[i].wake_en =
+ bank->context.wake_en =
__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- gpio_context[i].ctrl =
+ bank->context.ctrl =
__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- gpio_context[i].oe =
+ bank->context.oe =
__raw_readl(bank->base + OMAP24XX_GPIO_OE);
- gpio_context[i].leveldetect0 =
+ bank->context.leveldetect0 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- gpio_context[i].leveldetect1 =
+ bank->context.leveldetect1 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- gpio_context[i].risingdetect =
+ bank->context.risingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- gpio_context[i].fallingdetect =
+ bank->context.fallingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- gpio_context[i].dataout =
+ bank->context.dataout =
__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
@@ -1520,33 +1514,31 @@ void omap_gpio_save_context(void)
void omap_gpio_restore_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- __raw_writel(gpio_context[i].irqenable1,
+ __raw_writel(bank->context.irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(gpio_context[i].irqenable2,
+ __raw_writel(bank->context.irqenable2,
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(gpio_context[i].wake_en,
+ __raw_writel(bank->context.wake_en,
bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(gpio_context[i].ctrl,
+ __raw_writel(bank->context.ctrl,
bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(gpio_context[i].oe,
+ __raw_writel(bank->context.oe,
bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(gpio_context[i].leveldetect0,
+ __raw_writel(bank->context.leveldetect0,
bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(gpio_context[i].leveldetect1,
+ __raw_writel(bank->context.leveldetect1,
bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(gpio_context[i].risingdetect,
+ __raw_writel(bank->context.risingdetect,
bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(gpio_context[i].fallingdetect,
+ __raw_writel(bank->context.fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(gpio_context[i].dataout,
+ __raw_writel(bank->context.dataout,
bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
gpio_context array, which is used to save gpio bank's context,
is used only for OMAP3 architecture.
Move gpio_context as part of gpio_bank structure so that
it can be specific to each gpio bank and can be used for
any OMAP architecture
TODO: extend the gpio save/restore context function for OMAP4
architecture. This is done in one of the next patches in this
series
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 76 ++++++++++++++++++++-------------------------
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 3f1c932..5673951 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -30,6 +30,19 @@
static LIST_HEAD(omap_gpio_list);
+struct gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -1486,33 +1482,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- gpio_context[i].irqenable1 =
+ bank->context.irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- gpio_context[i].irqenable2 =
+ bank->context.irqenable2 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- gpio_context[i].wake_en =
+ bank->context.wake_en =
__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- gpio_context[i].ctrl =
+ bank->context.ctrl =
__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- gpio_context[i].oe =
+ bank->context.oe =
__raw_readl(bank->base + OMAP24XX_GPIO_OE);
- gpio_context[i].leveldetect0 =
+ bank->context.leveldetect0 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- gpio_context[i].leveldetect1 =
+ bank->context.leveldetect1 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- gpio_context[i].risingdetect =
+ bank->context.risingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- gpio_context[i].fallingdetect =
+ bank->context.fallingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- gpio_context[i].dataout =
+ bank->context.dataout =
__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
@@ -1520,33 +1514,31 @@ void omap_gpio_save_context(void)
void omap_gpio_restore_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- __raw_writel(gpio_context[i].irqenable1,
+ __raw_writel(bank->context.irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(gpio_context[i].irqenable2,
+ __raw_writel(bank->context.irqenable2,
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(gpio_context[i].wake_en,
+ __raw_writel(bank->context.wake_en,
bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(gpio_context[i].ctrl,
+ __raw_writel(bank->context.ctrl,
bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(gpio_context[i].oe,
+ __raw_writel(bank->context.oe,
bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(gpio_context[i].leveldetect0,
+ __raw_writel(bank->context.leveldetect0,
bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(gpio_context[i].leveldetect1,
+ __raw_writel(bank->context.leveldetect1,
bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(gpio_context[i].risingdetect,
+ __raw_writel(bank->context.risingdetect,
bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(gpio_context[i].fallingdetect,
+ __raw_writel(bank->context.fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(gpio_context[i].dataout,
+ __raw_writel(bank->context.dataout,
bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 06/15] OMAP4: GPIO: Save/restore context
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
Modify the omap_gpio_save/restore_context to support OMAP4
architecture so that the OMAP GPIO driver need not be modified
when OMAP4 off mode support is available.
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 130 +++++++++++++++++++++++++++++++---------------
1 files changed, 87 insertions(+), 43 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 5673951..9d55b7d 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1476,9 +1476,6 @@ void omap2_gpio_resume_after_idle(void)
}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
@@ -1488,26 +1485,49 @@ void omap_gpio_save_context(void)
if (!bank->loses_context)
continue;
- bank->context.irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl =
- __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe =
- __raw_readl(bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ if (bank->method == METHOD_GPIO_24XX) {
+ bank->context.irqenable1 = __raw_readl(
+ bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->context.irqenable2 = __raw_readl(
+ bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->context.wake_en = __raw_readl(
+ bank->base + OMAP24XX_GPIO_WAKE_EN);
+ bank->context.ctrl = __raw_readl(
+ bank->base + OMAP24XX_GPIO_CTRL);
+ bank->context.oe = __raw_readl(
+ bank->base + OMAP24XX_GPIO_OE);
+ bank->context.leveldetect0 = __raw_readl(bank->base +
+ OMAP24XX_GPIO_LEVELDETECT0);
+ bank->context.leveldetect1 = __raw_readl(bank->base +
+ OMAP24XX_GPIO_LEVELDETECT1);
+ bank->context.risingdetect = __raw_readl(bank->base +
+ OMAP24XX_GPIO_RISINGDETECT);
+ bank->context.fallingdetect = __raw_readl(bank->base +
+ OMAP24XX_GPIO_FALLINGDETECT);
+ bank->context.dataout = __raw_readl(
+ bank->base + OMAP24XX_GPIO_DATAOUT);
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ bank->context.irqenable1 = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQSTATUSSET0);
+ bank->context.irqenable2 = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQSTATUSSET1);
+ bank->context.wake_en = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQWAKEN0);
+ bank->context.ctrl = __raw_readl(
+ bank->base + OMAP4_GPIO_CTRL);
+ bank->context.oe = __raw_readl(
+ bank->base + OMAP24XX_GPIO_OE);
+ bank->context.leveldetect0 = __raw_readl(bank->base +
+ OMAP4_GPIO_LEVELDETECT0);
+ bank->context.leveldetect1 = __raw_readl(bank->base +
+ OMAP4_GPIO_LEVELDETECT1);
+ bank->context.risingdetect = __raw_readl(bank->base +
+ OMAP4_GPIO_RISINGDETECT);
+ bank->context.fallingdetect = __raw_readl(bank->base +
+ OMAP4_GPIO_FALLINGDETECT);
+ bank->context.dataout = __raw_readl(
+ bank->base + OMAP4_GPIO_DATAOUT);
+ }
}
}
@@ -1520,28 +1540,52 @@ void omap_gpio_restore_context(void)
if (!bank->loses_context)
continue;
- __raw_writel(bank->context.irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl,
- bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe,
- bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0,
- bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1,
- bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout,
- bank->base + OMAP24XX_GPIO_DATAOUT);
+ if (bank->method == METHOD_GPIO_24XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
+ OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(bank->context.irqenable2, bank->base +
+ OMAP24XX_GPIO_IRQENABLE2);
+ __raw_writel(bank->context.wake_en, bank->base +
+ OMAP24XX_GPIO_WAKE_EN);
+ __raw_writel(bank->context.ctrl, bank->base +
+ OMAP24XX_GPIO_CTRL);
+ __raw_writel(bank->context.oe, bank->base +
+ OMAP24XX_GPIO_OE);
+ __raw_writel(bank->context.leveldetect0, bank->base +
+ OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_writel(bank->context.leveldetect1, bank->base +
+ OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_writel(bank->context.risingdetect, bank->base +
+ OMAP24XX_GPIO_RISINGDETECT);
+ __raw_writel(bank->context.fallingdetect, bank->base +
+ OMAP24XX_GPIO_FALLINGDETECT);
+ __raw_writel(bank->context.dataout, bank->base +
+ OMAP24XX_GPIO_DATAOUT);
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
+ OMAP4_GPIO_IRQSTATUSSET0);
+ __raw_writel(bank->context.irqenable2, bank->base +
+ OMAP4_GPIO_IRQSTATUSSET1);
+ __raw_writel(bank->context.wake_en, bank->base +
+ OMAP4_GPIO_IRQWAKEN0);
+ __raw_writel(bank->context.ctrl, bank->base +
+ OMAP4_GPIO_CTRL);
+ __raw_writel(bank->context.oe, bank->base +
+ OMAP24XX_GPIO_OE);
+ __raw_writel(bank->context.leveldetect0, bank->base +
+ OMAP4_GPIO_LEVELDETECT0);
+ __raw_writel(bank->context.leveldetect1, bank->base +
+ OMAP4_GPIO_LEVELDETECT1);
+ __raw_writel(bank->context.risingdetect, bank->base +
+ OMAP4_GPIO_RISINGDETECT);
+ __raw_writel(bank->context.fallingdetect, bank->base +
+ OMAP4_GPIO_FALLINGDETECT);
+ __raw_writel(bank->context.dataout, bank->base +
+ OMAP4_GPIO_DATAOUT);
+ }
}
}
+
#endif
static struct platform_driver omap_gpio_driver = {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 06/15] OMAP4: GPIO: Save/restore context
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Modify the omap_gpio_save/restore_context to support OMAP4
architecture so that the OMAP GPIO driver need not be modified
when OMAP4 off mode support is available.
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 130 +++++++++++++++++++++++++++++++---------------
1 files changed, 87 insertions(+), 43 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 5673951..9d55b7d 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1476,9 +1476,6 @@ void omap2_gpio_resume_after_idle(void)
}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
@@ -1488,26 +1485,49 @@ void omap_gpio_save_context(void)
if (!bank->loses_context)
continue;
- bank->context.irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl =
- __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe =
- __raw_readl(bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ if (bank->method == METHOD_GPIO_24XX) {
+ bank->context.irqenable1 = __raw_readl(
+ bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->context.irqenable2 = __raw_readl(
+ bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->context.wake_en = __raw_readl(
+ bank->base + OMAP24XX_GPIO_WAKE_EN);
+ bank->context.ctrl = __raw_readl(
+ bank->base + OMAP24XX_GPIO_CTRL);
+ bank->context.oe = __raw_readl(
+ bank->base + OMAP24XX_GPIO_OE);
+ bank->context.leveldetect0 = __raw_readl(bank->base +
+ OMAP24XX_GPIO_LEVELDETECT0);
+ bank->context.leveldetect1 = __raw_readl(bank->base +
+ OMAP24XX_GPIO_LEVELDETECT1);
+ bank->context.risingdetect = __raw_readl(bank->base +
+ OMAP24XX_GPIO_RISINGDETECT);
+ bank->context.fallingdetect = __raw_readl(bank->base +
+ OMAP24XX_GPIO_FALLINGDETECT);
+ bank->context.dataout = __raw_readl(
+ bank->base + OMAP24XX_GPIO_DATAOUT);
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ bank->context.irqenable1 = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQSTATUSSET0);
+ bank->context.irqenable2 = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQSTATUSSET1);
+ bank->context.wake_en = __raw_readl(
+ bank->base + OMAP4_GPIO_IRQWAKEN0);
+ bank->context.ctrl = __raw_readl(
+ bank->base + OMAP4_GPIO_CTRL);
+ bank->context.oe = __raw_readl(
+ bank->base + OMAP24XX_GPIO_OE);
+ bank->context.leveldetect0 = __raw_readl(bank->base +
+ OMAP4_GPIO_LEVELDETECT0);
+ bank->context.leveldetect1 = __raw_readl(bank->base +
+ OMAP4_GPIO_LEVELDETECT1);
+ bank->context.risingdetect = __raw_readl(bank->base +
+ OMAP4_GPIO_RISINGDETECT);
+ bank->context.fallingdetect = __raw_readl(bank->base +
+ OMAP4_GPIO_FALLINGDETECT);
+ bank->context.dataout = __raw_readl(
+ bank->base + OMAP4_GPIO_DATAOUT);
+ }
}
}
@@ -1520,28 +1540,52 @@ void omap_gpio_restore_context(void)
if (!bank->loses_context)
continue;
- __raw_writel(bank->context.irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl,
- bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe,
- bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0,
- bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1,
- bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout,
- bank->base + OMAP24XX_GPIO_DATAOUT);
+ if (bank->method == METHOD_GPIO_24XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
+ OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(bank->context.irqenable2, bank->base +
+ OMAP24XX_GPIO_IRQENABLE2);
+ __raw_writel(bank->context.wake_en, bank->base +
+ OMAP24XX_GPIO_WAKE_EN);
+ __raw_writel(bank->context.ctrl, bank->base +
+ OMAP24XX_GPIO_CTRL);
+ __raw_writel(bank->context.oe, bank->base +
+ OMAP24XX_GPIO_OE);
+ __raw_writel(bank->context.leveldetect0, bank->base +
+ OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_writel(bank->context.leveldetect1, bank->base +
+ OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_writel(bank->context.risingdetect, bank->base +
+ OMAP24XX_GPIO_RISINGDETECT);
+ __raw_writel(bank->context.fallingdetect, bank->base +
+ OMAP24XX_GPIO_FALLINGDETECT);
+ __raw_writel(bank->context.dataout, bank->base +
+ OMAP24XX_GPIO_DATAOUT);
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
+ OMAP4_GPIO_IRQSTATUSSET0);
+ __raw_writel(bank->context.irqenable2, bank->base +
+ OMAP4_GPIO_IRQSTATUSSET1);
+ __raw_writel(bank->context.wake_en, bank->base +
+ OMAP4_GPIO_IRQWAKEN0);
+ __raw_writel(bank->context.ctrl, bank->base +
+ OMAP4_GPIO_CTRL);
+ __raw_writel(bank->context.oe, bank->base +
+ OMAP24XX_GPIO_OE);
+ __raw_writel(bank->context.leveldetect0, bank->base +
+ OMAP4_GPIO_LEVELDETECT0);
+ __raw_writel(bank->context.leveldetect1, bank->base +
+ OMAP4_GPIO_LEVELDETECT1);
+ __raw_writel(bank->context.risingdetect, bank->base +
+ OMAP4_GPIO_RISINGDETECT);
+ __raw_writel(bank->context.fallingdetect, bank->base +
+ OMAP4_GPIO_FALLINGDETECT);
+ __raw_writel(bank->context.dataout, bank->base +
+ OMAP4_GPIO_DATAOUT);
+ }
}
}
+
#endif
static struct platform_driver omap_gpio_driver = {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
functions to handle save context & restore context respectively in the
OMAP GPIO driver itself instead of calling these functions from pm specific
files. For this, in gpio_prepare_for_idle(), use
omap_device_get_context_loss_count() and in gpio_resume_after_idle()
call it again. If the count is different, do restore context.
context lost count is modified in omap_sram_idle() path when
pwrdm_post_transition() is called. But pwrdm_post_transition() is called
only after omap_gpio_resume_after_idle() is called. Hence correct this
so that context lost count is modified before calling
omap_gpio_resume_after_idle().
omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
do nothing if none of the GPIOs in a bank is being used.
Also remove usage of cpu_is_* checks from the above mentioned
functions and fix the multi-line comment style
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/pm34xx.c | 22 +----
arch/arm/plat-omap/include/plat/gpio.h | 2 -
drivers/gpio/gpio_omap.c | 138 +++++++++++++++++---------------
3 files changed, 78 insertions(+), 84 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0c5e3a4..682d147 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static inline void omap3_per_save_context(void)
-{
- omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
- omap_gpio_restore_context();
-}
-
static void omap3_enable_io_chain(void)
{
int timeout = 0;
@@ -395,8 +385,10 @@ void omap_sram_idle(void)
if (!is_suspending())
if (per_next_state < PWRDM_POWER_ON ||
core_next_state < PWRDM_POWER_ON)
- if (!console_trylock())
+ if (!console_trylock()) {
+ pwrdm_post_transition();
goto console_still_active;
+ }
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
@@ -404,8 +396,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
}
/* CORE */
@@ -467,12 +457,12 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
+ pwrdm_post_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
@@ -490,8 +480,6 @@ console_still_active:
omap3_disable_io_chain();
}
- pwrdm_post_transition();
-
clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 64b1ee7..5718a45 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -209,8 +209,6 @@ extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
/*-------------------------------------------------------------------------*/
/* Wrappers for "new style" GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 9d55b7d..bc02ec5 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -22,6 +22,8 @@
#include <linux/slab.h>
#include <linux/pm_runtime.h>
+#include <plat/omap_device.h>
+
#include <mach/hardware.h>
#include <asm/irq.h>
#include <mach/irqs.h>
@@ -72,6 +74,7 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+ u32 ctx_lost_cnt_before;
u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -1310,6 +1313,9 @@ static struct sys_device omap_gpio_device = {
#ifdef CONFIG_ARCH_OMAP2PLUS
+static void omap_gpio_save_context(struct gpio_bank *bank);
+static void omap_gpio_restore_context(struct gpio_bank *bank);
+
static int workaround_enabled;
void omap2_gpio_prepare_for_idle(int off_mode)
@@ -1318,6 +1324,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
+ struct platform_device *pdev;
u32 l1 = 0, l2 = 0;
int j;
@@ -1334,7 +1341,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101. */
if (!(bank->enabled_non_wakeup_gpios))
- continue;
+ goto save_gpio_ctx;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
bank->saved_datain = __raw_readl(bank->base +
@@ -1372,6 +1379,12 @@ void omap2_gpio_prepare_for_idle(int off_mode)
}
c++;
+
+save_gpio_ctx:
+ pdev = to_platform_device(bank->dev);
+ bank->ctx_lost_cnt_before =
+ omap_device_get_context_loss_count(pdev);
+ omap_gpio_save_context(bank);
}
if (!c) {
workaround_enabled = 0;
@@ -1385,6 +1398,8 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
+ u32 ctx_lost_cnt_after;
+ struct platform_device *pdev;
u32 l = 0, gen, gen0, gen1;
int j;
@@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
- if (!workaround_enabled)
+ pdev = to_platform_device(bank->dev);
+ ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
+
+ if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
continue;
+ if (!workaround_enabled)
+ goto restore_gpio_ctx;
+
if (!(bank->enabled_non_wakeup_gpios))
- continue;
+ goto restore_gpio_ctx;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
__raw_writel(bank->saved_fallingdetect,
@@ -1472,117 +1493,104 @@ void omap2_gpio_resume_after_idle(void)
OMAP4_GPIO_LEVELDETECT1);
}
}
+
+restore_gpio_ctx:
+ omap_gpio_restore_context(bank);
}
}
-void omap_gpio_save_context(void)
+void omap_gpio_save_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- if (bank->method == METHOD_GPIO_24XX) {
- bank->context.irqenable1 = __raw_readl(
+ if (bank->method == METHOD_GPIO_24XX) {
+ bank->context.irqenable1 = __raw_readl(
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 = __raw_readl(
+ bank->context.irqenable2 = __raw_readl(
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en = __raw_readl(
+ bank->context.wake_en = __raw_readl(
bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(
+ bank->context.ctrl = __raw_readl(
bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(
+ bank->context.oe = __raw_readl(
bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
+ bank->context.leveldetect0 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
+ bank->context.leveldetect1 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
+ bank->context.risingdetect = __raw_readl(bank->base +
OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
+ bank->context.fallingdetect = __raw_readl(bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
+ bank->context.dataout = __raw_readl(
bank->base + OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- bank->context.irqenable1 = __raw_readl(
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ bank->context.irqenable1 = __raw_readl(
bank->base + OMAP4_GPIO_IRQSTATUSSET0);
- bank->context.irqenable2 = __raw_readl(
+ bank->context.irqenable2 = __raw_readl(
bank->base + OMAP4_GPIO_IRQSTATUSSET1);
- bank->context.wake_en = __raw_readl(
+ bank->context.wake_en = __raw_readl(
bank->base + OMAP4_GPIO_IRQWAKEN0);
- bank->context.ctrl = __raw_readl(
+ bank->context.ctrl = __raw_readl(
bank->base + OMAP4_GPIO_CTRL);
- bank->context.oe = __raw_readl(
+ bank->context.oe = __raw_readl(
bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
+ bank->context.leveldetect0 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
+ bank->context.leveldetect1 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
+ bank->context.risingdetect = __raw_readl(bank->base +
OMAP4_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
+ bank->context.fallingdetect = __raw_readl(bank->base +
OMAP4_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
+ bank->context.dataout = __raw_readl(
bank->base + OMAP4_GPIO_DATAOUT);
- }
}
}
-void omap_gpio_restore_context(void)
+void omap_gpio_restore_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- if (bank->method == METHOD_GPIO_24XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
+ if (bank->method == METHOD_GPIO_24XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2, bank->base +
+ __raw_writel(bank->context.irqenable2, bank->base +
OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en, bank->base +
+ __raw_writel(bank->context.wake_en, bank->base +
OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base +
+ __raw_writel(bank->context.ctrl, bank->base +
OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
+ __raw_writel(bank->context.oe, bank->base +
OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
+ __raw_writel(bank->context.leveldetect0, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
+ __raw_writel(bank->context.leveldetect1, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
+ __raw_writel(bank->context.risingdetect, bank->base +
OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
+ __raw_writel(bank->context.fallingdetect, bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
+ __raw_writel(bank->context.dataout, bank->base +
OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
OMAP4_GPIO_IRQSTATUSSET0);
- __raw_writel(bank->context.irqenable2, bank->base +
+ __raw_writel(bank->context.irqenable2, bank->base +
OMAP4_GPIO_IRQSTATUSSET1);
- __raw_writel(bank->context.wake_en, bank->base +
+ __raw_writel(bank->context.wake_en, bank->base +
OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(bank->context.ctrl, bank->base +
+ __raw_writel(bank->context.ctrl, bank->base +
OMAP4_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
+ __raw_writel(bank->context.oe, bank->base +
OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
+ __raw_writel(bank->context.leveldetect0, bank->base +
OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
+ __raw_writel(bank->context.leveldetect1, bank->base +
OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
+ __raw_writel(bank->context.risingdetect, bank->base +
OMAP4_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
+ __raw_writel(bank->context.fallingdetect, bank->base +
OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
+ __raw_writel(bank->context.dataout, bank->base +
OMAP4_GPIO_DATAOUT);
- }
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
functions to handle save context & restore context respectively in the
OMAP GPIO driver itself instead of calling these functions from pm specific
files. For this, in gpio_prepare_for_idle(), use
omap_device_get_context_loss_count() and in gpio_resume_after_idle()
call it again. If the count is different, do restore context.
context lost count is modified in omap_sram_idle() path when
pwrdm_post_transition() is called. But pwrdm_post_transition() is called
only after omap_gpio_resume_after_idle() is called. Hence correct this
so that context lost count is modified before calling
omap_gpio_resume_after_idle().
omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
do nothing if none of the GPIOs in a bank is being used.
Also remove usage of cpu_is_* checks from the above mentioned
functions and fix the multi-line comment style
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/pm34xx.c | 22 +----
arch/arm/plat-omap/include/plat/gpio.h | 2 -
drivers/gpio/gpio_omap.c | 138 +++++++++++++++++---------------
3 files changed, 78 insertions(+), 84 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0c5e3a4..682d147 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static inline void omap3_per_save_context(void)
-{
- omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
- omap_gpio_restore_context();
-}
-
static void omap3_enable_io_chain(void)
{
int timeout = 0;
@@ -395,8 +385,10 @@ void omap_sram_idle(void)
if (!is_suspending())
if (per_next_state < PWRDM_POWER_ON ||
core_next_state < PWRDM_POWER_ON)
- if (!console_trylock())
+ if (!console_trylock()) {
+ pwrdm_post_transition();
goto console_still_active;
+ }
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
@@ -404,8 +396,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
}
/* CORE */
@@ -467,12 +457,12 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
+ pwrdm_post_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
@@ -490,8 +480,6 @@ console_still_active:
omap3_disable_io_chain();
}
- pwrdm_post_transition();
-
clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 64b1ee7..5718a45 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -209,8 +209,6 @@ extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
/*-------------------------------------------------------------------------*/
/* Wrappers for "new style" GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 9d55b7d..bc02ec5 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -22,6 +22,8 @@
#include <linux/slab.h>
#include <linux/pm_runtime.h>
+#include <plat/omap_device.h>
+
#include <mach/hardware.h>
#include <asm/irq.h>
#include <mach/irqs.h>
@@ -72,6 +74,7 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+ u32 ctx_lost_cnt_before;
u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -1310,6 +1313,9 @@ static struct sys_device omap_gpio_device = {
#ifdef CONFIG_ARCH_OMAP2PLUS
+static void omap_gpio_save_context(struct gpio_bank *bank);
+static void omap_gpio_restore_context(struct gpio_bank *bank);
+
static int workaround_enabled;
void omap2_gpio_prepare_for_idle(int off_mode)
@@ -1318,6 +1324,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
+ struct platform_device *pdev;
u32 l1 = 0, l2 = 0;
int j;
@@ -1334,7 +1341,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101. */
if (!(bank->enabled_non_wakeup_gpios))
- continue;
+ goto save_gpio_ctx;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
bank->saved_datain = __raw_readl(bank->base +
@@ -1372,6 +1379,12 @@ void omap2_gpio_prepare_for_idle(int off_mode)
}
c++;
+
+save_gpio_ctx:
+ pdev = to_platform_device(bank->dev);
+ bank->ctx_lost_cnt_before =
+ omap_device_get_context_loss_count(pdev);
+ omap_gpio_save_context(bank);
}
if (!c) {
workaround_enabled = 0;
@@ -1385,6 +1398,8 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
+ u32 ctx_lost_cnt_after;
+ struct platform_device *pdev;
u32 l = 0, gen, gen0, gen1;
int j;
@@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
- if (!workaround_enabled)
+ pdev = to_platform_device(bank->dev);
+ ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
+
+ if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
continue;
+ if (!workaround_enabled)
+ goto restore_gpio_ctx;
+
if (!(bank->enabled_non_wakeup_gpios))
- continue;
+ goto restore_gpio_ctx;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
__raw_writel(bank->saved_fallingdetect,
@@ -1472,117 +1493,104 @@ void omap2_gpio_resume_after_idle(void)
OMAP4_GPIO_LEVELDETECT1);
}
}
+
+restore_gpio_ctx:
+ omap_gpio_restore_context(bank);
}
}
-void omap_gpio_save_context(void)
+void omap_gpio_save_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- if (bank->method == METHOD_GPIO_24XX) {
- bank->context.irqenable1 = __raw_readl(
+ if (bank->method == METHOD_GPIO_24XX) {
+ bank->context.irqenable1 = __raw_readl(
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 = __raw_readl(
+ bank->context.irqenable2 = __raw_readl(
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en = __raw_readl(
+ bank->context.wake_en = __raw_readl(
bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(
+ bank->context.ctrl = __raw_readl(
bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(
+ bank->context.oe = __raw_readl(
bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
+ bank->context.leveldetect0 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
+ bank->context.leveldetect1 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
+ bank->context.risingdetect = __raw_readl(bank->base +
OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
+ bank->context.fallingdetect = __raw_readl(bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
+ bank->context.dataout = __raw_readl(
bank->base + OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- bank->context.irqenable1 = __raw_readl(
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ bank->context.irqenable1 = __raw_readl(
bank->base + OMAP4_GPIO_IRQSTATUSSET0);
- bank->context.irqenable2 = __raw_readl(
+ bank->context.irqenable2 = __raw_readl(
bank->base + OMAP4_GPIO_IRQSTATUSSET1);
- bank->context.wake_en = __raw_readl(
+ bank->context.wake_en = __raw_readl(
bank->base + OMAP4_GPIO_IRQWAKEN0);
- bank->context.ctrl = __raw_readl(
+ bank->context.ctrl = __raw_readl(
bank->base + OMAP4_GPIO_CTRL);
- bank->context.oe = __raw_readl(
+ bank->context.oe = __raw_readl(
bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
+ bank->context.leveldetect0 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
+ bank->context.leveldetect1 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
+ bank->context.risingdetect = __raw_readl(bank->base +
OMAP4_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
+ bank->context.fallingdetect = __raw_readl(bank->base +
OMAP4_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
+ bank->context.dataout = __raw_readl(
bank->base + OMAP4_GPIO_DATAOUT);
- }
}
}
-void omap_gpio_restore_context(void)
+void omap_gpio_restore_context(struct gpio_bank *bank)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
-
- if (!bank->loses_context)
- continue;
-
- if (bank->method == METHOD_GPIO_24XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
+ if (bank->method == METHOD_GPIO_24XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2, bank->base +
+ __raw_writel(bank->context.irqenable2, bank->base +
OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en, bank->base +
+ __raw_writel(bank->context.wake_en, bank->base +
OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base +
+ __raw_writel(bank->context.ctrl, bank->base +
OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
+ __raw_writel(bank->context.oe, bank->base +
OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
+ __raw_writel(bank->context.leveldetect0, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
+ __raw_writel(bank->context.leveldetect1, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
+ __raw_writel(bank->context.risingdetect, bank->base +
OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
+ __raw_writel(bank->context.fallingdetect, bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
+ __raw_writel(bank->context.dataout, bank->base +
OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
+ } else if (bank->method == METHOD_GPIO_44XX) {
+ __raw_writel(bank->context.irqenable1, bank->base +
OMAP4_GPIO_IRQSTATUSSET0);
- __raw_writel(bank->context.irqenable2, bank->base +
+ __raw_writel(bank->context.irqenable2, bank->base +
OMAP4_GPIO_IRQSTATUSSET1);
- __raw_writel(bank->context.wake_en, bank->base +
+ __raw_writel(bank->context.wake_en, bank->base +
OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(bank->context.ctrl, bank->base +
+ __raw_writel(bank->context.ctrl, bank->base +
OMAP4_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
+ __raw_writel(bank->context.oe, bank->base +
OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
+ __raw_writel(bank->context.leveldetect0, bank->base +
OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
+ __raw_writel(bank->context.leveldetect1, bank->base +
OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
+ __raw_writel(bank->context.risingdetect, bank->base +
OMAP4_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
+ __raw_writel(bank->context.fallingdetect, bank->base +
OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
+ __raw_writel(bank->context.dataout, bank->base +
OMAP4_GPIO_DATAOUT);
- }
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
Make workaround_enabled flag bank-specific instead of using a single
flag for all the banks together. This would be helpful while making
use of runtime framework in OMAP GPIO driver which would make the
driver handle each GPIO bank independently.
Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 15 +++++----------
1 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index bc02ec5..fcc60be 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -72,6 +72,7 @@ struct gpio_bank {
struct device *dev;
bool dbck_flag;
bool loses_context;
+ bool off_mode_wkup_wa_enabled;
int stride;
u32 width;
u32 ctx_lost_cnt_before;
@@ -1077,6 +1078,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
static int gpio;
bank->mod_usage = 0;
+ bank->off_mode_wkup_wa_enabled = false;
/*
* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
@@ -1316,11 +1318,8 @@ static struct sys_device omap_gpio_device = {
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-static int workaround_enabled;
-
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int c = 0;
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
@@ -1378,7 +1377,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
__raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
}
- c++;
+ bank->off_mode_wkup_wa_enabled = true;
save_gpio_ctx:
pdev = to_platform_device(bank->dev);
@@ -1386,11 +1385,6 @@ save_gpio_ctx:
omap_device_get_context_loss_count(pdev);
omap_gpio_save_context(bank);
}
- if (!c) {
- workaround_enabled = 0;
- return;
- }
- workaround_enabled = 1;
}
void omap2_gpio_resume_after_idle(void)
@@ -1415,7 +1409,7 @@ void omap2_gpio_resume_after_idle(void)
if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
continue;
- if (!workaround_enabled)
+ if (!bank->off_mode_wkup_wa_enabled)
goto restore_gpio_ctx;
if (!(bank->enabled_non_wakeup_gpios))
@@ -1495,6 +1489,7 @@ void omap2_gpio_resume_after_idle(void)
}
restore_gpio_ctx:
+ bank->off_mode_wkup_wa_enabled = false;
omap_gpio_restore_context(bank);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Make workaround_enabled flag bank-specific instead of using a single
flag for all the banks together. This would be helpful while making
use of runtime framework in OMAP GPIO driver which would make the
driver handle each GPIO bank independently.
Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
Signed-off-by: Charulatha V <charu@ti.com>
---
drivers/gpio/gpio_omap.c | 15 +++++----------
1 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index bc02ec5..fcc60be 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -72,6 +72,7 @@ struct gpio_bank {
struct device *dev;
bool dbck_flag;
bool loses_context;
+ bool off_mode_wkup_wa_enabled;
int stride;
u32 width;
u32 ctx_lost_cnt_before;
@@ -1077,6 +1078,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
static int gpio;
bank->mod_usage = 0;
+ bank->off_mode_wkup_wa_enabled = false;
/*
* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones
@@ -1316,11 +1318,8 @@ static struct sys_device omap_gpio_device = {
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-static int workaround_enabled;
-
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int c = 0;
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
@@ -1378,7 +1377,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
__raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
}
- c++;
+ bank->off_mode_wkup_wa_enabled = true;
save_gpio_ctx:
pdev = to_platform_device(bank->dev);
@@ -1386,11 +1385,6 @@ save_gpio_ctx:
omap_device_get_context_loss_count(pdev);
omap_gpio_save_context(bank);
}
- if (!c) {
- workaround_enabled = 0;
- return;
- }
- workaround_enabled = 1;
}
void omap2_gpio_resume_after_idle(void)
@@ -1415,7 +1409,7 @@ void omap2_gpio_resume_after_idle(void)
if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
continue;
- if (!workaround_enabled)
+ if (!bank->off_mode_wkup_wa_enabled)
goto restore_gpio_ctx;
if (!(bank->enabled_non_wakeup_gpios))
@@ -1495,6 +1489,7 @@ void omap2_gpio_resume_after_idle(void)
}
restore_gpio_ctx:
+ bank->off_mode_wkup_wa_enabled = false;
omap_gpio_restore_context(bank);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel,
Tarun Kanti DebBarma, Charulatha V
Since wake_status, wake_clear, wake_set is common for all banks on a given
OMAP version it is enough to get their values once during probe().
Also, register offsets are already initialzed according to OMAP versions
during device registration. We no longer need these explicit checks.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 6 ++
arch/arm/mach-omap1/gpio16xx.c | 6 ++
arch/arm/mach-omap1/gpio7xx.c | 6 ++
arch/arm/mach-omap2/gpio.c | 6 ++
arch/arm/plat-omap/include/plat/gpio.h | 3 +
drivers/gpio/gpio_omap.c | 102 +++++++-------------------------
6 files changed, 49 insertions(+), 80 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f18a4a9..b0bd21e 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index d886b88..403437b 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.ctrl = USHRT_MAX,
+ .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
+ .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
+ .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index c7684ce..d5a4aaf 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0782e06..7e79999 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
+ pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
+ pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
break;
case 3:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 5718a45..2d1a5d6 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 wkupstatus;
+ u16 wkupclear;
+ u16 wkupset;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index fcc60be..c189416 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -77,6 +77,9 @@ struct gpio_bank {
u32 width;
u32 ctx_lost_cnt_before;
u16 id;
+ void __iomem *wake_status;
+ void __iomem *wake_clear;
+ void __iomem *wake_set;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank->method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank->method == METHOD_GPIO_24XX) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank->method == METHOD_GPIO_44XX) {
+
+ if (bank->regs->wkupclear != USHRT_MAX)
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 << offset, reg);
- }
-#endif
+ __raw_writel(1 << offset, bank->wake_clear);
+
bank->mod_usage &= ~(1 << offset);
if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
@@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
goto err_free;
}
+ /*
+ * Storing these addresses avoids redundant computation of these
+ * values every time in suspend/resume functions and for all the
+ * gpio banks.
+ */
+ bank->wake_status = bank->base + bank->regs->wkupstatus;
+ bank->wake_clear = bank->base + bank->regs->wkupclear;
+ bank->wake_set = bank->base + bank->regs->wkupset;
+
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
@@ -1207,7 +1203,7 @@ err_exit:
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
-static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
+static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
{
struct gpio_bank *bank;
@@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
return 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *wake_status;
- void __iomem *wake_clear;
- void __iomem *wake_set;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
-
spin_lock_irqsave(&bank->lock, flags);
- bank->saved_wakeup = __raw_readl(wake_status);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->suspend_wakeup, wake_set);
+ bank->saved_wakeup = __raw_readl(bank->wake_status);
+ __raw_writel(0xffffffff, bank->wake_clear);
+ __raw_writel(bank->suspend_wakeup, bank->wake_set);
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
return 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *wake_clear;
- void __iomem *wake_set;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
-
spin_lock_irqsave(&bank->lock, flags);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->saved_wakeup, wake_set);
+ __raw_writel(0xffffffff, bank->wake_clear);
+ __raw_writel(bank->saved_wakeup, bank->wake_set);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
Since wake_status, wake_clear, wake_set is common for all banks on a given
OMAP version it is enough to get their values once during probe().
Also, register offsets are already initialzed according to OMAP versions
during device registration. We no longer need these explicit checks.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 6 ++
arch/arm/mach-omap1/gpio16xx.c | 6 ++
arch/arm/mach-omap1/gpio7xx.c | 6 ++
arch/arm/mach-omap2/gpio.c | 6 ++
arch/arm/plat-omap/include/plat/gpio.h | 3 +
drivers/gpio/gpio_omap.c | 102 +++++++-------------------------
6 files changed, 49 insertions(+), 80 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f18a4a9..b0bd21e 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index d886b88..403437b 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.ctrl = USHRT_MAX,
+ .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
+ .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
+ .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index c7684ce..d5a4aaf 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
.ctrl = USHRT_MAX,
+ .wkupstatus = USHRT_MAX,
+ .wkupclear = USHRT_MAX,
+ .wkupset = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0782e06..7e79999 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
+ pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
+ pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
break;
case 3:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 5718a45..2d1a5d6 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 wkupstatus;
+ u16 wkupclear;
+ u16 wkupset;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index fcc60be..c189416 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -77,6 +77,9 @@ struct gpio_bank {
u32 width;
u32 ctx_lost_cnt_before;
u16 id;
+ void __iomem *wake_status;
+ void __iomem *wake_clear;
+ void __iomem *wake_set;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank->method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank->method == METHOD_GPIO_24XX) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank->method == METHOD_GPIO_44XX) {
+
+ if (bank->regs->wkupclear != USHRT_MAX)
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 << offset, reg);
- }
-#endif
+ __raw_writel(1 << offset, bank->wake_clear);
+
bank->mod_usage &= ~(1 << offset);
if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
@@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
goto err_free;
}
+ /*
+ * Storing these addresses avoids redundant computation of these
+ * values every time in suspend/resume functions and for all the
+ * gpio banks.
+ */
+ bank->wake_status = bank->base + bank->regs->wkupstatus;
+ bank->wake_clear = bank->base + bank->regs->wkupclear;
+ bank->wake_set = bank->base + bank->regs->wkupset;
+
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
@@ -1207,7 +1203,7 @@ err_exit:
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
-static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
+static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
{
struct gpio_bank *bank;
@@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
return 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *wake_status;
- void __iomem *wake_clear;
- void __iomem *wake_set;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
-
spin_lock_irqsave(&bank->lock, flags);
- bank->saved_wakeup = __raw_readl(wake_status);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->suspend_wakeup, wake_set);
+ bank->saved_wakeup = __raw_readl(bank->wake_status);
+ __raw_writel(0xffffffff, bank->wake_clear);
+ __raw_writel(bank->suspend_wakeup, bank->wake_set);
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
return 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *wake_clear;
- void __iomem *wake_set;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
- }
-
spin_lock_irqsave(&bank->lock, flags);
- __raw_writel(0xffffffff, wake_clear);
- __raw_writel(bank->saved_wakeup, wake_set);
+ __raw_writel(0xffffffff, bank->wake_clear);
+ __raw_writel(bank->saved_wakeup, bank->wake_set);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 10/15] OMAP: GPIO: cleanup prepare/resume idle functions
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel,
Tarun Kanti DebBarma, Charulatha V
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 8 ++
arch/arm/plat-omap/include/plat/gpio.h | 4 +
drivers/gpio/gpio_omap.c | 116 ++++++++++----------------------
3 files changed, 48 insertions(+), 80 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 7e79999..0f8782f 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,6 +111,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
@@ -131,6 +135,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 2d1a5d6..7712e97 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,10 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 leveldetect0;
+ u16 leveldetect1;
+ u16 risingdetect;
+ u16 fallingdetect;
u16 wkupstatus;
u16 wkupclear;
u16 wkupset;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index c189416..28390a9 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -267,15 +267,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit;
}
- if (cpu_is_omap44xx()) {
- bank->level_mask =
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank->level_mask =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- }
+ bank->level_mask =
+ __raw_readl(bank->base + bank->regs->leveldetect0) |
+ __raw_readl(bank->base + bank->regs->leveldetect1);
}
#endif
@@ -1181,9 +1175,11 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
* values every time in suspend/resume functions and for all the
* gpio banks.
*/
- bank->wake_status = bank->base + bank->regs->wkupstatus;
- bank->wake_clear = bank->base + bank->regs->wkupclear;
- bank->wake_set = bank->base + bank->regs->wkupset;
+ if (bank->regs->wkupstatus != USHRT_MAX) {
+ bank->wake_status = bank->base + bank->regs->wkupstatus;
+ bank->wake_clear = bank->base + bank->regs->wkupclear;
+ bank->wake_set = bank->base + bank->regs->wkupset;
+ }
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
@@ -1284,40 +1280,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_ctx;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP24XX_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP4_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- }
+ bank->saved_datain = __raw_readl(bank->base +
+ bank->regs->datain);
+ l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
+ l2 = __raw_readl(bank->base + bank->regs->risingdetect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(l1, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
- }
+ __raw_writel(l1, bank->base + bank->regs->fallingdetect);
+ __raw_writel(l2, bank->base + bank->regs->risingdetect);
bank->off_mode_wkup_wa_enabled = true;
@@ -1357,21 +1331,11 @@ void omap2_gpio_resume_after_idle(void)
if (!(bank->enabled_non_wakeup_gpios))
goto restore_gpio_ctx;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP4_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
- }
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + bank->regs->risingdetect);
+ l = __raw_readl(bank->base + bank->regs->datain);
/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
@@ -1399,42 +1363,34 @@ void omap2_gpio_resume_after_idle(void)
if (gen) {
u32 old0, old1;
+ old0 = __raw_readl(bank->base +
+ bank->regs->leveldetect0);
+ old1 = __raw_readl(bank->base +
+ bank->regs->leveldetect1);
+
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- old0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
+ old0 |= gen;
+ old1 |= gen;
}
if (cpu_is_omap44xx()) {
- old0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
+ old0 |= l;
+ old1 |= l;
}
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
}
restore_gpio_ctx:
bank->off_mode_wkup_wa_enabled = false;
omap_gpio_restore_context(bank);
}
-
}
void omap_gpio_save_context(struct gpio_bank *bank)
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 10/15] OMAP: GPIO: cleanup prepare/resume idle functions
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 8 ++
arch/arm/plat-omap/include/plat/gpio.h | 4 +
drivers/gpio/gpio_omap.c | 116 ++++++++++----------------------
3 files changed, 48 insertions(+), 80 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 7e79999..0f8782f 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,6 +111,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
@@ -131,6 +135,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 2d1a5d6..7712e97 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,10 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 leveldetect0;
+ u16 leveldetect1;
+ u16 risingdetect;
+ u16 fallingdetect;
u16 wkupstatus;
u16 wkupclear;
u16 wkupset;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index c189416..28390a9 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -267,15 +267,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit;
}
- if (cpu_is_omap44xx()) {
- bank->level_mask =
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank->level_mask =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- }
+ bank->level_mask =
+ __raw_readl(bank->base + bank->regs->leveldetect0) |
+ __raw_readl(bank->base + bank->regs->leveldetect1);
}
#endif
@@ -1181,9 +1175,11 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
* values every time in suspend/resume functions and for all the
* gpio banks.
*/
- bank->wake_status = bank->base + bank->regs->wkupstatus;
- bank->wake_clear = bank->base + bank->regs->wkupclear;
- bank->wake_set = bank->base + bank->regs->wkupset;
+ if (bank->regs->wkupstatus != USHRT_MAX) {
+ bank->wake_status = bank->base + bank->regs->wkupstatus;
+ bank->wake_clear = bank->base + bank->regs->wkupclear;
+ bank->wake_set = bank->base + bank->regs->wkupset;
+ }
pm_runtime_enable(bank->dev);
pm_runtime_get_sync(bank->dev);
@@ -1284,40 +1280,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_ctx;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP24XX_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP4_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- }
+ bank->saved_datain = __raw_readl(bank->base +
+ bank->regs->datain);
+ l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
+ l2 = __raw_readl(bank->base + bank->regs->risingdetect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(l1, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
- }
+ __raw_writel(l1, bank->base + bank->regs->fallingdetect);
+ __raw_writel(l2, bank->base + bank->regs->risingdetect);
bank->off_mode_wkup_wa_enabled = true;
@@ -1357,21 +1331,11 @@ void omap2_gpio_resume_after_idle(void)
if (!(bank->enabled_non_wakeup_gpios))
goto restore_gpio_ctx;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP4_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
- }
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + bank->regs->risingdetect);
+ l = __raw_readl(bank->base + bank->regs->datain);
/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
@@ -1399,42 +1363,34 @@ void omap2_gpio_resume_after_idle(void)
if (gen) {
u32 old0, old1;
+ old0 = __raw_readl(bank->base +
+ bank->regs->leveldetect0);
+ old1 = __raw_readl(bank->base +
+ bank->regs->leveldetect1);
+
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- old0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
+ old0 |= gen;
+ old1 |= gen;
}
if (cpu_is_omap44xx()) {
- old0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
+ old0 |= l;
+ old1 |= l;
}
+ __raw_writel(old0, bank->base +
+ bank->regs->leveldetect0);
+ __raw_writel(old1, bank->base +
+ bank->regs->leveldetect1);
}
restore_gpio_ctx:
bank->off_mode_wkup_wa_enabled = false;
omap_gpio_restore_context(bank);
}
-
}
void omap_gpio_save_context(struct gpio_bank *bank)
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel,
Tarun Kanti DebBarma, Charulatha V
It is not required to use hard-coded offsets any more in context
save and restore functions and instead use the generic offsets
which have been correctly initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 123 ++++++++++----------------------
3 files changed, 40 insertions(+), 86 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0f8782f..5c888dd 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -106,6 +106,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -130,6 +131,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 7712e97..a341790 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+ u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 28390a9..05c2857 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1395,96 +1395,47 @@ restore_gpio_ctx:
void omap_gpio_save_context(struct gpio_bank *bank)
{
- if (bank->method == METHOD_GPIO_24XX) {
- bank->context.irqenable1 = __raw_readl(
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 = __raw_readl(
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en = __raw_readl(
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(
- bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(
- bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
- bank->base + OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- bank->context.irqenable1 = __raw_readl(
- bank->base + OMAP4_GPIO_IRQSTATUSSET0);
- bank->context.irqenable2 = __raw_readl(
- bank->base + OMAP4_GPIO_IRQSTATUSSET1);
- bank->context.wake_en = __raw_readl(
- bank->base + OMAP4_GPIO_IRQWAKEN0);
- bank->context.ctrl = __raw_readl(
- bank->base + OMAP4_GPIO_CTRL);
- bank->context.oe = __raw_readl(
- bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
- bank->base + OMAP4_GPIO_DATAOUT);
- }
+ bank->context.irqenable1 =
+ __raw_readl(bank->base + bank->regs->irqenable);
+ bank->context.irqenable2 =
+ __raw_readl(bank->base + bank->regs->irqenable2);
+ bank->context.wake_en =
+ __raw_readl(bank->base + bank->regs->wkupstatus);
+ bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
+ bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
+ bank->context.leveldetect0 =
+ __raw_readl(bank->base + bank->regs->leveldetect0);
+ bank->context.leveldetect1 =
+ __raw_readl(bank->base + bank->regs->leveldetect1);
+ bank->context.risingdetect =
+ __raw_readl(bank->base + bank->regs->risingdetect);
+ bank->context.fallingdetect =
+ __raw_readl(bank->base + bank->regs->fallingdetect);
+ bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout);
}
void omap_gpio_restore_context(struct gpio_bank *bank)
{
- if (bank->method == METHOD_GPIO_24XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2, bank->base +
- OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en, bank->base +
- OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base +
- OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
- OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
- OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
- OMAP4_GPIO_IRQSTATUSSET0);
- __raw_writel(bank->context.irqenable2, bank->base +
- OMAP4_GPIO_IRQSTATUSSET1);
- __raw_writel(bank->context.wake_en, bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(bank->context.ctrl, bank->base +
- OMAP4_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
- OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
- OMAP4_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
- OMAP4_GPIO_DATAOUT);
- }
+ __raw_writel(bank->context.irqenable1,
+ bank->base + bank->regs->irqenable);
+ __raw_writel(bank->context.irqenable2,
+ bank->base + bank->regs->irqenable2);
+ __raw_writel(bank->context.wake_en,
+ bank->base + bank->regs->wkupstatus);
+ __raw_writel(bank->context.ctrl,
+ bank->base + bank->regs->ctrl);
+ __raw_writel(bank->context.oe,
+ bank->base + bank->regs->direction);
+ __raw_writel(bank->context.leveldetect0,
+ bank->base + bank->regs->leveldetect0);
+ __raw_writel(bank->context.leveldetect1,
+ bank->base + bank->regs->leveldetect1);
+ __raw_writel(bank->context.risingdetect,
+ bank->base + bank->regs->risingdetect);
+ __raw_writel(bank->context.fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->context.dataout,
+ bank->base + bank->regs->dataout);
}
#endif
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
It is not required to use hard-coded offsets any more in context
save and restore functions and instead use the generic offsets
which have been correctly initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 2 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 123 ++++++++++----------------------
3 files changed, 40 insertions(+), 86 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0f8782f..5c888dd 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -106,6 +106,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -130,6 +131,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 7712e97..a341790 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+ u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 28390a9..05c2857 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -1395,96 +1395,47 @@ restore_gpio_ctx:
void omap_gpio_save_context(struct gpio_bank *bank)
{
- if (bank->method == METHOD_GPIO_24XX) {
- bank->context.irqenable1 = __raw_readl(
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
- bank->context.irqenable2 = __raw_readl(
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
- bank->context.wake_en = __raw_readl(
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(
- bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(
- bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
- bank->base + OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- bank->context.irqenable1 = __raw_readl(
- bank->base + OMAP4_GPIO_IRQSTATUSSET0);
- bank->context.irqenable2 = __raw_readl(
- bank->base + OMAP4_GPIO_IRQSTATUSSET1);
- bank->context.wake_en = __raw_readl(
- bank->base + OMAP4_GPIO_IRQWAKEN0);
- bank->context.ctrl = __raw_readl(
- bank->base + OMAP4_GPIO_CTRL);
- bank->context.oe = __raw_readl(
- bank->base + OMAP24XX_GPIO_OE);
- bank->context.leveldetect0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- bank->context.leveldetect1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- bank->context.risingdetect = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- bank->context.fallingdetect = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- bank->context.dataout = __raw_readl(
- bank->base + OMAP4_GPIO_DATAOUT);
- }
+ bank->context.irqenable1 =
+ __raw_readl(bank->base + bank->regs->irqenable);
+ bank->context.irqenable2 =
+ __raw_readl(bank->base + bank->regs->irqenable2);
+ bank->context.wake_en =
+ __raw_readl(bank->base + bank->regs->wkupstatus);
+ bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
+ bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
+ bank->context.leveldetect0 =
+ __raw_readl(bank->base + bank->regs->leveldetect0);
+ bank->context.leveldetect1 =
+ __raw_readl(bank->base + bank->regs->leveldetect1);
+ bank->context.risingdetect =
+ __raw_readl(bank->base + bank->regs->risingdetect);
+ bank->context.fallingdetect =
+ __raw_readl(bank->base + bank->regs->fallingdetect);
+ bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout);
}
void omap_gpio_restore_context(struct gpio_bank *bank)
{
- if (bank->method == METHOD_GPIO_24XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(bank->context.irqenable2, bank->base +
- OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(bank->context.wake_en, bank->base +
- OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base +
- OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
- OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
- OMAP24XX_GPIO_DATAOUT);
- } else if (bank->method == METHOD_GPIO_44XX) {
- __raw_writel(bank->context.irqenable1, bank->base +
- OMAP4_GPIO_IRQSTATUSSET0);
- __raw_writel(bank->context.irqenable2, bank->base +
- OMAP4_GPIO_IRQSTATUSSET1);
- __raw_writel(bank->context.wake_en, bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(bank->context.ctrl, bank->base +
- OMAP4_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base +
- OMAP24XX_GPIO_OE);
- __raw_writel(bank->context.leveldetect0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(bank->context.leveldetect1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(bank->context.risingdetect, bank->base +
- OMAP4_GPIO_RISINGDETECT);
- __raw_writel(bank->context.fallingdetect, bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->context.dataout, bank->base +
- OMAP4_GPIO_DATAOUT);
- }
+ __raw_writel(bank->context.irqenable1,
+ bank->base + bank->regs->irqenable);
+ __raw_writel(bank->context.irqenable2,
+ bank->base + bank->regs->irqenable2);
+ __raw_writel(bank->context.wake_en,
+ bank->base + bank->regs->wkupstatus);
+ __raw_writel(bank->context.ctrl,
+ bank->base + bank->regs->ctrl);
+ __raw_writel(bank->context.oe,
+ bank->base + bank->regs->direction);
+ __raw_writel(bank->context.leveldetect0,
+ bank->base + bank->regs->leveldetect0);
+ __raw_writel(bank->context.leveldetect1,
+ bank->base + bank->regs->leveldetect1);
+ __raw_writel(bank->context.risingdetect,
+ bank->base + bank->regs->risingdetect);
+ __raw_writel(bank->context.fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->context.dataout,
+ bank->base + bank->regs->dataout);
}
#endif
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
From: Charulatha V <charu@ti.com>
In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
is set for all type of GPIO triggers whereas as per TRM the GPIO
wakeup request can only be generated on edge transitions. Fix this.
In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
is used for wakeup request and the GPIO set/clear wakeup registers
are not used in OMAP4 but is handled without retaining it's old
value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
register by writing the value of the last requested GPIO pin in
a given bank. This can be avoided by making use of GPIO set/clear
wakeup registers.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 4 ++--
drivers/gpio/gpio_omap.c | 32 ++++++++++----------------------
2 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 5c888dd..fbedbbb 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
- pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
- pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
+ pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 05c2857..762d73c 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
}
+
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
- if (cpu_is_omap44xx()) {
- if (trigger != 0)
- __raw_writel(1 << gpio, bank->base+
- OMAP4_GPIO_IRQWAKEN0);
- else {
- val = __raw_readl(bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(val & (~(1 << gpio)), bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- }
- } else {
- /*
- * GPIO wakeup request can only be generated on edge
- * transitions
- */
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_SETWKUENA);
- else
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_CLEARWKUENA);
- }
+ /*
+ * GPIO wakeup request can only be generated on edge
+ * transitions
+ */
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
+ __raw_writel(1 << gpio, bank->wake_set);
+ else
+ __raw_writel(1 << gpio, bank->wake_clear);
}
+
/* This part needs to be executed always for OMAP34xx */
if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
/*
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
is set for all type of GPIO triggers whereas as per TRM the GPIO
wakeup request can only be generated on edge transitions. Fix this.
In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
is used for wakeup request and the GPIO set/clear wakeup registers
are not used in OMAP4 but is handled without retaining it's old
value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
register by writing the value of the last requested GPIO pin in
a given bank. This can be avoided by making use of GPIO set/clear
wakeup registers.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 4 ++--
drivers/gpio/gpio_omap.c | 32 ++++++++++----------------------
2 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 5c888dd..fbedbbb 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
- pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
- pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
+ pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 05c2857..762d73c 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
}
+
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
- if (cpu_is_omap44xx()) {
- if (trigger != 0)
- __raw_writel(1 << gpio, bank->base+
- OMAP4_GPIO_IRQWAKEN0);
- else {
- val = __raw_readl(bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(val & (~(1 << gpio)), bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- }
- } else {
- /*
- * GPIO wakeup request can only be generated on edge
- * transitions
- */
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_SETWKUENA);
- else
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_CLEARWKUENA);
- }
+ /*
+ * GPIO wakeup request can only be generated on edge
+ * transitions
+ */
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
+ __raw_writel(1 << gpio, bank->wake_set);
+ else
+ __raw_writel(1 << gpio, bank->wake_clear);
}
+
/* This part needs to be executed always for OMAP34xx */
if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
/*
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V,
Tarun Kanti DebBarma
From: Charulatha V <charu@ti.com>
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 14 ++++
arch/arm/mach-omap1/gpio16xx.c | 14 ++++
arch/arm/mach-omap1/gpio7xx.c | 14 ++++
arch/arm/mach-omap2/gpio.c | 4 +
arch/arm/plat-omap/include/plat/gpio.h | 3 +
drivers/gpio/gpio_omap.c | 125 +++++++-------------------------
6 files changed, 77 insertions(+), 97 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index b0bd21e..ceee046 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP1510_GPIO_INT_CONTROL,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 403437b..b2479c5 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
.wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
.wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
+ .irqctrl = USHRT_MAX,
+ .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
+ .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d5a4aaf..ceac936 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index fbedbbb..eda1846 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
+ pdata->regs->irqctrl = USHRT_MAX;
+ pdata->regs->edgectrl1 = USHRT_MAX;
+ pdata->regs->edgectrl2 = USHRT_MAX;
+
switch (oh->class->rev) {
case 0:
case 1:
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index a341790..f82881c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
u16 wkupstatus;
u16 wkupclear;
u16 wkupset;
+ u16 irqctrl;
+ u16 edgectrl1;
+ u16 edgectrl2;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 762d73c..ebeb16e 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
__raw_writel(val, reg);
}
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
{
void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio;
- u32 val;
- if (cpu_is_omap44xx()) {
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
+ MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
+ MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
+ MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
+ MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
- } else {
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- }
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
/*
@@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
__raw_readl(bank->base + bank->regs->leveldetect0) |
__raw_readl(bank->base + bank->regs->leveldetect1);
}
-#endif
-#ifdef CONFIG_ARCH_OMAP1
/*
* This only applies to chips that can't do both rising and falling edge
* detection at once. For all other chips, this function is a noop.
*/
static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
{
- void __iomem *reg = bank->base;
+ void __iomem *reg = bank->base + bank->regs->irqctrl;
u32 l = 0;
- switch (bank->method) {
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- break;
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- break;
-#endif
- default:
- return;
- }
-
l = __raw_readl(reg);
if ((l >> gpio) & 1)
l &= ~(1 << gpio);
@@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
__raw_writel(l, reg);
}
-#endif
static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
{
void __iomem *reg = bank->base;
u32 l = 0;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
+ if ((bank->regs->leveldetect0 != USHRT_MAX) &&
+ (bank->regs->wkupstatus != USHRT_MAX)) {
+ set_gpio_trigger(bank, gpio, trigger);
+ } else if (bank->regs->irqctrl != USHRT_MAX) {
+ reg += bank->regs->irqctrl;
+
l = __raw_readl(reg);
if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
bank->toggle_mask |= 1 << gpio;
@@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
else if (trigger & IRQ_TYPE_EDGE_FALLING)
l &= ~(1 << gpio);
else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
+ return -EINVAL;
+
+ __raw_writel(l, reg);
+
+ } else if (bank->regs->edgectrl1 != USHRT_MAX) {
if (gpio & 0x08)
- reg += OMAP1610_GPIO_EDGE_CTRL2;
+ reg += bank->regs->edgectrl2;
else
- reg += OMAP1610_GPIO_EDGE_CTRL1;
+ reg += bank->regs->edgectrl1;
+
gpio &= 0x07;
l = __raw_readl(reg);
l &= ~(3 << (gpio << 1));
@@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
l |= 2 << (gpio << 1);
if (trigger & IRQ_TYPE_EDGE_FALLING)
l |= 1 << (gpio << 1);
+
if (trigger)
/* Enable wake-up during idle for dynamic tick */
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
- else
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
+ __raw_writel(1 << gpio, bank->wake_set);
else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- set_24xx_gpio_triggering(bank, gpio, trigger);
- return 0;
-#endif
- default:
- goto bad;
+ __raw_writel(1 << gpio, bank->wake_clear);
+
+ __raw_writel(l, reg);
}
- __raw_writel(l, reg);
+
return 0;
-bad:
- return -EINVAL;
}
static int gpio_irq_type(struct irq_data *d, unsigned type)
@@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (!(isr & 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
* to respond to the IRQ for the opposite direction.
* This will be indicated in the bank toggle_mask.
*/
- if (bank->toggle_mask & (1 << gpio_index))
+ if ((bank->regs->irqctrl != USHRT_MAX) &&
+ (bank->toggle_mask & (1 << gpio_index)))
_toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
generic_handle_irq(gpio_irq);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 14 ++++
arch/arm/mach-omap1/gpio16xx.c | 14 ++++
arch/arm/mach-omap1/gpio7xx.c | 14 ++++
arch/arm/mach-omap2/gpio.c | 4 +
arch/arm/plat-omap/include/plat/gpio.h | 3 +
drivers/gpio/gpio_omap.c | 125 +++++++-------------------------
6 files changed, 77 insertions(+), 97 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index b0bd21e..ceee046 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP1510_GPIO_INT_CONTROL,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 403437b..b2479c5 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
.wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
.wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
+ .irqctrl = USHRT_MAX,
+ .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
+ .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d5a4aaf..ceac936 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.wkupstatus = USHRT_MAX,
.wkupclear = USHRT_MAX,
.wkupset = USHRT_MAX,
+ .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
+ .edgectrl1 = USHRT_MAX,
+ .edgectrl2 = USHRT_MAX,
+ .leveldetect0 = USHRT_MAX,
+ .leveldetect1 = USHRT_MAX,
+ .risingdetect = USHRT_MAX,
+ .fallingdetect = USHRT_MAX,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index fbedbbb..eda1846 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
+ pdata->regs->irqctrl = USHRT_MAX;
+ pdata->regs->edgectrl1 = USHRT_MAX;
+ pdata->regs->edgectrl2 = USHRT_MAX;
+
switch (oh->class->rev) {
case 0:
case 1:
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index a341790..f82881c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
u16 wkupstatus;
u16 wkupclear;
u16 wkupset;
+ u16 irqctrl;
+ u16 edgectrl1;
+ u16 edgectrl2;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index 762d73c..ebeb16e 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
__raw_writel(val, reg);
}
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
{
void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio;
- u32 val;
- if (cpu_is_omap44xx()) {
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
+ MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
+ MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
+ MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
+ MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
- } else {
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- }
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
/*
@@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
__raw_readl(bank->base + bank->regs->leveldetect0) |
__raw_readl(bank->base + bank->regs->leveldetect1);
}
-#endif
-#ifdef CONFIG_ARCH_OMAP1
/*
* This only applies to chips that can't do both rising and falling edge
* detection at once. For all other chips, this function is a noop.
*/
static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
{
- void __iomem *reg = bank->base;
+ void __iomem *reg = bank->base + bank->regs->irqctrl;
u32 l = 0;
- switch (bank->method) {
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- break;
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- break;
-#endif
- default:
- return;
- }
-
l = __raw_readl(reg);
if ((l >> gpio) & 1)
l &= ~(1 << gpio);
@@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
__raw_writel(l, reg);
}
-#endif
static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
{
void __iomem *reg = bank->base;
u32 l = 0;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
+ if ((bank->regs->leveldetect0 != USHRT_MAX) &&
+ (bank->regs->wkupstatus != USHRT_MAX)) {
+ set_gpio_trigger(bank, gpio, trigger);
+ } else if (bank->regs->irqctrl != USHRT_MAX) {
+ reg += bank->regs->irqctrl;
+
l = __raw_readl(reg);
if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
bank->toggle_mask |= 1 << gpio;
@@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
else if (trigger & IRQ_TYPE_EDGE_FALLING)
l &= ~(1 << gpio);
else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
+ return -EINVAL;
+
+ __raw_writel(l, reg);
+
+ } else if (bank->regs->edgectrl1 != USHRT_MAX) {
if (gpio & 0x08)
- reg += OMAP1610_GPIO_EDGE_CTRL2;
+ reg += bank->regs->edgectrl2;
else
- reg += OMAP1610_GPIO_EDGE_CTRL1;
+ reg += bank->regs->edgectrl1;
+
gpio &= 0x07;
l = __raw_readl(reg);
l &= ~(3 << (gpio << 1));
@@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
l |= 2 << (gpio << 1);
if (trigger & IRQ_TYPE_EDGE_FALLING)
l |= 1 << (gpio << 1);
+
if (trigger)
/* Enable wake-up during idle for dynamic tick */
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
- else
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- l = __raw_readl(reg);
- if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
+ __raw_writel(1 << gpio, bank->wake_set);
else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- set_24xx_gpio_triggering(bank, gpio, trigger);
- return 0;
-#endif
- default:
- goto bad;
+ __raw_writel(1 << gpio, bank->wake_clear);
+
+ __raw_writel(l, reg);
}
- __raw_writel(l, reg);
+
return 0;
-bad:
- return -EINVAL;
}
static int gpio_irq_type(struct irq_data *d, unsigned type)
@@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (!(isr & 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
* to respond to the IRQ for the opposite direction.
* This will be indicated in the bank toggle_mask.
*/
- if (bank->toggle_mask & (1 << gpio_index))
+ if ((bank->regs->irqctrl != USHRT_MAX) &&
+ (bank->toggle_mask & (1 << gpio_index)))
_toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
generic_handle_irq(gpio_irq);
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 14/15] OMAP: GPIO: Use memset for omap_gpio_reg_offs
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V,
Tarun Kanti DebBarma
From: Charulatha V <charu@ti.com>
Use memset to fill omap_gpio_reg_offs structure with 0xFFFF
instead of filling each and every undefined register offset
separately with USHRT_MAX in a given OMAP SoC. This would ease
while adding new register offsets in the future SoCs.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 63 ++++++++++++---------------------
arch/arm/mach-omap1/gpio16xx.c | 74 +++++++++++++++++-----------------------
arch/arm/mach-omap1/gpio7xx.c | 62 ++++++++++++---------------------
arch/arm/mach-omap2/gpio.c | 5 +--
4 files changed, 78 insertions(+), 126 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index ceee046..7f90bcf 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -34,26 +34,7 @@ static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL,
- .datain = OMAP_MPUIO_INPUT_LATCH,
- .dataout = OMAP_MPUIO_OUTPUT,
- .irqstatus = OMAP_MPUIO_GPIO_INT,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap15xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -86,26 +67,7 @@ static struct __initdata resource omap15xx_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP1510_GPIO_DIR_CONTROL,
- .datain = OMAP1510_GPIO_DATA_INPUT,
- .dataout = OMAP1510_GPIO_DATA_OUTPUT,
- .irqstatus = OMAP1510_GPIO_INT_STATUS,
- .irqenable = OMAP1510_GPIO_INT_MASK,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP1510_GPIO_INT_CONTROL,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap15xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -134,7 +96,28 @@ static int __init omap15xx_gpio_init(void)
if (!cpu_is_omap15xx())
return -EINVAL;
+ memset(&omap15xx_mpuio_regs, USHRT_MAX, sizeof(omap15xx_mpuio_regs));
+
+ omap15xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL;
+ omap15xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH;
+ omap15xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT;
+ omap15xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT;
+ omap15xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT;
+ omap15xx_mpuio_regs.irqenable_inv = true;
+ omap15xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE;
+
platform_device_register(&omap15xx_mpu_gpio);
+
+ memset(&omap15xx_gpio_regs, USHRT_MAX, sizeof(omap15xx_gpio_regs));
+
+ omap15xx_gpio_regs.direction = OMAP1510_GPIO_DIR_CONTROL;
+ omap15xx_gpio_regs.datain = OMAP1510_GPIO_DATA_INPUT;
+ omap15xx_gpio_regs.dataout = OMAP1510_GPIO_DATA_OUTPUT;
+ omap15xx_gpio_regs.irqstatus = OMAP1510_GPIO_INT_STATUS;
+ omap15xx_gpio_regs.irqenable = OMAP1510_GPIO_INT_MASK;
+ omap15xx_gpio_regs.irqenable_inv = true;
+ omap15xx_gpio_regs.irqctrl = OMAP1510_GPIO_INT_CONTROL;
+
platform_device_register(&omap15xx_gpio);
return 0;
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index b2479c5..24f6cfa 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -37,26 +37,7 @@ static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL,
- .datain = OMAP_MPUIO_INPUT_LATCH,
- .dataout = OMAP_MPUIO_OUTPUT,
- .irqstatus = OMAP_MPUIO_GPIO_INT,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap16xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -89,29 +70,7 @@ static struct __initdata resource omap16xx_gpio1_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
- .revision = OMAP1610_GPIO_REVISION,
- .direction = OMAP1610_GPIO_DIRECTION,
- .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
- .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
- .datain = OMAP1610_GPIO_DATAIN,
- .dataout = OMAP1610_GPIO_DATAOUT,
- .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
- .irqenable = OMAP1610_GPIO_IRQENABLE1,
- .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
- .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
- .ctrl = USHRT_MAX,
- .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
- .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
- .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
- .irqctrl = USHRT_MAX,
- .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
- .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap16xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -240,6 +199,35 @@ static int __init omap16xx_gpio_init(void)
if (!cpu_is_omap16xx())
return -EINVAL;
+ memset(&omap16xx_mpuio_regs, 0xFF, sizeof(omap16xx_mpuio_regs));
+
+ omap16xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL;
+ omap16xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH;
+ omap16xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT;
+ omap16xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT;
+ omap16xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT;
+ omap16xx_mpuio_regs.irqenable_inv = true;
+ omap16xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE;
+
+ memset(&omap16xx_gpio_regs, 0xFF, sizeof(omap16xx_gpio_regs));
+
+ omap16xx_gpio_regs.revision = OMAP1610_GPIO_REVISION;
+ omap16xx_gpio_regs.direction = OMAP1610_GPIO_DIRECTION;
+ omap16xx_gpio_regs.set_dataout = OMAP1610_GPIO_SET_DATAOUT;
+ omap16xx_gpio_regs.clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT;
+ omap16xx_gpio_regs.datain = OMAP1610_GPIO_DATAIN;
+ omap16xx_gpio_regs.dataout = OMAP1610_GPIO_DATAOUT;
+ omap16xx_gpio_regs.irqstatus = OMAP1610_GPIO_IRQSTATUS1;
+ omap16xx_gpio_regs.irqenable = OMAP1610_GPIO_IRQENABLE1;
+ omap16xx_gpio_regs.irqenable_inv = false;
+ omap16xx_gpio_regs.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1;
+ omap16xx_gpio_regs.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1;
+ omap16xx_gpio_regs.wkupstatus = OMAP1610_GPIO_WAKEUPENABLE;
+ omap16xx_gpio_regs.wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA;
+ omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
+ omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
+ omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
+
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index ceac936..b7ae003 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -39,26 +39,7 @@ static struct __initdata resource omap7xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL / 2,
- .datain = OMAP_MPUIO_INPUT_LATCH / 2,
- .dataout = OMAP_MPUIO_OUTPUT / 2,
- .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap7xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -91,26 +72,7 @@ static struct __initdata resource omap7xx_gpio1_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP7XX_GPIO_DIR_CONTROL,
- .datain = OMAP7XX_GPIO_DATA_INPUT,
- .dataout = OMAP7XX_GPIO_DATA_OUTPUT,
- .irqstatus = OMAP7XX_GPIO_INT_STATUS,
- .irqenable = OMAP7XX_GPIO_INT_MASK,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap7xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -301,6 +263,26 @@ static int __init omap7xx_gpio_init(void)
if (!cpu_is_omap7xx())
return -EINVAL;
+ memset(&omap7xx_mpuio_regs, USHRT_MAX, sizeof(omap7xx_mpuio_regs));
+
+ omap7xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL / 2;
+ omap7xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH / 2;
+ omap7xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT / 2;
+ omap7xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT / 2;
+ omap7xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2;
+ omap7xx_mpuio_regs.irqenable_inv = true;
+ omap7xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2;
+
+ memset(&omap7xx_gpio_regs, USHRT_MAX, sizeof(omap7xx_gpio_regs));
+
+ omap7xx_gpio_regs.direction = OMAP7XX_GPIO_DIR_CONTROL;
+ omap7xx_gpio_regs.datain = OMAP7XX_GPIO_DATA_INPUT;
+ omap7xx_gpio_regs.dataout = OMAP7XX_GPIO_DATA_OUTPUT;
+ omap7xx_gpio_regs.irqstatus = OMAP7XX_GPIO_INT_STATUS;
+ omap7xx_gpio_regs.irqenable = OMAP7XX_GPIO_INT_MASK;
+ omap7xx_gpio_regs.irqenable_inv = true;
+ omap7xx_gpio_regs.irqctrl = OMAP7XX_GPIO_INT_CONTROL;
+
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index eda1846..dce56d9 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -92,9 +92,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
- pdata->regs->irqctrl = USHRT_MAX;
- pdata->regs->edgectrl1 = USHRT_MAX;
- pdata->regs->edgectrl2 = USHRT_MAX;
+ memset(pdata->regs, USHRT_MAX, sizeof(struct omap_gpio_reg_offs));
+ pdata->regs->irqenable_inv = false;
switch (oh->class->rev) {
case 0:
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 14/15] OMAP: GPIO: Use memset for omap_gpio_reg_offs
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
Use memset to fill omap_gpio_reg_offs structure with 0xFFFF
instead of filling each and every undefined register offset
separately with USHRT_MAX in a given OMAP SoC. This would ease
while adding new register offsets in the future SoCs.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio15xx.c | 63 ++++++++++++---------------------
arch/arm/mach-omap1/gpio16xx.c | 74 +++++++++++++++++-----------------------
arch/arm/mach-omap1/gpio7xx.c | 62 ++++++++++++---------------------
arch/arm/mach-omap2/gpio.c | 5 +--
4 files changed, 78 insertions(+), 126 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index ceee046..7f90bcf 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -34,26 +34,7 @@ static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL,
- .datain = OMAP_MPUIO_INPUT_LATCH,
- .dataout = OMAP_MPUIO_OUTPUT,
- .irqstatus = OMAP_MPUIO_GPIO_INT,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap15xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -86,26 +67,7 @@ static struct __initdata resource omap15xx_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP1510_GPIO_DIR_CONTROL,
- .datain = OMAP1510_GPIO_DATA_INPUT,
- .dataout = OMAP1510_GPIO_DATA_OUTPUT,
- .irqstatus = OMAP1510_GPIO_INT_STATUS,
- .irqenable = OMAP1510_GPIO_INT_MASK,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP1510_GPIO_INT_CONTROL,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap15xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -134,7 +96,28 @@ static int __init omap15xx_gpio_init(void)
if (!cpu_is_omap15xx())
return -EINVAL;
+ memset(&omap15xx_mpuio_regs, USHRT_MAX, sizeof(omap15xx_mpuio_regs));
+
+ omap15xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL;
+ omap15xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH;
+ omap15xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT;
+ omap15xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT;
+ omap15xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT;
+ omap15xx_mpuio_regs.irqenable_inv = true;
+ omap15xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE;
+
platform_device_register(&omap15xx_mpu_gpio);
+
+ memset(&omap15xx_gpio_regs, USHRT_MAX, sizeof(omap15xx_gpio_regs));
+
+ omap15xx_gpio_regs.direction = OMAP1510_GPIO_DIR_CONTROL;
+ omap15xx_gpio_regs.datain = OMAP1510_GPIO_DATA_INPUT;
+ omap15xx_gpio_regs.dataout = OMAP1510_GPIO_DATA_OUTPUT;
+ omap15xx_gpio_regs.irqstatus = OMAP1510_GPIO_INT_STATUS;
+ omap15xx_gpio_regs.irqenable = OMAP1510_GPIO_INT_MASK;
+ omap15xx_gpio_regs.irqenable_inv = true;
+ omap15xx_gpio_regs.irqctrl = OMAP1510_GPIO_INT_CONTROL;
+
platform_device_register(&omap15xx_gpio);
return 0;
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index b2479c5..24f6cfa 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -37,26 +37,7 @@ static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL,
- .datain = OMAP_MPUIO_INPUT_LATCH,
- .dataout = OMAP_MPUIO_OUTPUT,
- .irqstatus = OMAP_MPUIO_GPIO_INT,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap16xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -89,29 +70,7 @@ static struct __initdata resource omap16xx_gpio1_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
- .revision = OMAP1610_GPIO_REVISION,
- .direction = OMAP1610_GPIO_DIRECTION,
- .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
- .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
- .datain = OMAP1610_GPIO_DATAIN,
- .dataout = OMAP1610_GPIO_DATAOUT,
- .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
- .irqenable = OMAP1610_GPIO_IRQENABLE1,
- .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
- .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
- .ctrl = USHRT_MAX,
- .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
- .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
- .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
- .irqctrl = USHRT_MAX,
- .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
- .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap16xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -240,6 +199,35 @@ static int __init omap16xx_gpio_init(void)
if (!cpu_is_omap16xx())
return -EINVAL;
+ memset(&omap16xx_mpuio_regs, 0xFF, sizeof(omap16xx_mpuio_regs));
+
+ omap16xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL;
+ omap16xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH;
+ omap16xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT;
+ omap16xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT;
+ omap16xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT;
+ omap16xx_mpuio_regs.irqenable_inv = true;
+ omap16xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE;
+
+ memset(&omap16xx_gpio_regs, 0xFF, sizeof(omap16xx_gpio_regs));
+
+ omap16xx_gpio_regs.revision = OMAP1610_GPIO_REVISION;
+ omap16xx_gpio_regs.direction = OMAP1610_GPIO_DIRECTION;
+ omap16xx_gpio_regs.set_dataout = OMAP1610_GPIO_SET_DATAOUT;
+ omap16xx_gpio_regs.clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT;
+ omap16xx_gpio_regs.datain = OMAP1610_GPIO_DATAIN;
+ omap16xx_gpio_regs.dataout = OMAP1610_GPIO_DATAOUT;
+ omap16xx_gpio_regs.irqstatus = OMAP1610_GPIO_IRQSTATUS1;
+ omap16xx_gpio_regs.irqenable = OMAP1610_GPIO_IRQENABLE1;
+ omap16xx_gpio_regs.irqenable_inv = false;
+ omap16xx_gpio_regs.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1;
+ omap16xx_gpio_regs.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1;
+ omap16xx_gpio_regs.wkupstatus = OMAP1610_GPIO_WAKEUPENABLE;
+ omap16xx_gpio_regs.wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA;
+ omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
+ omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
+ omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
+
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index ceac936..b7ae003 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -39,26 +39,7 @@ static struct __initdata resource omap7xx_mpu_gpio_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP_MPUIO_IO_CNTL / 2,
- .datain = OMAP_MPUIO_INPUT_LATCH / 2,
- .dataout = OMAP_MPUIO_OUTPUT / 2,
- .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
- .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap7xx_mpuio_regs;
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
@@ -91,26 +72,7 @@ static struct __initdata resource omap7xx_gpio1_resources[] = {
},
};
-static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
- .revision = USHRT_MAX,
- .direction = OMAP7XX_GPIO_DIR_CONTROL,
- .datain = OMAP7XX_GPIO_DATA_INPUT,
- .dataout = OMAP7XX_GPIO_DATA_OUTPUT,
- .irqstatus = OMAP7XX_GPIO_INT_STATUS,
- .irqenable = OMAP7XX_GPIO_INT_MASK,
- .irqenable_inv = true,
- .ctrl = USHRT_MAX,
- .wkupstatus = USHRT_MAX,
- .wkupclear = USHRT_MAX,
- .wkupset = USHRT_MAX,
- .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
- .edgectrl1 = USHRT_MAX,
- .edgectrl2 = USHRT_MAX,
- .leveldetect0 = USHRT_MAX,
- .leveldetect1 = USHRT_MAX,
- .risingdetect = USHRT_MAX,
- .fallingdetect = USHRT_MAX,
-};
+static struct omap_gpio_reg_offs omap7xx_gpio_regs;
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
@@ -301,6 +263,26 @@ static int __init omap7xx_gpio_init(void)
if (!cpu_is_omap7xx())
return -EINVAL;
+ memset(&omap7xx_mpuio_regs, USHRT_MAX, sizeof(omap7xx_mpuio_regs));
+
+ omap7xx_mpuio_regs.direction = OMAP_MPUIO_IO_CNTL / 2;
+ omap7xx_mpuio_regs.datain = OMAP_MPUIO_INPUT_LATCH / 2;
+ omap7xx_mpuio_regs.dataout = OMAP_MPUIO_OUTPUT / 2;
+ omap7xx_mpuio_regs.irqstatus = OMAP_MPUIO_GPIO_INT / 2;
+ omap7xx_mpuio_regs.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2;
+ omap7xx_mpuio_regs.irqenable_inv = true;
+ omap7xx_mpuio_regs.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2;
+
+ memset(&omap7xx_gpio_regs, USHRT_MAX, sizeof(omap7xx_gpio_regs));
+
+ omap7xx_gpio_regs.direction = OMAP7XX_GPIO_DIR_CONTROL;
+ omap7xx_gpio_regs.datain = OMAP7XX_GPIO_DATA_INPUT;
+ omap7xx_gpio_regs.dataout = OMAP7XX_GPIO_DATA_OUTPUT;
+ omap7xx_gpio_regs.irqstatus = OMAP7XX_GPIO_INT_STATUS;
+ omap7xx_gpio_regs.irqenable = OMAP7XX_GPIO_INT_MASK;
+ omap7xx_gpio_regs.irqenable_inv = true;
+ omap7xx_gpio_regs.irqctrl = OMAP7XX_GPIO_INT_CONTROL;
+
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index eda1846..dce56d9 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -92,9 +92,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
- pdata->regs->irqctrl = USHRT_MAX;
- pdata->regs->edgectrl1 = USHRT_MAX;
- pdata->regs->edgectrl2 = USHRT_MAX;
+ memset(pdata->regs, USHRT_MAX, sizeof(struct omap_gpio_reg_offs));
+ pdata->regs->irqenable_inv = false;
switch (oh->class->rev) {
case 0:
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
-1 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-omap
Cc: khilman, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V,
Tarun Kanti DebBarma
From: Charulatha V <charu@ti.com>
With register offsets now defined for respective OMAP versions
we can get rid of cpu_class_* checks. In addition, organized
common initialization for the different OMAP silicon versions.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio16xx.c | 1 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 74 +++++++++++++-------------------
3 files changed, 32 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 24f6cfa..e9f8abd 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
+ omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index f82881c..ac45191 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
struct omap_gpio_reg_offs {
u16 revision;
+ u16 sysconfig;
u16 direction;
u16 datain;
u16 dataout;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index ebeb16e..3649c74 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
called = true;
}
-/* This lock class tells lockdep that GPIO irqs are in a different
+/*
+ * This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
*/
static struct lock_class_key gpio_lock_class;
-/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
- if (cpu_class_is_omap2()) {
- if (cpu_is_omap44xx()) {
- __raw_writel(0xffffffff, bank->base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writel(0x00000000, bank->base +
- OMAP4_GPIO_DEBOUNCENABLE);
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
- } else if (cpu_is_omap34xx()) {
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0xffffffff, bank->base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
+ if (bank->width == 32) {
+ u32 l = 0;
+
+ if (bank->regs->irqenable_inv)
+ l = ~l;
+ __raw_writel(l, bank->base + bank->regs->irqstatus);
+ __raw_writel(l, bank->base + bank->regs->irqenable);
+
+ if (bank->regs->debounce_en != USHRT_MAX)
+ __raw_writel(l, bank->base + bank->regs->debounce_en);
+
+ if (bank->regs->ctrl != USHRT_MAX)
/* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- }
- } else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank)) {
- __raw_writew(0xffff, bank->base +
- OMAP_MPUIO_GPIO_MASKIT / bank->stride);
+ __raw_writel(l, bank->base + bank->regs->ctrl);
+
+ } else if (bank->width == 16) {
+ u16 l = 0;
+
+ if (bank_is_mpuio(bank))
mpuio_init(bank);
- }
- if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
- __raw_writew(0xffff, bank->base
- + OMAP1510_GPIO_INT_MASK);
- __raw_writew(0x0000, bank->base
- + OMAP1510_GPIO_INT_STATUS);
- }
- if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
- __raw_writew(0x0000, bank->base
- + OMAP1610_GPIO_IRQENABLE1);
- __raw_writew(0xffff, bank->base
- + OMAP1610_GPIO_IRQSTATUS1);
- __raw_writew(0x0014, bank->base
- + OMAP1610_GPIO_SYSCONFIG);
+ if (bank->regs->irqenable_inv)
+ l = ~l;
+
+ __raw_writew(l, bank->base + bank->regs->irqstatus);
+ __raw_writew(l, bank->base + bank->regs->irqenable);
+
+ if (bank->regs->sysconfig != USHRT_MAX) {
+ /* set wakeup-enable and smart-idle */
+ __raw_writew(0x14, bank->base + bank->regs->sysconfig);
/*
* Enable system clock for GPIO module.
* The CAM_CLK_CTRL *is* really the right place.
*/
omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
- ULPD_CAM_CLK_CTRL);
- }
- if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
- __raw_writel(0xffffffff, bank->base
- + OMAP7XX_GPIO_INT_MASK);
- __raw_writel(0x00000000, bank->base
- + OMAP7XX_GPIO_INT_STATUS);
+ ULPD_CAM_CLK_CTRL);
}
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
@ 2011-05-24 14:24 ` Tarun Kanti DebBarma
0 siblings, 0 replies; 118+ messages in thread
From: Tarun Kanti DebBarma @ 2011-05-24 14:24 UTC (permalink / raw)
To: linux-arm-kernel
From: Charulatha V <charu@ti.com>
With register offsets now defined for respective OMAP versions
we can get rid of cpu_class_* checks. In addition, organized
common initialization for the different OMAP silicon versions.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
---
arch/arm/mach-omap1/gpio16xx.c | 1 +
arch/arm/plat-omap/include/plat/gpio.h | 1 +
drivers/gpio/gpio_omap.c | 74 +++++++++++++-------------------
3 files changed, 32 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 24f6cfa..e9f8abd 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
+ omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index f82881c..ac45191 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
struct omap_gpio_reg_offs {
u16 revision;
+ u16 sysconfig;
u16 direction;
u16 datain;
u16 dataout;
diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
index ebeb16e..3649c74 100644
--- a/drivers/gpio/gpio_omap.c
+++ b/drivers/gpio/gpio_omap.c
@@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
called = true;
}
-/* This lock class tells lockdep that GPIO irqs are in a different
+/*
+ * This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
*/
static struct lock_class_key gpio_lock_class;
-/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
- if (cpu_class_is_omap2()) {
- if (cpu_is_omap44xx()) {
- __raw_writel(0xffffffff, bank->base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writel(0x00000000, bank->base +
- OMAP4_GPIO_DEBOUNCENABLE);
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
- } else if (cpu_is_omap34xx()) {
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0xffffffff, bank->base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
+ if (bank->width == 32) {
+ u32 l = 0;
+
+ if (bank->regs->irqenable_inv)
+ l = ~l;
+ __raw_writel(l, bank->base + bank->regs->irqstatus);
+ __raw_writel(l, bank->base + bank->regs->irqenable);
+
+ if (bank->regs->debounce_en != USHRT_MAX)
+ __raw_writel(l, bank->base + bank->regs->debounce_en);
+
+ if (bank->regs->ctrl != USHRT_MAX)
/* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- }
- } else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank)) {
- __raw_writew(0xffff, bank->base +
- OMAP_MPUIO_GPIO_MASKIT / bank->stride);
+ __raw_writel(l, bank->base + bank->regs->ctrl);
+
+ } else if (bank->width == 16) {
+ u16 l = 0;
+
+ if (bank_is_mpuio(bank))
mpuio_init(bank);
- }
- if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
- __raw_writew(0xffff, bank->base
- + OMAP1510_GPIO_INT_MASK);
- __raw_writew(0x0000, bank->base
- + OMAP1510_GPIO_INT_STATUS);
- }
- if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
- __raw_writew(0x0000, bank->base
- + OMAP1610_GPIO_IRQENABLE1);
- __raw_writew(0xffff, bank->base
- + OMAP1610_GPIO_IRQSTATUS1);
- __raw_writew(0x0014, bank->base
- + OMAP1610_GPIO_SYSCONFIG);
+ if (bank->regs->irqenable_inv)
+ l = ~l;
+
+ __raw_writew(l, bank->base + bank->regs->irqstatus);
+ __raw_writew(l, bank->base + bank->regs->irqenable);
+
+ if (bank->regs->sysconfig != USHRT_MAX) {
+ /* set wakeup-enable and smart-idle */
+ __raw_writew(0x14, bank->base + bank->regs->sysconfig);
/*
* Enable system clock for GPIO module.
* The CAM_CLK_CTRL *is* really the right place.
*/
omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
- ULPD_CAM_CLK_CTRL);
- }
- if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
- __raw_writel(0xffffffff, bank->base
- + OMAP7XX_GPIO_INT_MASK);
- __raw_writel(0x00000000, bank->base
- + OMAP7XX_GPIO_INT_STATUS);
+ ULPD_CAM_CLK_CTRL);
}
}
}
--
1.6.0.4
^ permalink raw reply related [flat|nested] 118+ messages in thread
* Re: [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 21:19 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:19 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Remove cpu-is checks while enabling/disabling OMAP GPIO module
> during a gpio request/free.
>
> Signed-off-by: Charulatha V <charu@ti.com>
This looks mostly OK, but one nitpick about the usage of USHRT_MAX.
For most registers, you should just test for a non-zero register offset
to determine if it's present or not instead of USHRT_MAX.
I used USHRT_MAX for the revision register because it is at offset zero
on most SoCs, so testing for non-zero wouldn't work there.
Other than that, the approach looks fine.
Thanks,
Kevin
> ---
> arch/arm/mach-omap1/gpio15xx.c | 2 +
> arch/arm/mach-omap1/gpio16xx.c | 2 +
> arch/arm/mach-omap1/gpio7xx.c | 2 +
> arch/arm/mach-omap2/gpio.c | 2 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 53 ++++++++++++++------------------
> 6 files changed, 32 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index f79c6ae..6d83e0a 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .irqstatus = OMAP1510_GPIO_INT_STATUS,
> .irqenable = OMAP1510_GPIO_INT_MASK,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index c69b3b1..6bba196 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .irqenable = OMAP1610_GPIO_IRQENABLE1,
> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index d7f2ad3..0fc2557 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .irqstatus = OMAP7XX_GPIO_INT_STATUS,
> .irqenable = OMAP7XX_GPIO_INT_MASK,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 9a46d77..0446bd1 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> + pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> break;
> case 2:
> pdata->bank_type = METHOD_GPIO_44XX;
> @@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
> + pdata->regs->ctrl = OMAP4_GPIO_CTRL;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 91e8de3..caf432c 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
> u16 clr_irqenable;
> u16 debounce;
> u16 debounce_en;
> + u16 ctrl;
>
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index a490cb1..dfdc45e 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -89,6 +89,7 @@ int gpio_bank_count;
>
> #define GPIO_INDEX(bank, gpio) (gpio % bank->width)
> #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
> +#define GPIO_MOD_CTRL_BIT BIT(0)
>
> static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
> {
> @@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
> __raw_writel(__raw_readl(reg) | (1 << offset), reg);
> }
> #endif
> - if (!cpu_class_is_omap1()) {
> - if (!bank->mod_usage) {
> - void __iomem *reg = bank->base;
> - u32 ctrl;
> -
> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
> - reg += OMAP24XX_GPIO_CTRL;
> - else if (cpu_is_omap44xx())
> - reg += OMAP4_GPIO_CTRL;
> - ctrl = __raw_readl(reg);
> - /* Module is enabled, clocks are not gated */
> - ctrl &= 0xFFFFFFFE;
> - __raw_writel(ctrl, reg);
> - }
> - bank->mod_usage |= 1 << offset;
> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> + void __iomem *reg = bank->base + bank->regs->ctrl;
> + u32 ctrl;
> +
> + ctrl = __raw_readl(reg);
> + /* Module is enabled, clocks are not gated */
> + ctrl &= ~GPIO_MOD_CTRL_BIT;
> + __raw_writel(ctrl, reg);
> }
> +
> + bank->mod_usage |= 1 << offset;
> +
> spin_unlock_irqrestore(&bank->lock, flags);
>
> return 0;
> @@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
> __raw_writel(1 << offset, reg);
> }
> #endif
> - if (!cpu_class_is_omap1()) {
> - bank->mod_usage &= ~(1 << offset);
> - if (!bank->mod_usage) {
> - void __iomem *reg = bank->base;
> - u32 ctrl;
> -
> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
> - reg += OMAP24XX_GPIO_CTRL;
> - else if (cpu_is_omap44xx())
> - reg += OMAP4_GPIO_CTRL;
> - ctrl = __raw_readl(reg);
> - /* Module is disabled, clocks are gated */
> - ctrl |= 1;
> - __raw_writel(ctrl, reg);
> - }
> + bank->mod_usage &= ~(1 << offset);
> +
> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> + void __iomem *reg = bank->base + bank->regs->ctrl;
> + u32 ctrl;
> +
> + ctrl = __raw_readl(reg);
> + /* Module is disabled, clocks are gated */
> + ctrl |= GPIO_MOD_CTRL_BIT;
> + __raw_writel(ctrl, reg);
> }
> +
> _reset_gpio(bank, bank->chip.base + offset);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
@ 2011-05-25 21:19 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:19 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Remove cpu-is checks while enabling/disabling OMAP GPIO module
> during a gpio request/free.
>
> Signed-off-by: Charulatha V <charu@ti.com>
This looks mostly OK, but one nitpick about the usage of USHRT_MAX.
For most registers, you should just test for a non-zero register offset
to determine if it's present or not instead of USHRT_MAX.
I used USHRT_MAX for the revision register because it is at offset zero
on most SoCs, so testing for non-zero wouldn't work there.
Other than that, the approach looks fine.
Thanks,
Kevin
> ---
> arch/arm/mach-omap1/gpio15xx.c | 2 +
> arch/arm/mach-omap1/gpio16xx.c | 2 +
> arch/arm/mach-omap1/gpio7xx.c | 2 +
> arch/arm/mach-omap2/gpio.c | 2 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 53 ++++++++++++++------------------
> 6 files changed, 32 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index f79c6ae..6d83e0a 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .irqstatus = OMAP1510_GPIO_INT_STATUS,
> .irqenable = OMAP1510_GPIO_INT_MASK,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index c69b3b1..6bba196 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .irqenable = OMAP1610_GPIO_IRQENABLE1,
> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index d7f2ad3..0fc2557 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .irqstatus = OMAP7XX_GPIO_INT_STATUS,
> .irqenable = OMAP7XX_GPIO_INT_MASK,
> .irqenable_inv = true,
> + .ctrl = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 9a46d77..0446bd1 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> + pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> break;
> case 2:
> pdata->bank_type = METHOD_GPIO_44XX;
> @@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
> + pdata->regs->ctrl = OMAP4_GPIO_CTRL;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 91e8de3..caf432c 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
> u16 clr_irqenable;
> u16 debounce;
> u16 debounce_en;
> + u16 ctrl;
>
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index a490cb1..dfdc45e 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -89,6 +89,7 @@ int gpio_bank_count;
>
> #define GPIO_INDEX(bank, gpio) (gpio % bank->width)
> #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
> +#define GPIO_MOD_CTRL_BIT BIT(0)
>
> static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
> {
> @@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
> __raw_writel(__raw_readl(reg) | (1 << offset), reg);
> }
> #endif
> - if (!cpu_class_is_omap1()) {
> - if (!bank->mod_usage) {
> - void __iomem *reg = bank->base;
> - u32 ctrl;
> -
> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
> - reg += OMAP24XX_GPIO_CTRL;
> - else if (cpu_is_omap44xx())
> - reg += OMAP4_GPIO_CTRL;
> - ctrl = __raw_readl(reg);
> - /* Module is enabled, clocks are not gated */
> - ctrl &= 0xFFFFFFFE;
> - __raw_writel(ctrl, reg);
> - }
> - bank->mod_usage |= 1 << offset;
> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> + void __iomem *reg = bank->base + bank->regs->ctrl;
> + u32 ctrl;
> +
> + ctrl = __raw_readl(reg);
> + /* Module is enabled, clocks are not gated */
> + ctrl &= ~GPIO_MOD_CTRL_BIT;
> + __raw_writel(ctrl, reg);
> }
> +
> + bank->mod_usage |= 1 << offset;
> +
> spin_unlock_irqrestore(&bank->lock, flags);
>
> return 0;
> @@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
> __raw_writel(1 << offset, reg);
> }
> #endif
> - if (!cpu_class_is_omap1()) {
> - bank->mod_usage &= ~(1 << offset);
> - if (!bank->mod_usage) {
> - void __iomem *reg = bank->base;
> - u32 ctrl;
> -
> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
> - reg += OMAP24XX_GPIO_CTRL;
> - else if (cpu_is_omap44xx())
> - reg += OMAP4_GPIO_CTRL;
> - ctrl = __raw_readl(reg);
> - /* Module is disabled, clocks are gated */
> - ctrl |= 1;
> - __raw_writel(ctrl, reg);
> - }
> + bank->mod_usage &= ~(1 << offset);
> +
> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> + void __iomem *reg = bank->base + bank->regs->ctrl;
> + u32 ctrl;
> +
> + ctrl = __raw_readl(reg);
> + /* Module is disabled, clocks are gated */
> + ctrl |= GPIO_MOD_CTRL_BIT;
> + __raw_writel(ctrl, reg);
> }
> +
> _reset_gpio(bank, bank->chip.base + offset);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 21:34 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:34 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel,
Charulatha V, Cousson, Benoit, Paul Walmsley
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
Can you cite the documentation you're using for the OMAP3 non-wakeup
GPIOs?
This is a change of functionality from current code, where all OMAP3
GPIOs are considered wakeup capable.
I'd like this to be tackled in two patches. One for the
cleanup/consolidation, and one for change in behavior.
For this cleanup/consolidation (this series), please keep existing
functionality and focus on the cleanup. Then, in an additional patch
(on top of the cleanup/conslidation), change the functionality with a
detailed changelog.
Thanks,
Kevin
> Fix the above by providing non-wakeup GPIO information through pdata
> specific to the SoC.
>
> The GPIO rev id provided in the hwmod database is the same for OMAP2420
> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
> so that it can be used to identify OMAP2420 and OMAP2430.
> OMAP2420 - 0
> OMAP2430 - 1
> OMAP3 - 2
> OMAP4 - 3
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Cc: Cousson, Benoit <b-cousson@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/gpio.c | 26 ++++++++++++++++++++++++--
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 11 +++--------
> 6 files changed, 31 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0446bd1..6cd26b4 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + switch (oh->class->rev) {
> + case 0:
> + if (id == 1)
> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> + pdata->non_wakeup_gpios = 0xe203ffc0;
> + else if (id == 2)
> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> + pdata->non_wakeup_gpios = 0x08700040;
> + break;
> + case 2:
> + if (id == 2)
> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> + pdata->non_wakeup_gpios = 0x00000001;
> + else if (id == 6)
> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> + pdata->non_wakeup_gpios = 0x08000000;
> + break;
> + default:
> + /* No non-wakeup GPIO pins for other SoCs */
> + break;
> + }
> +
> dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
> pdata->bank_width = dev_attr->bank_width;
> pdata->dbck_flag = dev_attr->dbck_flag;
> @@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> switch (oh->class->rev) {
> case 0:
> case 1:
> + case 2:
> pdata->bank_type = METHOD_GPIO_24XX;
> pdata->regs->revision = OMAP24XX_GPIO_REVISION;
> pdata->regs->direction = OMAP24XX_GPIO_OE;
> @@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> break;
> - case 2:
> + case 3:
> pdata->bank_type = METHOD_GPIO_44XX;
> pdata->regs->revision = OMAP4_GPIO_REVISION;
> pdata->regs->direction = OMAP4_GPIO_OE;
> @@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> kfree(pdata);
> return -EINVAL;
> }
> -
> od = omap_device_build(name, id - 1, oh, pdata,
> sizeof(*pdata), omap_gpio_latency,
> ARRAY_SIZE(omap_gpio_latency),
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> index 9682dd5..ae702b5 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> @@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
> static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap243x_gpio_sysc,
> - .rev = 0,
> + .rev = 1,
> };
>
> /* gpio1 */
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 909a84d..05e7005 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
> static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap3xxx_gpio_sysc,
> - .rev = 1,
> + .rev = 2,
> };
>
> /* gpio_dev_attr*/
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index abc548a..ea30752 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
> static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap44xx_gpio_sysc,
> - .rev = 2,
> + .rev = 3,
> };
>
> /* gpio dev_attr */
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index caf432c..8014a8a 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
> int bank_width; /* GPIO bank width */
> int bank_stride; /* Only needed for omap1 MPUIO */
> bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
> + u32 non_wakeup_gpios;
>
> struct omap_gpio_reg_offs *regs;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index dfdc45e..0ba4cdb 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
> }
>
> /* TODO: Cleanup cpu_is_* checks */
> -static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
> +static void omap_gpio_mod_init(struct gpio_bank *bank)
> {
> if (cpu_class_is_omap2()) {
> if (cpu_is_omap44xx()) {
> @@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>
> /* Initialize interface clk ungated, module enabled */
> __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
> - } else if (cpu_is_omap24xx()) {
> - static const u32 non_wakeup_gpios[] = {
> - 0xe203ffc0, 0x08700040
> - };
> - if (id < ARRAY_SIZE(non_wakeup_gpios))
> - bank->non_wakeup_gpios = non_wakeup_gpios[id];
> }
> } else if (cpu_class_is_omap1()) {
> if (bank_is_mpuio(bank))
> @@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> bank->dbck_flag = pdata->dbck_flag;
> bank->stride = pdata->bank_stride;
> bank->width = pdata->bank_width;
> + bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
>
> bank->regs = pdata->regs;
>
> @@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> pm_runtime_enable(bank->dev);
> pm_runtime_get_sync(bank->dev);
>
> - omap_gpio_mod_init(bank, id);
> + omap_gpio_mod_init(bank);
> omap_gpio_chip_init(bank);
> omap_gpio_show_rev(bank);
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-25 21:34 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:34 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
Can you cite the documentation you're using for the OMAP3 non-wakeup
GPIOs?
This is a change of functionality from current code, where all OMAP3
GPIOs are considered wakeup capable.
I'd like this to be tackled in two patches. One for the
cleanup/consolidation, and one for change in behavior.
For this cleanup/consolidation (this series), please keep existing
functionality and focus on the cleanup. Then, in an additional patch
(on top of the cleanup/conslidation), change the functionality with a
detailed changelog.
Thanks,
Kevin
> Fix the above by providing non-wakeup GPIO information through pdata
> specific to the SoC.
>
> The GPIO rev id provided in the hwmod database is the same for OMAP2420
> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
> so that it can be used to identify OMAP2420 and OMAP2430.
> OMAP2420 - 0
> OMAP2430 - 1
> OMAP3 - 2
> OMAP4 - 3
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Cc: Cousson, Benoit <b-cousson@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/gpio.c | 26 ++++++++++++++++++++++++--
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 11 +++--------
> 6 files changed, 31 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0446bd1..6cd26b4 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + switch (oh->class->rev) {
> + case 0:
> + if (id == 1)
> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> + pdata->non_wakeup_gpios = 0xe203ffc0;
> + else if (id == 2)
> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> + pdata->non_wakeup_gpios = 0x08700040;
> + break;
> + case 2:
> + if (id == 2)
> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> + pdata->non_wakeup_gpios = 0x00000001;
> + else if (id == 6)
> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> + pdata->non_wakeup_gpios = 0x08000000;
> + break;
> + default:
> + /* No non-wakeup GPIO pins for other SoCs */
> + break;
> + }
> +
> dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
> pdata->bank_width = dev_attr->bank_width;
> pdata->dbck_flag = dev_attr->dbck_flag;
> @@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> switch (oh->class->rev) {
> case 0:
> case 1:
> + case 2:
> pdata->bank_type = METHOD_GPIO_24XX;
> pdata->regs->revision = OMAP24XX_GPIO_REVISION;
> pdata->regs->direction = OMAP24XX_GPIO_OE;
> @@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> break;
> - case 2:
> + case 3:
> pdata->bank_type = METHOD_GPIO_44XX;
> pdata->regs->revision = OMAP4_GPIO_REVISION;
> pdata->regs->direction = OMAP4_GPIO_OE;
> @@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> kfree(pdata);
> return -EINVAL;
> }
> -
> od = omap_device_build(name, id - 1, oh, pdata,
> sizeof(*pdata), omap_gpio_latency,
> ARRAY_SIZE(omap_gpio_latency),
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> index 9682dd5..ae702b5 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> @@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
> static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap243x_gpio_sysc,
> - .rev = 0,
> + .rev = 1,
> };
>
> /* gpio1 */
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 909a84d..05e7005 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
> static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap3xxx_gpio_sysc,
> - .rev = 1,
> + .rev = 2,
> };
>
> /* gpio_dev_attr*/
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index abc548a..ea30752 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
> static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
> .name = "gpio",
> .sysc = &omap44xx_gpio_sysc,
> - .rev = 2,
> + .rev = 3,
> };
>
> /* gpio dev_attr */
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index caf432c..8014a8a 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
> int bank_width; /* GPIO bank width */
> int bank_stride; /* Only needed for omap1 MPUIO */
> bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
> + u32 non_wakeup_gpios;
>
> struct omap_gpio_reg_offs *regs;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index dfdc45e..0ba4cdb 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
> }
>
> /* TODO: Cleanup cpu_is_* checks */
> -static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
> +static void omap_gpio_mod_init(struct gpio_bank *bank)
> {
> if (cpu_class_is_omap2()) {
> if (cpu_is_omap44xx()) {
> @@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>
> /* Initialize interface clk ungated, module enabled */
> __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
> - } else if (cpu_is_omap24xx()) {
> - static const u32 non_wakeup_gpios[] = {
> - 0xe203ffc0, 0x08700040
> - };
> - if (id < ARRAY_SIZE(non_wakeup_gpios))
> - bank->non_wakeup_gpios = non_wakeup_gpios[id];
> }
> } else if (cpu_class_is_omap1()) {
> if (bank_is_mpuio(bank))
> @@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> bank->dbck_flag = pdata->dbck_flag;
> bank->stride = pdata->bank_stride;
> bank->width = pdata->bank_width;
> + bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
>
> bank->regs = pdata->regs;
>
> @@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> pm_runtime_enable(bank->dev);
> pm_runtime_get_sync(bank->dev);
>
> - omap_gpio_mod_init(bank, id);
> + omap_gpio_mod_init(bank);
> omap_gpio_chip_init(bank);
> omap_gpio_show_rev(bank);
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 04/15] OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 21:40 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:40 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> In omap3, save/restore context is implemented for GPIO
> banks 2-6 as GPIO bank1 is in wakeup domain. Instead
> of identifying bank's power domain by bank id, make use
> of a flag "loses_context" which is filled by
> pwrdm_can_ever_lose_context() during dev_init.
>
> For getting the powerdomain pointer, omap_hwmod_get_pwrdm()
> is used. omap_device_get_pwrdm() could not be used as the
> pwrdm information needs to be filled in pdata, whereas
> omap_device_get_pwrdm() could be used only after
> omap_device_build() call.
>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 04/15] OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO
@ 2011-05-25 21:40 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:40 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> In omap3, save/restore context is implemented for GPIO
> banks 2-6 as GPIO bank1 is in wakeup domain. Instead
> of identifying bank's power domain by bank id, make use
> of a flag "loses_context" which is filled by
> pwrdm_can_ever_lose_context() during dev_init.
>
> For getting the powerdomain pointer, omap_hwmod_get_pwrdm()
> is used. omap_device_get_pwrdm() could not be used as the
> pwrdm information needs to be filled in pdata, whereas
> omap_device_get_pwrdm() could be used only after
> omap_device_build() call.
>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 21:41 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:41 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> gpio_context array, which is used to save gpio bank's context,
> is used only for OMAP3 architecture.
>
> Move gpio_context as part of gpio_bank structure so that
> it can be specific to each gpio bank and can be used for
> any OMAP architecture
>
> TODO: extend the gpio save/restore context function for OMAP4
> architecture. This is done in one of the next patches in this
> series
>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
@ 2011-05-25 21:41 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:41 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> gpio_context array, which is used to save gpio bank's context,
> is used only for OMAP3 architecture.
>
> Move gpio_context as part of gpio_bank structure so that
> it can be specific to each gpio bank and can be used for
> any OMAP architecture
>
> TODO: extend the gpio save/restore context function for OMAP4
> architecture. This is done in one of the next patches in this
> series
>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 06/15] OMAP4: GPIO: Save/restore context
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 21:43 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:43 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Modify the omap_gpio_save/restore_context to support OMAP4
> architecture so that the OMAP GPIO driver need not be modified
> when OMAP4 off mode support is available.
>
> Signed-off-by: Charulatha V <charu@ti.com>
I don't think this patch is needed.
PATCH 11/15 removes everything added in this patch when it moves to
using the register offsets.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 06/15] OMAP4: GPIO: Save/restore context
@ 2011-05-25 21:43 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 21:43 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Modify the omap_gpio_save/restore_context to support OMAP4
> architecture so that the OMAP GPIO driver need not be modified
> when OMAP4 off mode support is available.
>
> Signed-off-by: Charulatha V <charu@ti.com>
I don't think this patch is needed.
PATCH 11/15 removes everything added in this patch when it moves to
using the register offsets.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 22:33 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:33 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
> functions to handle save context & restore context respectively in the
> OMAP GPIO driver itself instead of calling these functions from pm specific
> files. For this, in gpio_prepare_for_idle(), use
> omap_device_get_context_loss_count() and in gpio_resume_after_idle()
> call it again. If the count is different, do restore context.
>
> context lost count is modified in omap_sram_idle() path when
> pwrdm_post_transition() is called. But pwrdm_post_transition() is called
> only after omap_gpio_resume_after_idle() is called. Hence correct this
> so that context lost count is modified before calling
> omap_gpio_resume_after_idle().
This change to modify where pwrdm_post_transition() is called should be
separated out into a dedicated patch.
> omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
> do nothing if none of the GPIOs in a bank is being used.
>
> Also remove usage of cpu_is_* checks from the above mentioned
> functions and fix the multi-line comment style
>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/pm34xx.c | 22 +----
> arch/arm/plat-omap/include/plat/gpio.h | 2 -
> drivers/gpio/gpio_omap.c | 138 +++++++++++++++++---------------
> 3 files changed, 78 insertions(+), 84 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index 0c5e3a4..682d147 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
> static struct powerdomain *core_pwrdm, *per_pwrdm;
> static struct powerdomain *cam_pwrdm;
>
> -static inline void omap3_per_save_context(void)
> -{
> - omap_gpio_save_context();
> -}
> -
> -static inline void omap3_per_restore_context(void)
> -{
> - omap_gpio_restore_context();
> -}
> -
> static void omap3_enable_io_chain(void)
> {
> int timeout = 0;
> @@ -395,8 +385,10 @@ void omap_sram_idle(void)
> if (!is_suspending())
> if (per_next_state < PWRDM_POWER_ON ||
> core_next_state < PWRDM_POWER_ON)
> - if (!console_trylock())
> + if (!console_trylock()) {
> + pwrdm_post_transition();
> goto console_still_active;
> + }
Rather than having to add an extra post_transition call, I think i best
to move the pre_transition call down to just before the following
/* PER */ block.
>
> /* PER */
> if (per_next_state < PWRDM_POWER_ON) {
> @@ -404,8 +396,6 @@ void omap_sram_idle(void)
> omap_uart_prepare_idle(2);
> omap_uart_prepare_idle(3);
> omap2_gpio_prepare_for_idle(per_going_off);
> - if (per_next_state == PWRDM_POWER_OFF)
> - omap3_per_save_context();
> }
>
> /* CORE */
> @@ -467,12 +457,12 @@ void omap_sram_idle(void)
> }
> omap3_intc_resume_idle();
>
> + pwrdm_post_transition();
> +
> /* PER */
> if (per_next_state < PWRDM_POWER_ON) {
> per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
> omap2_gpio_resume_after_idle();
> - if (per_prev_state == PWRDM_POWER_OFF)
> - omap3_per_restore_context();
> omap_uart_resume_idle(2);
> omap_uart_resume_idle(3);
> }
> @@ -490,8 +480,6 @@ console_still_active:
> omap3_disable_io_chain();
> }
>
> - pwrdm_post_transition();
> -
> clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
> }
>
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 64b1ee7..5718a45 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -209,8 +209,6 @@ extern void omap2_gpio_prepare_for_idle(int off_mode);
> extern void omap2_gpio_resume_after_idle(void);
> extern void omap_set_gpio_debounce(int gpio, int enable);
> extern void omap_set_gpio_debounce_time(int gpio, int enable);
> -extern void omap_gpio_save_context(void);
> -extern void omap_gpio_restore_context(void);
> /*-------------------------------------------------------------------------*/
>
> /* Wrappers for "new style" GPIO calls, using the new infrastructure
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 9d55b7d..bc02ec5 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -22,6 +22,8 @@
> #include <linux/slab.h>
> #include <linux/pm_runtime.h>
>
> +#include <plat/omap_device.h>
> +
Should not be needed. More on this below.
> #include <mach/hardware.h>
> #include <asm/irq.h>
> #include <mach/irqs.h>
> @@ -72,6 +74,7 @@ struct gpio_bank {
> bool loses_context;
> int stride;
> u32 width;
> + u32 ctx_lost_cnt_before;
Please call this ctx_loss_count.
> u16 id;
>
> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
> @@ -1310,6 +1313,9 @@ static struct sys_device omap_gpio_device = {
>
> #ifdef CONFIG_ARCH_OMAP2PLUS
>
> +static void omap_gpio_save_context(struct gpio_bank *bank);
> +static void omap_gpio_restore_context(struct gpio_bank *bank);
> +
> static int workaround_enabled;
>
> void omap2_gpio_prepare_for_idle(int off_mode)
> @@ -1318,6 +1324,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> struct gpio_bank *bank;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> + struct platform_device *pdev;
> u32 l1 = 0, l2 = 0;
> int j;
>
> @@ -1334,7 +1341,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> * non-wakeup GPIOs. Otherwise spurious IRQs will be
> * generated. See OMAP2420 Errata item 1.101. */
> if (!(bank->enabled_non_wakeup_gpios))
> - continue;
> + goto save_gpio_ctx;
>
> if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
> bank->saved_datain = __raw_readl(bank->base +
> @@ -1372,6 +1379,12 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> }
>
> c++;
> +
> +save_gpio_ctx:
> + pdev = to_platform_device(bank->dev);
> + bank->ctx_lost_cnt_before =
> + omap_device_get_context_loss_count(pdev);
Drivers should not be directly calling omap_device APIs. Instead,
drivers should use a pdata function pointer to call device specific
code for getting context loss. See OMAP HSMMC driver for an example on
how this is done.
> + omap_gpio_save_context(bank);
> }
> if (!c) {
> workaround_enabled = 0;
> @@ -1385,6 +1398,8 @@ void omap2_gpio_resume_after_idle(void)
> struct gpio_bank *bank;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> + u32 ctx_lost_cnt_after;
> + struct platform_device *pdev;
> u32 l = 0, gen, gen0, gen1;
> int j;
>
> @@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
> for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
> clk_enable(bank->dbck);
>
> - if (!workaround_enabled)
> + pdev = to_platform_device(bank->dev);
> + ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
> +
> + if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
> continue;
>
> + if (!workaround_enabled)
> + goto restore_gpio_ctx;
Now that these functions are all bank-specific, this
'workaround_enabled' flag should be made per-bank.
That being said, do we even need this flag? I think that the
combination of enabled_non_wakeup_gpios and whether or not context has
been lost reflects the same condition.
> if (!(bank->enabled_non_wakeup_gpios))
> - continue;
> + goto restore_gpio_ctx;
>
> if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
> __raw_writel(bank->saved_fallingdetect,
> @@ -1472,117 +1493,104 @@ void omap2_gpio_resume_after_idle(void)
> OMAP4_GPIO_LEVELDETECT1);
> }
> }
> +
> +restore_gpio_ctx:
> + omap_gpio_restore_context(bank);
After considering the placement of the restore context here, I don't
think it's quite right. It is equivalent to current behavior, but I'm
having a hard time understanding how current behavior is actually
working.
Consider the sequence
- prepare for idle
- remove triggering
- save edge-detect registers, then modify them to "workaround" values
- save context (w/ "workaround" edge-detect register values
- WFI, off-mode hit
- wakeup, resume from idle
- write "saved" values to edge-detect registers
- restore context
- here the "workaround" values from the saved context are restored !!!
so the "saved" values are now lost.
For this to be symmetric with the save, I think the restore context
should come before handling the workaround/hack.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
@ 2011-05-25 22:33 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:33 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
> functions to handle save context & restore context respectively in the
> OMAP GPIO driver itself instead of calling these functions from pm specific
> files. For this, in gpio_prepare_for_idle(), use
> omap_device_get_context_loss_count() and in gpio_resume_after_idle()
> call it again. If the count is different, do restore context.
>
> context lost count is modified in omap_sram_idle() path when
> pwrdm_post_transition() is called. But pwrdm_post_transition() is called
> only after omap_gpio_resume_after_idle() is called. Hence correct this
> so that context lost count is modified before calling
> omap_gpio_resume_after_idle().
This change to modify where pwrdm_post_transition() is called should be
separated out into a dedicated patch.
> omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle()
> do nothing if none of the GPIOs in a bank is being used.
>
> Also remove usage of cpu_is_* checks from the above mentioned
> functions and fix the multi-line comment style
>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/pm34xx.c | 22 +----
> arch/arm/plat-omap/include/plat/gpio.h | 2 -
> drivers/gpio/gpio_omap.c | 138 +++++++++++++++++---------------
> 3 files changed, 78 insertions(+), 84 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index 0c5e3a4..682d147 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
> static struct powerdomain *core_pwrdm, *per_pwrdm;
> static struct powerdomain *cam_pwrdm;
>
> -static inline void omap3_per_save_context(void)
> -{
> - omap_gpio_save_context();
> -}
> -
> -static inline void omap3_per_restore_context(void)
> -{
> - omap_gpio_restore_context();
> -}
> -
> static void omap3_enable_io_chain(void)
> {
> int timeout = 0;
> @@ -395,8 +385,10 @@ void omap_sram_idle(void)
> if (!is_suspending())
> if (per_next_state < PWRDM_POWER_ON ||
> core_next_state < PWRDM_POWER_ON)
> - if (!console_trylock())
> + if (!console_trylock()) {
> + pwrdm_post_transition();
> goto console_still_active;
> + }
Rather than having to add an extra post_transition call, I think i best
to move the pre_transition call down to just before the following
/* PER */ block.
>
> /* PER */
> if (per_next_state < PWRDM_POWER_ON) {
> @@ -404,8 +396,6 @@ void omap_sram_idle(void)
> omap_uart_prepare_idle(2);
> omap_uart_prepare_idle(3);
> omap2_gpio_prepare_for_idle(per_going_off);
> - if (per_next_state == PWRDM_POWER_OFF)
> - omap3_per_save_context();
> }
>
> /* CORE */
> @@ -467,12 +457,12 @@ void omap_sram_idle(void)
> }
> omap3_intc_resume_idle();
>
> + pwrdm_post_transition();
> +
> /* PER */
> if (per_next_state < PWRDM_POWER_ON) {
> per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
> omap2_gpio_resume_after_idle();
> - if (per_prev_state == PWRDM_POWER_OFF)
> - omap3_per_restore_context();
> omap_uart_resume_idle(2);
> omap_uart_resume_idle(3);
> }
> @@ -490,8 +480,6 @@ console_still_active:
> omap3_disable_io_chain();
> }
>
> - pwrdm_post_transition();
> -
> clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
> }
>
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 64b1ee7..5718a45 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -209,8 +209,6 @@ extern void omap2_gpio_prepare_for_idle(int off_mode);
> extern void omap2_gpio_resume_after_idle(void);
> extern void omap_set_gpio_debounce(int gpio, int enable);
> extern void omap_set_gpio_debounce_time(int gpio, int enable);
> -extern void omap_gpio_save_context(void);
> -extern void omap_gpio_restore_context(void);
> /*-------------------------------------------------------------------------*/
>
> /* Wrappers for "new style" GPIO calls, using the new infrastructure
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 9d55b7d..bc02ec5 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -22,6 +22,8 @@
> #include <linux/slab.h>
> #include <linux/pm_runtime.h>
>
> +#include <plat/omap_device.h>
> +
Should not be needed. More on this below.
> #include <mach/hardware.h>
> #include <asm/irq.h>
> #include <mach/irqs.h>
> @@ -72,6 +74,7 @@ struct gpio_bank {
> bool loses_context;
> int stride;
> u32 width;
> + u32 ctx_lost_cnt_before;
Please call this ctx_loss_count.
> u16 id;
>
> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
> @@ -1310,6 +1313,9 @@ static struct sys_device omap_gpio_device = {
>
> #ifdef CONFIG_ARCH_OMAP2PLUS
>
> +static void omap_gpio_save_context(struct gpio_bank *bank);
> +static void omap_gpio_restore_context(struct gpio_bank *bank);
> +
> static int workaround_enabled;
>
> void omap2_gpio_prepare_for_idle(int off_mode)
> @@ -1318,6 +1324,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> struct gpio_bank *bank;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> + struct platform_device *pdev;
> u32 l1 = 0, l2 = 0;
> int j;
>
> @@ -1334,7 +1341,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> * non-wakeup GPIOs. Otherwise spurious IRQs will be
> * generated. See OMAP2420 Errata item 1.101. */
> if (!(bank->enabled_non_wakeup_gpios))
> - continue;
> + goto save_gpio_ctx;
>
> if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
> bank->saved_datain = __raw_readl(bank->base +
> @@ -1372,6 +1379,12 @@ void omap2_gpio_prepare_for_idle(int off_mode)
> }
>
> c++;
> +
> +save_gpio_ctx:
> + pdev = to_platform_device(bank->dev);
> + bank->ctx_lost_cnt_before =
> + omap_device_get_context_loss_count(pdev);
Drivers should not be directly calling omap_device APIs. Instead,
drivers should use a pdata function pointer to call device specific
code for getting context loss. See OMAP HSMMC driver for an example on
how this is done.
> + omap_gpio_save_context(bank);
> }
> if (!c) {
> workaround_enabled = 0;
> @@ -1385,6 +1398,8 @@ void omap2_gpio_resume_after_idle(void)
> struct gpio_bank *bank;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> + u32 ctx_lost_cnt_after;
> + struct platform_device *pdev;
> u32 l = 0, gen, gen0, gen1;
> int j;
>
> @@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
> for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
> clk_enable(bank->dbck);
>
> - if (!workaround_enabled)
> + pdev = to_platform_device(bank->dev);
> + ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
> +
> + if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
> continue;
>
> + if (!workaround_enabled)
> + goto restore_gpio_ctx;
Now that these functions are all bank-specific, this
'workaround_enabled' flag should be made per-bank.
That being said, do we even need this flag? I think that the
combination of enabled_non_wakeup_gpios and whether or not context has
been lost reflects the same condition.
> if (!(bank->enabled_non_wakeup_gpios))
> - continue;
> + goto restore_gpio_ctx;
>
> if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
> __raw_writel(bank->saved_fallingdetect,
> @@ -1472,117 +1493,104 @@ void omap2_gpio_resume_after_idle(void)
> OMAP4_GPIO_LEVELDETECT1);
> }
> }
> +
> +restore_gpio_ctx:
> + omap_gpio_restore_context(bank);
After considering the placement of the restore context here, I don't
think it's quite right. It is equivalent to current behavior, but I'm
having a hard time understanding how current behavior is actually
working.
Consider the sequence
- prepare for idle
- remove triggering
- save edge-detect registers, then modify them to "workaround" values
- save context (w/ "workaround" edge-detect register values
- WFI, off-mode hit
- wakeup, resume from idle
- write "saved" values to edge-detect registers
- restore context
- here the "workaround" values from the saved context are restored !!!
so the "saved" values are now lost.
For this to be symmetric with the save, I think the restore context
should come before handling the workaround/hack.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
2011-05-25 22:33 ` Kevin Hilman
@ 2011-05-25 22:36 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:36 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Kevin Hilman <khilman@ti.com> writes:
[...]
>> @@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
>> for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
>> clk_enable(bank->dbck);
>>
>> - if (!workaround_enabled)
>> + pdev = to_platform_device(bank->dev);
>> + ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
>> +
>> + if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
>> continue;
>>
>> + if (!workaround_enabled)
>> + goto restore_gpio_ctx;
>
> Now that these functions are all bank-specific, this
> 'workaround_enabled' flag should be made per-bank.
Oops, ignore this comment... I see it's done in the next patch.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver
@ 2011-05-25 22:36 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:36 UTC (permalink / raw)
To: linux-arm-kernel
Kevin Hilman <khilman@ti.com> writes:
[...]
>> @@ -1394,11 +1409,17 @@ void omap2_gpio_resume_after_idle(void)
>> for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
>> clk_enable(bank->dbck);
>>
>> - if (!workaround_enabled)
>> + pdev = to_platform_device(bank->dev);
>> + ctx_lost_cnt_after = omap_device_get_context_loss_count(pdev);
>> +
>> + if (ctx_lost_cnt_after == bank->ctx_lost_cnt_before)
>> continue;
>>
>> + if (!workaround_enabled)
>> + goto restore_gpio_ctx;
>
> Now that these functions are all bank-specific, this
> 'workaround_enabled' flag should be made per-bank.
Oops, ignore this comment... I see it's done in the next patch.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 22:39 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:39 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Make workaround_enabled flag bank-specific instead of using a single
> flag for all the banks together. This would be helpful while making
> use of runtime framework in OMAP GPIO driver which would make the
> driver handle each GPIO bank independently.
>
> Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
Do we even need a dedicated flag for this?
I seems that the combination of enabled_non_wakeup_gpios and whether or
not context has been lost could be used to check this condition.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
@ 2011-05-25 22:39 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:39 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Make workaround_enabled flag bank-specific instead of using a single
> flag for all the banks together. This would be helpful while making
> use of runtime framework in OMAP GPIO driver which would make the
> driver handle each GPIO bank independently.
>
> Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
Do we even need a dedicated flag for this?
I seems that the combination of enabled_non_wakeup_gpios and whether or
not context has been lost could be used to check this condition.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 22:57 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:57 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> Since wake_status, wake_clear, wake_set is common for all banks on a given
> OMAP version it is enough to get their values once during probe().
> Also, register offsets are already initialzed according to OMAP versions
> during device registration. We no longer need these explicit checks.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap1/gpio15xx.c | 6 ++
> arch/arm/mach-omap1/gpio16xx.c | 6 ++
> arch/arm/mach-omap1/gpio7xx.c | 6 ++
> arch/arm/mach-omap2/gpio.c | 6 ++
> arch/arm/plat-omap/include/plat/gpio.h | 3 +
> drivers/gpio/gpio_omap.c | 102 +++++++-------------------------
> 6 files changed, 49 insertions(+), 80 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index f18a4a9..b0bd21e 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
Same comment as earlier about USHRT_MAX.
Just use zero to indicate no register present.
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .irqenable = OMAP1510_GPIO_INT_MASK,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index d886b88..403437b 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
> .ctrl = USHRT_MAX,
> + .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
> + .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
> + .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index c7684ce..d5a4aaf 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .irqenable = OMAP7XX_GPIO_INT_MASK,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0782e06..7e79999 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> + pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
> + pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
> + pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
> break;
> case 3:
> pdata->bank_type = METHOD_GPIO_44XX;
> @@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
> pdata->regs->ctrl = OMAP4_GPIO_CTRL;
> + pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 5718a45..2d1a5d6 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
> u16 debounce;
> u16 debounce_en;
> u16 ctrl;
> + u16 wkupstatus;
> + u16 wkupclear;
> + u16 wkupset;
s/wkup/wkup_/
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index fcc60be..c189416 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -77,6 +77,9 @@ struct gpio_bank {
> u32 width;
> u32 ctx_lost_cnt_before;
> u16 id;
> + void __iomem *wake_status;
> + void __iomem *wake_clear;
> + void __iomem *wake_set;
>
> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
>
> @@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
> unsigned long flags;
>
> spin_lock_irqsave(&bank->lock, flags);
> -#ifdef CONFIG_ARCH_OMAP16XX
> - if (bank->method == METHOD_GPIO_1610) {
> - /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - if (bank->method == METHOD_GPIO_24XX) {
> - /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - if (bank->method == METHOD_GPIO_44XX) {
> +
> + if (bank->regs->wkupclear != USHRT_MAX)
Here you check the 'regs' version...
> /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> + __raw_writel(1 << offset, bank->wake_clear);
> +
...and here you write using the copy. Not good for readability. More
on this below.
> bank->mod_usage &= ~(1 << offset);
>
> if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> @@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> goto err_free;
> }
>
> + /*
> + * Storing these addresses avoids redundant computation of these
> + * values every time in suspend/resume functions and for all the
> + * gpio banks.
> + */
> + bank->wake_status = bank->base + bank->regs->wkupstatus;
> + bank->wake_clear = bank->base + bank->regs->wkupclear;
> + bank->wake_set = bank->base + bank->regs->wkupset;
Well, it's not really redundant since these are only used in the suspend
and resume functions. I'd rather have an extra add in the
suspend/resume functions than have 3 extra words in every struct gpio_bank.
Also, Using 'bank + reg offset' in the functions that use them is
consistent with the pattern of all the other changes in the cleanup
series, so lets not start something new.
> pm_runtime_enable(bank->dev);
> pm_runtime_get_sync(bank->dev);
>
> @@ -1207,7 +1203,7 @@ err_exit:
> }
>
> #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
> -static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> +static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
change not related to $SUBJECT patch
> {
> struct gpio_bank *bank;
>
> @@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> return 0;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> - void __iomem *wake_status;
> - void __iomem *wake_clear;
> - void __iomem *wake_set;
IMO, these should stay here and should just be assigned 'bank->base +
bank->regs->...'
> unsigned long flags;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> - wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - case METHOD_GPIO_24XX:
> - wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - case METHOD_GPIO_44XX:
> - wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - break;
> -#endif
> - default:
> - continue;
> - }
> -
> spin_lock_irqsave(&bank->lock, flags);
> - bank->saved_wakeup = __raw_readl(wake_status);
> - __raw_writel(0xffffffff, wake_clear);
> - __raw_writel(bank->suspend_wakeup, wake_set);
> + bank->saved_wakeup = __raw_readl(bank->wake_status);
> + __raw_writel(0xffffffff, bank->wake_clear);
> + __raw_writel(bank->suspend_wakeup, bank->wake_set);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
> @@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
> return 0;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> - void __iomem *wake_clear;
> - void __iomem *wake_set;
> unsigned long flags;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - case METHOD_GPIO_24XX:
> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - case METHOD_GPIO_44XX:
> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - break;
> -#endif
> - default:
> - continue;
> - }
> -
> spin_lock_irqsave(&bank->lock, flags);
> - __raw_writel(0xffffffff, wake_clear);
> - __raw_writel(bank->saved_wakeup, wake_set);
> + __raw_writel(0xffffffff, bank->wake_clear);
> + __raw_writel(bank->saved_wakeup, bank->wake_set);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
In addition, the cpu_is_* checks in the suspend/resume functions could
be replaced by checking for non-zero values in bank->regs->wkup*
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
@ 2011-05-25 22:57 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 22:57 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> Since wake_status, wake_clear, wake_set is common for all banks on a given
> OMAP version it is enough to get their values once during probe().
> Also, register offsets are already initialzed according to OMAP versions
> during device registration. We no longer need these explicit checks.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap1/gpio15xx.c | 6 ++
> arch/arm/mach-omap1/gpio16xx.c | 6 ++
> arch/arm/mach-omap1/gpio7xx.c | 6 ++
> arch/arm/mach-omap2/gpio.c | 6 ++
> arch/arm/plat-omap/include/plat/gpio.h | 3 +
> drivers/gpio/gpio_omap.c | 102 +++++++-------------------------
> 6 files changed, 49 insertions(+), 80 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index f18a4a9..b0bd21e 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
Same comment as earlier about USHRT_MAX.
Just use zero to indicate no register present.
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .irqenable = OMAP1510_GPIO_INT_MASK,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index d886b88..403437b 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
> .ctrl = USHRT_MAX,
> + .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
> + .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
> + .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index c7684ce..d5a4aaf 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .irqenable = OMAP7XX_GPIO_INT_MASK,
> .irqenable_inv = true,
> .ctrl = USHRT_MAX,
> + .wkupstatus = USHRT_MAX,
> + .wkupclear = USHRT_MAX,
> + .wkupset = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0782e06..7e79999 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
> + pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
> + pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
> + pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
> break;
> case 3:
> pdata->bank_type = METHOD_GPIO_44XX;
> @@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
> pdata->regs->ctrl = OMAP4_GPIO_CTRL;
> + pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 5718a45..2d1a5d6 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
> u16 debounce;
> u16 debounce_en;
> u16 ctrl;
> + u16 wkupstatus;
> + u16 wkupclear;
> + u16 wkupset;
s/wkup/wkup_/
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index fcc60be..c189416 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -77,6 +77,9 @@ struct gpio_bank {
> u32 width;
> u32 ctx_lost_cnt_before;
> u16 id;
> + void __iomem *wake_status;
> + void __iomem *wake_clear;
> + void __iomem *wake_set;
>
> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
>
> @@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
> unsigned long flags;
>
> spin_lock_irqsave(&bank->lock, flags);
> -#ifdef CONFIG_ARCH_OMAP16XX
> - if (bank->method == METHOD_GPIO_1610) {
> - /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - if (bank->method == METHOD_GPIO_24XX) {
> - /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - if (bank->method == METHOD_GPIO_44XX) {
> +
> + if (bank->regs->wkupclear != USHRT_MAX)
Here you check the 'regs' version...
> /* Disable wake-up during idle for dynamic tick */
> - void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - __raw_writel(1 << offset, reg);
> - }
> -#endif
> + __raw_writel(1 << offset, bank->wake_clear);
> +
...and here you write using the copy. Not good for readability. More
on this below.
> bank->mod_usage &= ~(1 << offset);
>
> if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
> @@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> goto err_free;
> }
>
> + /*
> + * Storing these addresses avoids redundant computation of these
> + * values every time in suspend/resume functions and for all the
> + * gpio banks.
> + */
> + bank->wake_status = bank->base + bank->regs->wkupstatus;
> + bank->wake_clear = bank->base + bank->regs->wkupclear;
> + bank->wake_set = bank->base + bank->regs->wkupset;
Well, it's not really redundant since these are only used in the suspend
and resume functions. I'd rather have an extra add in the
suspend/resume functions than have 3 extra words in every struct gpio_bank.
Also, Using 'bank + reg offset' in the functions that use them is
consistent with the pattern of all the other changes in the cleanup
series, so lets not start something new.
> pm_runtime_enable(bank->dev);
> pm_runtime_get_sync(bank->dev);
>
> @@ -1207,7 +1203,7 @@ err_exit:
> }
>
> #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
> -static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> +static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
change not related to $SUBJECT patch
> {
> struct gpio_bank *bank;
>
> @@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
> return 0;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> - void __iomem *wake_status;
> - void __iomem *wake_clear;
> - void __iomem *wake_set;
IMO, these should stay here and should just be assigned 'bank->base +
bank->regs->...'
> unsigned long flags;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> - wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - case METHOD_GPIO_24XX:
> - wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - case METHOD_GPIO_44XX:
> - wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - break;
> -#endif
> - default:
> - continue;
> - }
> -
> spin_lock_irqsave(&bank->lock, flags);
> - bank->saved_wakeup = __raw_readl(wake_status);
> - __raw_writel(0xffffffff, wake_clear);
> - __raw_writel(bank->suspend_wakeup, wake_set);
> + bank->saved_wakeup = __raw_readl(bank->wake_status);
> + __raw_writel(0xffffffff, bank->wake_clear);
> + __raw_writel(bank->suspend_wakeup, bank->wake_set);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
> @@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
> return 0;
>
> list_for_each_entry(bank, &omap_gpio_list, node) {
> - void __iomem *wake_clear;
> - void __iomem *wake_set;
> unsigned long flags;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
> - case METHOD_GPIO_24XX:
> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP4
> - case METHOD_GPIO_44XX:
> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
> - break;
> -#endif
> - default:
> - continue;
> - }
> -
> spin_lock_irqsave(&bank->lock, flags);
> - __raw_writel(0xffffffff, wake_clear);
> - __raw_writel(bank->saved_wakeup, wake_set);
> + __raw_writel(0xffffffff, bank->wake_clear);
> + __raw_writel(bank->saved_wakeup, bank->wake_set);
> spin_unlock_irqrestore(&bank->lock, flags);
> }
In addition, the cpu_is_* checks in the suspend/resume functions could
be replaced by checking for non-zero values in bank->regs->wkup*
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 10/15] OMAP: GPIO: cleanup prepare/resume idle functions
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:00 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:00 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> By adding level and edge detection register offsets and then initializing them
> correctly according to OMAP versions during device registrations we can now remove
> lot of revision checks in these functions.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 10/15] OMAP: GPIO: cleanup prepare/resume idle functions
@ 2011-05-25 23:00 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:00 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> By adding level and edge detection register offsets and then initializing them
> correctly according to OMAP versions during device registrations we can now remove
> lot of revision checks in these functions.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:01 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:01 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> It is not required to use hard-coded offsets any more in context
> save and restore functions and instead use the generic offsets
> which have been correctly initialized during device registration.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
I suggest you move this and all the other patches that just change to using
regsister offsets earlier in the series.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
@ 2011-05-25 23:01 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:01 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> It is not required to use hard-coded offsets any more in context
> save and restore functions and instead use the generic offsets
> which have been correctly initialized during device registration.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
Looks good.
I suggest you move this and all the other patches that just change to using
regsister offsets earlier in the series.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:14 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:14 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
> is set for all type of GPIO triggers whereas as per TRM the GPIO
> wakeup request can only be generated on edge transitions. Fix this.
OK. Please make a dedicated patch for this part.
Subject: GPIO: OMAP: IRQ triggering: use wake set/clear regs
> In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
> is used for wakeup request and the GPIO set/clear wakeup registers
> are not used in OMAP4 but is handled without retaining it's old
> value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
> register by writing the value of the last requested GPIO pin in
> a given bank. This can be avoided by making use of GPIO set/clear
> wakeup registers.
And this should be a separate patch too, or probably folded into PATCH
09/15 with an updated changelog of course.
Kevin
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/gpio.c | 4 ++--
> drivers/gpio/gpio_omap.c | 32 ++++++++++----------------------
> 2 files changed, 12 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 5c888dd..fbedbbb 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
> pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
> pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
> - pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
> - pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
> + pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 05c2857..762d73c 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
> trigger & IRQ_TYPE_EDGE_FALLING);
> }
> +
> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
> - if (cpu_is_omap44xx()) {
> - if (trigger != 0)
> - __raw_writel(1 << gpio, bank->base+
> - OMAP4_GPIO_IRQWAKEN0);
> - else {
> - val = __raw_readl(bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - __raw_writel(val & (~(1 << gpio)), bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - }
> - } else {
> - /*
> - * GPIO wakeup request can only be generated on edge
> - * transitions
> - */
> - if (trigger & IRQ_TYPE_EDGE_BOTH)
> - __raw_writel(1 << gpio, bank->base
> - + OMAP24XX_GPIO_SETWKUENA);
> - else
> - __raw_writel(1 << gpio, bank->base
> - + OMAP24XX_GPIO_CLEARWKUENA);
> - }
> + /*
> + * GPIO wakeup request can only be generated on edge
> + * transitions
> + */
> + if (trigger & IRQ_TYPE_EDGE_BOTH)
> + __raw_writel(1 << gpio, bank->wake_set);
> + else
> + __raw_writel(1 << gpio, bank->wake_clear);
> }
> +
> /* This part needs to be executed always for OMAP34xx */
> if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
> /*
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
@ 2011-05-25 23:14 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:14 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
> is set for all type of GPIO triggers whereas as per TRM the GPIO
> wakeup request can only be generated on edge transitions. Fix this.
OK. Please make a dedicated patch for this part.
Subject: GPIO: OMAP: IRQ triggering: use wake set/clear regs
> In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
> is used for wakeup request and the GPIO set/clear wakeup registers
> are not used in OMAP4 but is handled without retaining it's old
> value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
> register by writing the value of the last requested GPIO pin in
> a given bank. This can be avoided by making use of GPIO set/clear
> wakeup registers.
And this should be a separate patch too, or probably folded into PATCH
09/15 with an updated changelog of course.
Kevin
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/gpio.c | 4 ++--
> drivers/gpio/gpio_omap.c | 32 ++++++++++----------------------
> 2 files changed, 12 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 5c888dd..fbedbbb 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
> pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
> pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
> - pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
> - pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
> + pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
> + pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
> break;
> default:
> WARN(1, "Invalid gpio bank_type\n");
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 05c2857..762d73c 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
> trigger & IRQ_TYPE_EDGE_FALLING);
> }
> +
> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
> - if (cpu_is_omap44xx()) {
> - if (trigger != 0)
> - __raw_writel(1 << gpio, bank->base+
> - OMAP4_GPIO_IRQWAKEN0);
> - else {
> - val = __raw_readl(bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - __raw_writel(val & (~(1 << gpio)), bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - }
> - } else {
> - /*
> - * GPIO wakeup request can only be generated on edge
> - * transitions
> - */
> - if (trigger & IRQ_TYPE_EDGE_BOTH)
> - __raw_writel(1 << gpio, bank->base
> - + OMAP24XX_GPIO_SETWKUENA);
> - else
> - __raw_writel(1 << gpio, bank->base
> - + OMAP24XX_GPIO_CLEARWKUENA);
> - }
> + /*
> + * GPIO wakeup request can only be generated on edge
> + * transitions
> + */
> + if (trigger & IRQ_TYPE_EDGE_BOTH)
> + __raw_writel(1 << gpio, bank->wake_set);
> + else
> + __raw_writel(1 << gpio, bank->wake_clear);
> }
> +
> /* This part needs to be executed always for OMAP34xx */
> if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
> /*
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:27 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:27 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Getting rid of ifdefs within the function by adding register offset intctrl
> and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> ---
> arch/arm/mach-omap1/gpio15xx.c | 14 ++++
> arch/arm/mach-omap1/gpio16xx.c | 14 ++++
> arch/arm/mach-omap1/gpio7xx.c | 14 ++++
> arch/arm/mach-omap2/gpio.c | 4 +
> arch/arm/plat-omap/include/plat/gpio.h | 3 +
> drivers/gpio/gpio_omap.c | 125 +++++++-------------------------
> 6 files changed, 77 insertions(+), 97 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index b0bd21e..ceee046 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
As before, drop the USHRT_MAX and just use non-zer value to determine if
register exists.
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP1510_GPIO_INT_CONTROL,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index 403437b..b2479c5 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
> .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
> .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
> + .irqctrl = USHRT_MAX,
> + .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
> + .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index d5a4aaf..ceac936 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index fbedbbb..eda1846 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + pdata->regs->irqctrl = USHRT_MAX;
> + pdata->regs->edgectrl1 = USHRT_MAX;
> + pdata->regs->edgectrl2 = USHRT_MAX;
> +
> switch (oh->class->rev) {
> case 0:
> case 1:
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index a341790..f82881c 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
> u16 wkupstatus;
> u16 wkupclear;
> u16 wkupset;
> + u16 irqctrl;
> + u16 edgectrl1;
> + u16 edgectrl2;
>
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 762d73c..ebeb16e 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
> __raw_writel(val, reg);
> }
>
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> -static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> +static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
> int trigger)
> {
> void __iomem *base = bank->base;
> u32 gpio_bit = 1 << gpio;
> - u32 val;
>
> - if (cpu_is_omap44xx()) {
> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
> + MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
> trigger & IRQ_TYPE_LEVEL_LOW);
> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
> + MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
> trigger & IRQ_TYPE_LEVEL_HIGH);
> - MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
> + MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
> trigger & IRQ_TYPE_EDGE_RISING);
> - MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
> + MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
> trigger & IRQ_TYPE_EDGE_FALLING);
> - } else {
> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
> - trigger & IRQ_TYPE_LEVEL_LOW);
> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
> - trigger & IRQ_TYPE_LEVEL_HIGH);
> - MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
> - trigger & IRQ_TYPE_EDGE_RISING);
> - MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
> - trigger & IRQ_TYPE_EDGE_FALLING);
> - }
>
> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
> /*
> @@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> __raw_readl(bank->base + bank->regs->leveldetect0) |
> __raw_readl(bank->base + bank->regs->leveldetect1);
> }
> -#endif
>
> -#ifdef CONFIG_ARCH_OMAP1
> /*
> * This only applies to chips that can't do both rising and falling edge
> * detection at once. For all other chips, this function is a noop.
> */
> static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
> {
> - void __iomem *reg = bank->base;
> + void __iomem *reg = bank->base + bank->regs->irqctrl;
> u32 l = 0;
Need to check for valid regs->irqctrl here.
> - switch (bank->method) {
> - case METHOD_MPUIO:
> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
> - break;
> -#ifdef CONFIG_ARCH_OMAP15XX
> - case METHOD_GPIO_1510:
> - reg += OMAP1510_GPIO_INT_CONTROL;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
> - case METHOD_GPIO_7XX:
> - reg += OMAP7XX_GPIO_INT_CONTROL;
> - break;
> -#endif
> - default:
> - return;
> - }
> -
> l = __raw_readl(reg);
> if ((l >> gpio) & 1)
> l &= ~(1 << gpio);
> @@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>
> __raw_writel(l, reg);
> }
> -#endif
>
> static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> {
> void __iomem *reg = bank->base;
> u32 l = 0;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP1
> - case METHOD_MPUIO:
> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
> - l = __raw_readl(reg);
> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> - bank->toggle_mask |= 1 << gpio;
> - if (trigger & IRQ_TYPE_EDGE_RISING)
> - l |= 1 << gpio;
> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
> - l &= ~(1 << gpio);
> - else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP15XX
> - case METHOD_GPIO_1510:
> - reg += OMAP1510_GPIO_INT_CONTROL;
> + if ((bank->regs->leveldetect0 != USHRT_MAX) &&
> + (bank->regs->wkupstatus != USHRT_MAX)) {
> + set_gpio_trigger(bank, gpio, trigger);
> + } else if (bank->regs->irqctrl != USHRT_MAX) {
> + reg += bank->regs->irqctrl;
> +
> l = __raw_readl(reg);
> if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> bank->toggle_mask |= 1 << gpio;
> @@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> else if (trigger & IRQ_TYPE_EDGE_FALLING)
> l &= ~(1 << gpio);
> else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> + return -EINVAL;
> +
> + __raw_writel(l, reg);
> +
> + } else if (bank->regs->edgectrl1 != USHRT_MAX) {
> if (gpio & 0x08)
> - reg += OMAP1610_GPIO_EDGE_CTRL2;
> + reg += bank->regs->edgectrl2;
> else
> - reg += OMAP1610_GPIO_EDGE_CTRL1;
> + reg += bank->regs->edgectrl1;
> +
> gpio &= 0x07;
> l = __raw_readl(reg);
> l &= ~(3 << (gpio << 1));
> @@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> l |= 2 << (gpio << 1);
> if (trigger & IRQ_TYPE_EDGE_FALLING)
> l |= 1 << (gpio << 1);
> +
> if (trigger)
> /* Enable wake-up during idle for dynamic tick */
> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
> - else
> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
> - case METHOD_GPIO_7XX:
> - reg += OMAP7XX_GPIO_INT_CONTROL;
> - l = __raw_readl(reg);
> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> - bank->toggle_mask |= 1 << gpio;
> - if (trigger & IRQ_TYPE_EDGE_RISING)
> - l |= 1 << gpio;
> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
> - l &= ~(1 << gpio);
> + __raw_writel(1 << gpio, bank->wake_set);
> else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> - case METHOD_GPIO_24XX:
> - case METHOD_GPIO_44XX:
> - set_24xx_gpio_triggering(bank, gpio, trigger);
> - return 0;
> -#endif
> - default:
> - goto bad;
> + __raw_writel(1 << gpio, bank->wake_clear);
> +
> + __raw_writel(l, reg);
> }
> - __raw_writel(l, reg);
> +
> return 0;
> -bad:
> - return -EINVAL;
> }
>
> static int gpio_irq_type(struct irq_data *d, unsigned type)
> @@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
> if (!(isr & 1))
> continue;
>
> -#ifdef CONFIG_ARCH_OMAP1
> /*
> * Some chips can't respond to both rising and falling
> * at the same time. If this irq was requested with
> @@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
> * to respond to the IRQ for the opposite direction.
> * This will be indicated in the bank toggle_mask.
> */
> - if (bank->toggle_mask & (1 << gpio_index))
> + if ((bank->regs->irqctrl != USHRT_MAX) &&
The valid register check belongs in function, not here.
> + (bank->toggle_mask & (1 << gpio_index)))
> _toggle_gpio_edge_triggering(bank, gpio_index);
> -#endif
This change isn't quite right, as we don't want (or need) do do this on
OMAP2+. This really is an OMAP1-specific hack.
For the purposes of this patch, leave the OMAP1 #ifdef. Then, in a
subsequent patch, add another per-bank flag (passed in from pdata) that
indicates whether we want to use this hack, and enable it for
OMAP1-based platforms.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
@ 2011-05-25 23:27 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:27 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Getting rid of ifdefs within the function by adding register offset intctrl
> and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> ---
> arch/arm/mach-omap1/gpio15xx.c | 14 ++++
> arch/arm/mach-omap1/gpio16xx.c | 14 ++++
> arch/arm/mach-omap1/gpio7xx.c | 14 ++++
> arch/arm/mach-omap2/gpio.c | 4 +
> arch/arm/plat-omap/include/plat/gpio.h | 3 +
> drivers/gpio/gpio_omap.c | 125 +++++++-------------------------
> 6 files changed, 77 insertions(+), 97 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
> index b0bd21e..ceee046 100644
> --- a/arch/arm/mach-omap1/gpio15xx.c
> +++ b/arch/arm/mach-omap1/gpio15xx.c
> @@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
As before, drop the USHRT_MAX and just use non-zer value to determine if
register exists.
> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
> @@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP1510_GPIO_INT_CONTROL,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index 403437b..b2479c5 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
> @@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
> .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
> .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
> + .irqctrl = USHRT_MAX,
> + .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
> + .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
> index d5a4aaf..ceac936 100644
> --- a/arch/arm/mach-omap1/gpio7xx.c
> +++ b/arch/arm/mach-omap1/gpio7xx.c
> @@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
> @@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
> .wkupstatus = USHRT_MAX,
> .wkupclear = USHRT_MAX,
> .wkupset = USHRT_MAX,
> + .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
> + .edgectrl1 = USHRT_MAX,
> + .edgectrl2 = USHRT_MAX,
> + .leveldetect0 = USHRT_MAX,
> + .leveldetect1 = USHRT_MAX,
> + .risingdetect = USHRT_MAX,
> + .fallingdetect = USHRT_MAX,
> };
>
> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index fbedbbb..eda1846 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + pdata->regs->irqctrl = USHRT_MAX;
> + pdata->regs->edgectrl1 = USHRT_MAX;
> + pdata->regs->edgectrl2 = USHRT_MAX;
> +
> switch (oh->class->rev) {
> case 0:
> case 1:
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index a341790..f82881c 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
> u16 wkupstatus;
> u16 wkupclear;
> u16 wkupset;
> + u16 irqctrl;
> + u16 edgectrl1;
> + u16 edgectrl2;
>
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 762d73c..ebeb16e 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
> __raw_writel(val, reg);
> }
>
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> -static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> +static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
> int trigger)
> {
> void __iomem *base = bank->base;
> u32 gpio_bit = 1 << gpio;
> - u32 val;
>
> - if (cpu_is_omap44xx()) {
> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
> + MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
> trigger & IRQ_TYPE_LEVEL_LOW);
> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
> + MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
> trigger & IRQ_TYPE_LEVEL_HIGH);
> - MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
> + MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
> trigger & IRQ_TYPE_EDGE_RISING);
> - MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
> + MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
> trigger & IRQ_TYPE_EDGE_FALLING);
> - } else {
> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
> - trigger & IRQ_TYPE_LEVEL_LOW);
> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
> - trigger & IRQ_TYPE_LEVEL_HIGH);
> - MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
> - trigger & IRQ_TYPE_EDGE_RISING);
> - MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
> - trigger & IRQ_TYPE_EDGE_FALLING);
> - }
>
> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
> /*
> @@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
> __raw_readl(bank->base + bank->regs->leveldetect0) |
> __raw_readl(bank->base + bank->regs->leveldetect1);
> }
> -#endif
>
> -#ifdef CONFIG_ARCH_OMAP1
> /*
> * This only applies to chips that can't do both rising and falling edge
> * detection at once. For all other chips, this function is a noop.
> */
> static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
> {
> - void __iomem *reg = bank->base;
> + void __iomem *reg = bank->base + bank->regs->irqctrl;
> u32 l = 0;
Need to check for valid regs->irqctrl here.
> - switch (bank->method) {
> - case METHOD_MPUIO:
> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
> - break;
> -#ifdef CONFIG_ARCH_OMAP15XX
> - case METHOD_GPIO_1510:
> - reg += OMAP1510_GPIO_INT_CONTROL;
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
> - case METHOD_GPIO_7XX:
> - reg += OMAP7XX_GPIO_INT_CONTROL;
> - break;
> -#endif
> - default:
> - return;
> - }
> -
> l = __raw_readl(reg);
> if ((l >> gpio) & 1)
> l &= ~(1 << gpio);
> @@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>
> __raw_writel(l, reg);
> }
> -#endif
>
> static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> {
> void __iomem *reg = bank->base;
> u32 l = 0;
>
> - switch (bank->method) {
> -#ifdef CONFIG_ARCH_OMAP1
> - case METHOD_MPUIO:
> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
> - l = __raw_readl(reg);
> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> - bank->toggle_mask |= 1 << gpio;
> - if (trigger & IRQ_TYPE_EDGE_RISING)
> - l |= 1 << gpio;
> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
> - l &= ~(1 << gpio);
> - else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP15XX
> - case METHOD_GPIO_1510:
> - reg += OMAP1510_GPIO_INT_CONTROL;
> + if ((bank->regs->leveldetect0 != USHRT_MAX) &&
> + (bank->regs->wkupstatus != USHRT_MAX)) {
> + set_gpio_trigger(bank, gpio, trigger);
> + } else if (bank->regs->irqctrl != USHRT_MAX) {
> + reg += bank->regs->irqctrl;
> +
> l = __raw_readl(reg);
> if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> bank->toggle_mask |= 1 << gpio;
> @@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> else if (trigger & IRQ_TYPE_EDGE_FALLING)
> l &= ~(1 << gpio);
> else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP16XX
> - case METHOD_GPIO_1610:
> + return -EINVAL;
> +
> + __raw_writel(l, reg);
> +
> + } else if (bank->regs->edgectrl1 != USHRT_MAX) {
> if (gpio & 0x08)
> - reg += OMAP1610_GPIO_EDGE_CTRL2;
> + reg += bank->regs->edgectrl2;
> else
> - reg += OMAP1610_GPIO_EDGE_CTRL1;
> + reg += bank->regs->edgectrl1;
> +
> gpio &= 0x07;
> l = __raw_readl(reg);
> l &= ~(3 << (gpio << 1));
> @@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
> l |= 2 << (gpio << 1);
> if (trigger & IRQ_TYPE_EDGE_FALLING)
> l |= 1 << (gpio << 1);
> +
> if (trigger)
> /* Enable wake-up during idle for dynamic tick */
> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
> - else
> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
> - break;
> -#endif
> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
> - case METHOD_GPIO_7XX:
> - reg += OMAP7XX_GPIO_INT_CONTROL;
> - l = __raw_readl(reg);
> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
> - bank->toggle_mask |= 1 << gpio;
> - if (trigger & IRQ_TYPE_EDGE_RISING)
> - l |= 1 << gpio;
> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
> - l &= ~(1 << gpio);
> + __raw_writel(1 << gpio, bank->wake_set);
> else
> - goto bad;
> - break;
> -#endif
> -#ifdef CONFIG_ARCH_OMAP2PLUS
> - case METHOD_GPIO_24XX:
> - case METHOD_GPIO_44XX:
> - set_24xx_gpio_triggering(bank, gpio, trigger);
> - return 0;
> -#endif
> - default:
> - goto bad;
> + __raw_writel(1 << gpio, bank->wake_clear);
> +
> + __raw_writel(l, reg);
> }
> - __raw_writel(l, reg);
> +
> return 0;
> -bad:
> - return -EINVAL;
> }
>
> static int gpio_irq_type(struct irq_data *d, unsigned type)
> @@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
> if (!(isr & 1))
> continue;
>
> -#ifdef CONFIG_ARCH_OMAP1
> /*
> * Some chips can't respond to both rising and falling
> * at the same time. If this irq was requested with
> @@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
> * to respond to the IRQ for the opposite direction.
> * This will be indicated in the bank toggle_mask.
> */
> - if (bank->toggle_mask & (1 << gpio_index))
> + if ((bank->regs->irqctrl != USHRT_MAX) &&
The valid register check belongs in function, not here.
> + (bank->toggle_mask & (1 << gpio_index)))
> _toggle_gpio_edge_triggering(bank, gpio_index);
> -#endif
This change isn't quite right, as we don't want (or need) do do this on
OMAP2+. This really is an OMAP1-specific hack.
For the purposes of this patch, leave the OMAP1 #ifdef. Then, in a
subsequent patch, add another per-bank flag (passed in from pdata) that
indicates whether we want to use this hack, and enable it for
OMAP1-based platforms.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 14/15] OMAP: GPIO: Use memset for omap_gpio_reg_offs
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:30 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:30 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Use memset to fill omap_gpio_reg_offs structure with 0xFFFF
> instead of filling each and every undefined register offset
> separately with USHRT_MAX in a given OMAP SoC. This would ease
> while adding new register offsets in the future SoCs.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
This can be dropped in favor of using zero to indicate a non-existant
register offset. Only the revision register needs a special case of
using USHRT_MAX since zero can be a valid offset for the revision
register.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 14/15] OMAP: GPIO: Use memset for omap_gpio_reg_offs
@ 2011-05-25 23:30 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> Use memset to fill omap_gpio_reg_offs structure with 0xFFFF
> instead of filling each and every undefined register offset
> separately with USHRT_MAX in a given OMAP SoC. This would ease
> while adding new register offsets in the future SoCs.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
This can be dropped in favor of using zero to indicate a non-existant
register offset. Only the revision register needs a special case of
using USHRT_MAX since zero can be a valid offset for the revision
register.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-25 23:48 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:48 UTC (permalink / raw)
To: Tarun Kanti DebBarma
Cc: linux-omap, santosh.shilimkar, tony, linux-arm-kernel, Charulatha V
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> With register offsets now defined for respective OMAP versions
> we can get rid of cpu_class_* checks. In addition, organized
> common initialization for the different OMAP silicon versions.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
The sysconfig stuff in this patch should be removed. In fact, now that
hwmod is used to manage all the GPIO IP blocks, the driver should not be
touching sysconfig at all.
The hwmod defaults should be enough, and for enabling wake-ups, the
device-specific code should be calling omap_hwmod_enable_wakeup() (which
will also enable smart-idle if the IP supports it.)
> ---
> arch/arm/mach-omap1/gpio16xx.c | 1 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 74 +++++++++++++-------------------
> 3 files changed, 32 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index 24f6cfa..e9f8abd 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
> omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
> omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
> omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
> + omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
>
> for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
> platform_device_register(omap16xx_gpio_dev[i]);
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index f82881c..ac45191 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
>
> struct omap_gpio_reg_offs {
> u16 revision;
> + u16 sysconfig;
> u16 direction;
> u16 datain;
> u16 dataout;
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index ebeb16e..3649c74 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
> called = true;
> }
>
> -/* This lock class tells lockdep that GPIO irqs are in a different
> +/*
> + * This lock class tells lockdep that GPIO irqs are in a different
> * category than their parents, so it won't report false recursion.
> */
> static struct lock_class_key gpio_lock_class;
>
> -/* TODO: Cleanup cpu_is_* checks */
> static void omap_gpio_mod_init(struct gpio_bank *bank)
> {
> - if (cpu_class_is_omap2()) {
> - if (cpu_is_omap44xx()) {
> - __raw_writel(0xffffffff, bank->base +
> - OMAP4_GPIO_IRQSTATUSCLR0);
> - __raw_writel(0x00000000, bank->base +
> - OMAP4_GPIO_DEBOUNCENABLE);
> - /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
> - } else if (cpu_is_omap34xx()) {
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_IRQENABLE1);
> - __raw_writel(0xffffffff, bank->base +
> - OMAP24XX_GPIO_IRQSTATUS1);
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_DEBOUNCE_EN);
> + if (bank->width == 32) {
> + u32 l = 0;
> +
> + if (bank->regs->irqenable_inv)
> + l = ~l;
>
> + __raw_writel(l, bank->base + bank->regs->irqstatus);
The ->irqenable_inv flag doesn't affect ->irqstatus.
> + __raw_writel(l, bank->base + bank->regs->irqenable);
> +
> + if (bank->regs->debounce_en != USHRT_MAX)
> + __raw_writel(l, bank->base + bank->regs->debounce_en);
If ->irqenable_inv = true, debounce was just enabled for all GPIOs in
the bank.
> + if (bank->regs->ctrl != USHRT_MAX)
> /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
> - }
> - } else if (cpu_class_is_omap1()) {
> - if (bank_is_mpuio(bank)) {
> - __raw_writew(0xffff, bank->base +
> - OMAP_MPUIO_GPIO_MASKIT / bank->stride);
> + __raw_writel(l, bank->base + bank->regs->ctrl);
If ->irqenable_env = true, all the clocks were just gated.
Similar problems below.
Kevin
> +
> + } else if (bank->width == 16) {
> + u16 l = 0;
> +
> + if (bank_is_mpuio(bank))
> mpuio_init(bank);
> - }
> - if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
> - __raw_writew(0xffff, bank->base
> - + OMAP1510_GPIO_INT_MASK);
> - __raw_writew(0x0000, bank->base
> - + OMAP1510_GPIO_INT_STATUS);
> - }
> - if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
> - __raw_writew(0x0000, bank->base
> - + OMAP1610_GPIO_IRQENABLE1);
> - __raw_writew(0xffff, bank->base
> - + OMAP1610_GPIO_IRQSTATUS1);
> - __raw_writew(0x0014, bank->base
> - + OMAP1610_GPIO_SYSCONFIG);
>
> + if (bank->regs->irqenable_inv)
> + l = ~l;
> +
> + __raw_writew(l, bank->base + bank->regs->irqstatus);
> + __raw_writew(l, bank->base + bank->regs->irqenable);
> +
> + if (bank->regs->sysconfig != USHRT_MAX) {
> + /* set wakeup-enable and smart-idle */
> + __raw_writew(0x14, bank->base + bank->regs->sysconfig);
> /*
> * Enable system clock for GPIO module.
> * The CAM_CLK_CTRL *is* really the right place.
> */
> omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
> - ULPD_CAM_CLK_CTRL);
> - }
> - if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
> - __raw_writel(0xffffffff, bank->base
> - + OMAP7XX_GPIO_INT_MASK);
> - __raw_writel(0x00000000, bank->base
> - + OMAP7XX_GPIO_INT_STATUS);
> + ULPD_CAM_CLK_CTRL);
> }
> }
> }
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
@ 2011-05-25 23:48 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-25 23:48 UTC (permalink / raw)
To: linux-arm-kernel
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> From: Charulatha V <charu@ti.com>
>
> With register offsets now defined for respective OMAP versions
> we can get rid of cpu_class_* checks. In addition, organized
> common initialization for the different OMAP silicon versions.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
The sysconfig stuff in this patch should be removed. In fact, now that
hwmod is used to manage all the GPIO IP blocks, the driver should not be
touching sysconfig at all.
The hwmod defaults should be enough, and for enabling wake-ups, the
device-specific code should be calling omap_hwmod_enable_wakeup() (which
will also enable smart-idle if the IP supports it.)
> ---
> arch/arm/mach-omap1/gpio16xx.c | 1 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 74 +++++++++++++-------------------
> 3 files changed, 32 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index 24f6cfa..e9f8abd 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
> omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
> omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
> omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
> + omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
>
> for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
> platform_device_register(omap16xx_gpio_dev[i]);
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index f82881c..ac45191 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
>
> struct omap_gpio_reg_offs {
> u16 revision;
> + u16 sysconfig;
> u16 direction;
> u16 datain;
> u16 dataout;
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index ebeb16e..3649c74 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
> called = true;
> }
>
> -/* This lock class tells lockdep that GPIO irqs are in a different
> +/*
> + * This lock class tells lockdep that GPIO irqs are in a different
> * category than their parents, so it won't report false recursion.
> */
> static struct lock_class_key gpio_lock_class;
>
> -/* TODO: Cleanup cpu_is_* checks */
> static void omap_gpio_mod_init(struct gpio_bank *bank)
> {
> - if (cpu_class_is_omap2()) {
> - if (cpu_is_omap44xx()) {
> - __raw_writel(0xffffffff, bank->base +
> - OMAP4_GPIO_IRQSTATUSCLR0);
> - __raw_writel(0x00000000, bank->base +
> - OMAP4_GPIO_DEBOUNCENABLE);
> - /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
> - } else if (cpu_is_omap34xx()) {
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_IRQENABLE1);
> - __raw_writel(0xffffffff, bank->base +
> - OMAP24XX_GPIO_IRQSTATUS1);
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_DEBOUNCE_EN);
> + if (bank->width == 32) {
> + u32 l = 0;
> +
> + if (bank->regs->irqenable_inv)
> + l = ~l;
>
> + __raw_writel(l, bank->base + bank->regs->irqstatus);
The ->irqenable_inv flag doesn't affect ->irqstatus.
> + __raw_writel(l, bank->base + bank->regs->irqenable);
> +
> + if (bank->regs->debounce_en != USHRT_MAX)
> + __raw_writel(l, bank->base + bank->regs->debounce_en);
If ->irqenable_inv = true, debounce was just enabled for all GPIOs in
the bank.
> + if (bank->regs->ctrl != USHRT_MAX)
> /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
> - }
> - } else if (cpu_class_is_omap1()) {
> - if (bank_is_mpuio(bank)) {
> - __raw_writew(0xffff, bank->base +
> - OMAP_MPUIO_GPIO_MASKIT / bank->stride);
> + __raw_writel(l, bank->base + bank->regs->ctrl);
If ->irqenable_env = true, all the clocks were just gated.
Similar problems below.
Kevin
> +
> + } else if (bank->width == 16) {
> + u16 l = 0;
> +
> + if (bank_is_mpuio(bank))
> mpuio_init(bank);
> - }
> - if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
> - __raw_writew(0xffff, bank->base
> - + OMAP1510_GPIO_INT_MASK);
> - __raw_writew(0x0000, bank->base
> - + OMAP1510_GPIO_INT_STATUS);
> - }
> - if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
> - __raw_writew(0x0000, bank->base
> - + OMAP1610_GPIO_IRQENABLE1);
> - __raw_writew(0xffff, bank->base
> - + OMAP1610_GPIO_IRQSTATUS1);
> - __raw_writew(0x0014, bank->base
> - + OMAP1610_GPIO_SYSCONFIG);
>
> + if (bank->regs->irqenable_inv)
> + l = ~l;
> +
> + __raw_writew(l, bank->base + bank->regs->irqstatus);
> + __raw_writew(l, bank->base + bank->regs->irqenable);
> +
> + if (bank->regs->sysconfig != USHRT_MAX) {
> + /* set wakeup-enable and smart-idle */
> + __raw_writew(0x14, bank->base + bank->regs->sysconfig);
> /*
> * Enable system clock for GPIO module.
> * The CAM_CLK_CTRL *is* really the right place.
> */
> omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
> - ULPD_CAM_CLK_CTRL);
> - }
> - if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
> - __raw_writel(0xffffffff, bank->base
> - + OMAP7XX_GPIO_INT_MASK);
> - __raw_writel(0x00000000, bank->base
> - + OMAP7XX_GPIO_INT_STATUS);
> + ULPD_CAM_CLK_CTRL);
> }
> }
> }
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-26 9:23 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:23 UTC (permalink / raw)
To: DebBarma, Tarun Kanti, linux-omap
Cc: Hilman, Kevin, Shilimkar, Santosh, tony, linux-arm-kernel,
Varadarajan, Charulatha, Cousson, Benoit, Paul Walmsley
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap@vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan,
> Charulatha; Cousson, Benoit; Paul Walmsley
> Subject: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO
> and rev_ids
>
> From: Charulatha V <charu@ti.com>
>
> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>
> Fix the above by providing non-wakeup GPIO information through pdata
> specific to the SoC.
>
> The GPIO rev id provided in the hwmod database is the same
> for OMAP2420
> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
> so that it can be used to identify OMAP2420 and OMAP2430.
> OMAP2420 - 0
> OMAP2430 - 1
> OMAP3 - 2
> OMAP4 - 3
[sp] Magic numbers should be avoided.
Suggest using something like:
#define GPIO_REV_2420 0
#define GPIO_REV_2430 1
#define GPIO_REV_34XX 2
#define GPIO_REV_44xx 3
We don't have to refer back to this comment while reading the code.
I also believed that HWMODs were auto generated.
Can the changes to structures in this patch recreated using current
scripts?
~sanjeev
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Cc: Cousson, Benoit <b-cousson@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/gpio.c | 26
> ++++++++++++++++++++++++--
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 11 +++--------
> 6 files changed, 31 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0446bd1..6cd26b4 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
> omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + switch (oh->class->rev) {
> + case 0:
> + if (id == 1)
> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> + pdata->non_wakeup_gpios = 0xe203ffc0;
> + else if (id == 2)
> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> + pdata->non_wakeup_gpios = 0x08700040;
> + break;
> + case 2:
> + if (id == 2)
> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> + pdata->non_wakeup_gpios = 0x00000001;
> + else if (id == 6)
> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> + pdata->non_wakeup_gpios = 0x08000000;
> + break;
[sp] Where is the description on non-wakeup GPIOs in OMAP3?
Here is text from AM37x TRM:
[quote ...only relevant text]
Each GPIO module provides 32 dedicated general-purpose pins with input
and output capabilities; .... These pins can be configured for the
following applications:
- Data input (capture)/output (drive)
- Keyboard interface with a debounce cell
- Interrupt generation in ....
- Wake-up request generation in idle mode
[/quote]
Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
> + default:
> + /* No non-wakeup GPIO pins for other SoCs */
> + break;
> + }
> +
~sanjeev
[snip]...[snip]
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 9:23 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:23 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: linux-omap-owner at vger.kernel.org
> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap at vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha; Cousson, Benoit; Paul Walmsley
> Subject: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO
> and rev_ids
>
> From: Charulatha V <charu@ti.com>
>
> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>
> Fix the above by providing non-wakeup GPIO information through pdata
> specific to the SoC.
>
> The GPIO rev id provided in the hwmod database is the same
> for OMAP2420
> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
> so that it can be used to identify OMAP2420 and OMAP2430.
> OMAP2420 - 0
> OMAP2430 - 1
> OMAP3 - 2
> OMAP4 - 3
[sp] Magic numbers should be avoided.
Suggest using something like:
#define GPIO_REV_2420 0
#define GPIO_REV_2430 1
#define GPIO_REV_34XX 2
#define GPIO_REV_44xx 3
We don't have to refer back to this comment while reading the code.
I also believed that HWMODs were auto generated.
Can the changes to structures in this patch recreated using current
scripts?
~sanjeev
>
> Signed-off-by: Charulatha V <charu@ti.com>
> Cc: Cousson, Benoit <b-cousson@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> ---
> arch/arm/mach-omap2/gpio.c | 26
> ++++++++++++++++++++++++--
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 11 +++--------
> 6 files changed, 31 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0446bd1..6cd26b4 100644
> --- a/arch/arm/mach-omap2/gpio.c
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
> omap_hwmod *oh, void *unused)
> return -ENOMEM;
> }
>
> + switch (oh->class->rev) {
> + case 0:
> + if (id == 1)
> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> + pdata->non_wakeup_gpios = 0xe203ffc0;
> + else if (id == 2)
> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> + pdata->non_wakeup_gpios = 0x08700040;
> + break;
> + case 2:
> + if (id == 2)
> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> + pdata->non_wakeup_gpios = 0x00000001;
> + else if (id == 6)
> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> + pdata->non_wakeup_gpios = 0x08000000;
> + break;
[sp] Where is the description on non-wakeup GPIOs in OMAP3?
Here is text from AM37x TRM:
[quote ...only relevant text]
Each GPIO module provides 32 dedicated general-purpose pins with input
and output capabilities; .... These pins can be configured for the
following applications:
- Data input (capture)/output (drive)
- Keyboard interface with a debounce cell
- Interrupt generation in ....
- Wake-up request generation in idle mode
[/quote]
Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
> + default:
> + /* No non-wakeup GPIO pins for other SoCs */
> + break;
> + }
> +
~sanjeev
[snip]...[snip]
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
2011-05-25 23:14 ` Kevin Hilman
@ 2011-05-26 9:36 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:36 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
On Thu, May 26, 2011 at 04:44, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
>> is set for all type of GPIO triggers whereas as per TRM the GPIO
>> wakeup request can only be generated on edge transitions. Fix this.
>
> OK. Please make a dedicated patch for this part.
Okay.
>
> Subject: GPIO: OMAP: IRQ triggering: use wake set/clear regs
Okay.
>
>> In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
>> is used for wakeup request and the GPIO set/clear wakeup registers
>> are not used in OMAP4 but is handled without retaining it's old
>> value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
>> register by writing the value of the last requested GPIO pin in
>> a given bank. This can be avoided by making use of GPIO set/clear
>> wakeup registers.
>
> And this should be a separate patch too, or probably folded into PATCH
> 09/15 with an updated changelog of course.
Okay.
>
> Kevin
>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 4 ++--
>> drivers/gpio/gpio_omap.c | 32 ++++++++++----------------------
>> 2 files changed, 12 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 5c888dd..fbedbbb 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
>> pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
>> pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
>> - pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
>> - pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
>> + pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
>> + pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
>> break;
>> default:
>> WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 05c2857..762d73c 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
>> trigger & IRQ_TYPE_EDGE_FALLING);
>> }
>> +
>> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
>> - if (cpu_is_omap44xx()) {
>> - if (trigger != 0)
>> - __raw_writel(1 << gpio, bank->base+
>> - OMAP4_GPIO_IRQWAKEN0);
>> - else {
>> - val = __raw_readl(bank->base +
>> - OMAP4_GPIO_IRQWAKEN0);
>> - __raw_writel(val & (~(1 << gpio)), bank->base +
>> - OMAP4_GPIO_IRQWAKEN0);
>> - }
>> - } else {
>> - /*
>> - * GPIO wakeup request can only be generated on edge
>> - * transitions
>> - */
>> - if (trigger & IRQ_TYPE_EDGE_BOTH)
>> - __raw_writel(1 << gpio, bank->base
>> - + OMAP24XX_GPIO_SETWKUENA);
>> - else
>> - __raw_writel(1 << gpio, bank->base
>> - + OMAP24XX_GPIO_CLEARWKUENA);
>> - }
>> + /*
>> + * GPIO wakeup request can only be generated on edge
>> + * transitions
>> + */
>> + if (trigger & IRQ_TYPE_EDGE_BOTH)
>> + __raw_writel(1 << gpio, bank->wake_set);
>> + else
>> + __raw_writel(1 << gpio, bank->wake_clear);
>> }
>> +
>> /* This part needs to be executed always for OMAP34xx */
>> if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
>> /*
>
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs
@ 2011-05-26 9:36 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:36 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 04:44, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> In set_24xx_gpio_triggering(), for OMAP4, GPIO wakeup request
>> is set for all type of GPIO triggers whereas as per TRM the GPIO
>> wakeup request can only be generated on edge transitions. Fix this.
>
> OK. ?Please make a dedicated patch for this part.
Okay.
>
> Subject: GPIO: OMAP: IRQ triggering: use wake set/clear regs
Okay.
>
>> In set_24xx_gpio_triggering(), OMAP4_GPIO_IRQWAKEN0 register
>> is used for wakeup request and the GPIO set/clear wakeup registers
>> are not used in OMAP4 but is handled without retaining it's old
>> value. This would corrupt the contents of OMAP4_GPIO_IRQWAKEN0
>> register by writing the value of the last requested GPIO pin in
>> a given bank. This can be avoided by making use of GPIO set/clear
>> wakeup registers.
>
> And this should be a separate patch too, or probably folded into PATCH
> 09/15 with an updated changelog of course.
Okay.
>
> Kevin
>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> ?arch/arm/mach-omap2/gpio.c | ? ?4 ++--
>> ?drivers/gpio/gpio_omap.c ? | ? 32 ++++++++++----------------------
>> ?2 files changed, 12 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 5c888dd..fbedbbb 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -142,8 +142,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
>> ? ? ? ? ? ? ? pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
>> ? ? ? ? ? ? ? pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
>> + ? ? ? ? ? ? pdata->regs->wkupclear = OMAP4_GPIO_CLEARWKUENA;
>> + ? ? ? ? ? ? pdata->regs->wkupset = OMAP4_GPIO_SETWKUENA;
>> ? ? ? ? ? ? ? break;
>> ? ? ? default:
>> ? ? ? ? ? ? ? WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 05c2857..762d73c 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -229,30 +229,18 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> ? ? ? ? ? ? ? MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
>> ? ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_EDGE_FALLING);
>> ? ? ? }
>> +
>> ? ? ? if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
>> - ? ? ? ? ? ? if (cpu_is_omap44xx()) {
>> - ? ? ? ? ? ? ? ? ? ? if (trigger != 0)
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->base+
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_IRQWAKEN0);
>> - ? ? ? ? ? ? ? ? ? ? else {
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? val = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_IRQWAKEN0);
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? __raw_writel(val & (~(1 << gpio)), bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OMAP4_GPIO_IRQWAKEN0);
>> - ? ? ? ? ? ? ? ? ? ? }
>> - ? ? ? ? ? ? } else {
>> - ? ? ? ? ? ? ? ? ? ? /*
>> - ? ? ? ? ? ? ? ? ? ? ?* GPIO wakeup request can only be generated on edge
>> - ? ? ? ? ? ? ? ? ? ? ?* transitions
>> - ? ? ? ? ? ? ? ? ? ? ?*/
>> - ? ? ? ? ? ? ? ? ? ? if (trigger & IRQ_TYPE_EDGE_BOTH)
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->base
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + OMAP24XX_GPIO_SETWKUENA);
>> - ? ? ? ? ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->base
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + OMAP24XX_GPIO_CLEARWKUENA);
>> - ? ? ? ? ? ? }
>> + ? ? ? ? ? ? /*
>> + ? ? ? ? ? ? ?* GPIO wakeup request can only be generated on edge
>> + ? ? ? ? ? ? ?* transitions
>> + ? ? ? ? ? ? ?*/
>> + ? ? ? ? ? ? if (trigger & IRQ_TYPE_EDGE_BOTH)
>> + ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->wake_set);
>> + ? ? ? ? ? ? else
>> + ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->wake_clear);
>> ? ? ? }
>> +
>> ? ? ? /* This part needs to be executed always for OMAP34xx */
>> ? ? ? if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
>> ? ? ? ? ? ? ? /*
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
2011-05-25 23:01 ` Kevin Hilman
@ 2011-05-26 9:36 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:36 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
On Thu, May 26, 2011 at 04:31, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> It is not required to use hard-coded offsets any more in context
>> save and restore functions and instead use the generic offsets
>> which have been correctly initialized during device registration.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> Looks good.
>
> I suggest you move this and all the other patches that just change to using
> regsister offsets earlier in the series.
okay.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
@ 2011-05-26 9:36 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:36 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 04:31, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> It is not required to use hard-coded offsets any more in context
>> save and restore functions and instead use the generic offsets
>> which have been correctly initialized during device registration.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> Looks good.
>
> I suggest you move this and all the other patches that just change to using
> regsister offsets earlier in the series.
okay.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
2011-05-25 22:39 ` Kevin Hilman
@ 2011-05-26 9:37 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:37 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
On Thu, May 26, 2011 at 04:09, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Make workaround_enabled flag bank-specific instead of using a single
>> flag for all the banks together. This would be helpful while making
>> use of runtime framework in OMAP GPIO driver which would make the
>> driver handle each GPIO bank independently.
>>
>> Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
>
> Do we even need a dedicated flag for this?
>
> I seems that the combination of enabled_non_wakeup_gpios and whether or
> not context has been lost could be used to check this condition.
Okay, will check and do the needful.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific
@ 2011-05-26 9:37 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:37 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 04:09, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Make workaround_enabled flag bank-specific instead of using a single
>> flag for all the banks together. This would be helpful while making
>> use of runtime framework in OMAP GPIO driver which would make the
>> driver handle each GPIO bank independently.
>>
>> Also rename workaround_enabled flag to off_mode_wkup_wa_enabled
>
> Do we even need a dedicated flag for this?
>
> I seems that the combination of enabled_non_wakeup_gpios and whether or
> not context has been lost could be used to check this condition.
Okay, will check and do the needful.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 06/15] OMAP4: GPIO: Save/restore context
2011-05-25 21:43 ` Kevin Hilman
@ 2011-05-26 9:37 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:37 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
Kevin,
Thanks for the comments on this series.
On Thu, May 26, 2011 at 03:13, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Modify the omap_gpio_save/restore_context to support OMAP4
>> architecture so that the OMAP GPIO driver need not be modified
>> when OMAP4 off mode support is available.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> I don't think this patch is needed.
>
> PATCH 11/15 removes everything added in this patch when it moves to
> using the register offsets.
Okay.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 06/15] OMAP4: GPIO: Save/restore context
@ 2011-05-26 9:37 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:37 UTC (permalink / raw)
To: linux-arm-kernel
Kevin,
Thanks for the comments on this series.
On Thu, May 26, 2011 at 03:13, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Modify the omap_gpio_save/restore_context to support OMAP4
>> architecture so that the OMAP GPIO driver need not be modified
>> when OMAP4 off mode support is available.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> I don't think this patch is needed.
>
> PATCH 11/15 removes everything added in this patch when it moves to
> using the register offsets.
Okay.
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-25 21:34 ` Kevin Hilman
@ 2011-05-26 9:38 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:38 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel, Cousson, Benoit, Paul Walmsley
On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>
> Can you cite the documentation you're using for the OMAP3 non-wakeup
> GPIOs?
I am referring to Table 25-5. GPIO Channel Description at page no 3354
OMAP3430 public TRM Version P.
>
> This is a change of functionality from current code, where all OMAP3
> GPIOs are considered wakeup capable.
>
> I'd like this to be tackled in two patches. One for the
> cleanup/consolidation, and one for change in behavior.
Okay.
>
> For this cleanup/consolidation (this series), please keep existing
> functionality and focus on the cleanup. Then, in an additional patch
> (on top of the cleanup/conslidation), change the functionality with a
> detailed changelog.
Okay.
>
> Thanks,
>
> Kevin
>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 - 2
>> OMAP4 - 3
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Cc: Cousson, Benoit <b-cousson@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 26 ++++++++++++++++++++++++--
>> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 11 +++--------
>> 6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> return -ENOMEM;
>> }
>>
>> + switch (oh->class->rev) {
>> + case 0:
>> + if (id == 1)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + pdata->non_wakeup_gpios = 0xe203ffc0;
>> + else if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + pdata->non_wakeup_gpios = 0x08700040;
>> + break;
>> + case 2:
>> + if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + pdata->non_wakeup_gpios = 0x00000001;
>> + else if (id == 6)
>> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + pdata->non_wakeup_gpios = 0x08000000;
>> + break;
>> + default:
>> + /* No non-wakeup GPIO pins for other SoCs */
>> + break;
>> + }
>> +
>> dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
>> pdata->bank_width = dev_attr->bank_width;
>> pdata->dbck_flag = dev_attr->dbck_flag;
>> @@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> switch (oh->class->rev) {
>> case 0:
>> case 1:
>> + case 2:
>> pdata->bank_type = METHOD_GPIO_24XX;
>> pdata->regs->revision = OMAP24XX_GPIO_REVISION;
>> pdata->regs->direction = OMAP24XX_GPIO_OE;
>> @@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> break;
>> - case 2:
>> + case 3:
>> pdata->bank_type = METHOD_GPIO_44XX;
>> pdata->regs->revision = OMAP4_GPIO_REVISION;
>> pdata->regs->direction = OMAP4_GPIO_OE;
>> @@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> kfree(pdata);
>> return -EINVAL;
>> }
>> -
>> od = omap_device_build(name, id - 1, oh, pdata,
>> sizeof(*pdata), omap_gpio_latency,
>> ARRAY_SIZE(omap_gpio_latency),
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> index 9682dd5..ae702b5 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> @@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
>> static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
>> .name = "gpio",
>> .sysc = &omap243x_gpio_sysc,
>> - .rev = 0,
>> + .rev = 1,
>> };
>>
>> /* gpio1 */
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> index 909a84d..05e7005 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> @@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
>> static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
>> .name = "gpio",
>> .sysc = &omap3xxx_gpio_sysc,
>> - .rev = 1,
>> + .rev = 2,
>> };
>>
>> /* gpio_dev_attr*/
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> index abc548a..ea30752 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> @@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
>> static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
>> .name = "gpio",
>> .sysc = &omap44xx_gpio_sysc,
>> - .rev = 2,
>> + .rev = 3,
>> };
>>
>> /* gpio dev_attr */
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index caf432c..8014a8a 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
>> int bank_width; /* GPIO bank width */
>> int bank_stride; /* Only needed for omap1 MPUIO */
>> bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
>> + u32 non_wakeup_gpios;
>>
>> struct omap_gpio_reg_offs *regs;
>> };
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index dfdc45e..0ba4cdb 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
>> }
>>
>> /* TODO: Cleanup cpu_is_* checks */
>> -static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>> +static void omap_gpio_mod_init(struct gpio_bank *bank)
>> {
>> if (cpu_class_is_omap2()) {
>> if (cpu_is_omap44xx()) {
>> @@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>>
>> /* Initialize interface clk ungated, module enabled */
>> __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
>> - } else if (cpu_is_omap24xx()) {
>> - static const u32 non_wakeup_gpios[] = {
>> - 0xe203ffc0, 0x08700040
>> - };
>> - if (id < ARRAY_SIZE(non_wakeup_gpios))
>> - bank->non_wakeup_gpios = non_wakeup_gpios[id];
>> }
>> } else if (cpu_class_is_omap1()) {
>> if (bank_is_mpuio(bank))
>> @@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> bank->dbck_flag = pdata->dbck_flag;
>> bank->stride = pdata->bank_stride;
>> bank->width = pdata->bank_width;
>> + bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
>>
>> bank->regs = pdata->regs;
>>
>> @@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> pm_runtime_enable(bank->dev);
>> pm_runtime_get_sync(bank->dev);
>>
>> - omap_gpio_mod_init(bank, id);
>> + omap_gpio_mod_init(bank);
>> omap_gpio_chip_init(bank);
>> omap_gpio_show_rev(bank);
>
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 9:38 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:38 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>
> Can you cite the documentation you're using for the OMAP3 non-wakeup
> GPIOs?
I am referring to Table 25-5. GPIO Channel Description at page no 3354
OMAP3430 public TRM Version P.
>
> This is a change of functionality from current code, where all OMAP3
> GPIOs are considered wakeup capable.
>
> I'd like this to be tackled in two patches. ?One for the
> cleanup/consolidation, and one for change in behavior.
Okay.
>
> For this cleanup/consolidation (this series), please keep existing
> functionality and focus on the cleanup. ?Then, in an additional patch
> (on top of the cleanup/conslidation), change the functionality with a
> detailed changelog.
Okay.
>
> Thanks,
>
> Kevin
>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 ? ?- 2
>> OMAP4 ? ?- 3
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Cc: Cousson, Benoit <b-cousson@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> ---
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? ? ? | ? 26 ++++++++++++++++++++++++--
>> ?arch/arm/mach-omap2/omap_hwmod_2430_data.c | ? ?2 +-
>> ?arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ? ?2 +-
>> ?arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ? ?2 +-
>> ?arch/arm/plat-omap/include/plat/gpio.h ? ? | ? ?1 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? ? ? | ? 11 +++--------
>> ?6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? return -ENOMEM;
>> ? ? ? }
>>
>> + ? ? switch (oh->class->rev) {
>> + ? ? case 0:
>> + ? ? ? ? ? ? if (id == 1)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0xe203ffc0;
>> + ? ? ? ? ? ? else if (id == 2)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x08700040;
>> + ? ? ? ? ? ? break;
>> + ? ? case 2:
>> + ? ? ? ? ? ? if (id == 2)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x00000001;
>> + ? ? ? ? ? ? else if (id == 6)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x08000000;
>> + ? ? ? ? ? ? break;
>> + ? ? default:
>> + ? ? ? ? ? ? /* No non-wakeup GPIO pins for other SoCs */
>> + ? ? ? ? ? ? break;
>> + ? ? }
>> +
>> ? ? ? dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
>> ? ? ? pdata->bank_width = dev_attr->bank_width;
>> ? ? ? pdata->dbck_flag = dev_attr->dbck_flag;
>> @@ -70,6 +92,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? switch (oh->class->rev) {
>> ? ? ? case 0:
>> ? ? ? case 1:
>> + ? ? case 2:
>> ? ? ? ? ? ? ? pdata->bank_type = METHOD_GPIO_24XX;
>> ? ? ? ? ? ? ? pdata->regs->revision = OMAP24XX_GPIO_REVISION;
>> ? ? ? ? ? ? ? pdata->regs->direction = OMAP24XX_GPIO_OE;
>> @@ -86,7 +109,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> ? ? ? ? ? ? ? pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> ? ? ? ? ? ? ? break;
>> - ? ? case 2:
>> + ? ? case 3:
>> ? ? ? ? ? ? ? pdata->bank_type = METHOD_GPIO_44XX;
>> ? ? ? ? ? ? ? pdata->regs->revision = OMAP4_GPIO_REVISION;
>> ? ? ? ? ? ? ? pdata->regs->direction = OMAP4_GPIO_OE;
>> @@ -108,7 +131,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? kfree(pdata);
>> ? ? ? ? ? ? ? return -EINVAL;
>> ? ? ? }
>> -
>> ? ? ? od = omap_device_build(name, id - 1, oh, pdata,
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? sizeof(*pdata), omap_gpio_latency,
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ARRAY_SIZE(omap_gpio_latency),
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> index 9682dd5..ae702b5 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> @@ -1728,7 +1728,7 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
>> ?static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
>> ? ? ? .name = "gpio",
>> ? ? ? .sysc = &omap243x_gpio_sysc,
>> - ? ? .rev = 0,
>> + ? ? .rev = 1,
>> ?};
>>
>> ?/* gpio1 */
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> index 909a84d..05e7005 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
>> @@ -2117,7 +2117,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
>> ?static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {
>> ? ? ? .name = "gpio",
>> ? ? ? .sysc = &omap3xxx_gpio_sysc,
>> - ? ? .rev = 1,
>> + ? ? .rev = 2,
>> ?};
>>
>> ?/* gpio_dev_attr*/
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> index abc548a..ea30752 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> @@ -1703,7 +1703,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
>> ?static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
>> ? ? ? .name ? = "gpio",
>> ? ? ? .sysc ? = &omap44xx_gpio_sysc,
>> - ? ? .rev ? ?= 2,
>> + ? ? .rev ? ?= 3,
>> ?};
>>
>> ?/* gpio dev_attr */
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index caf432c..8014a8a 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
>> ? ? ? int bank_width; ? ? ? ? /* GPIO bank width */
>> ? ? ? int bank_stride; ? ? ? ?/* Only needed for omap1 MPUIO */
>> ? ? ? bool dbck_flag; ? ? ? ? /* dbck required or not - True for OMAP3&4 */
>> + ? ? u32 non_wakeup_gpios;
>>
>> ? ? ? struct omap_gpio_reg_offs *regs;
>> ?};
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index dfdc45e..0ba4cdb 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -1008,7 +1008,7 @@ static inline int init_gpio_info(struct platform_device *pdev)
>> ?}
>>
>> ?/* TODO: Cleanup cpu_is_* checks */
>> -static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>> +static void omap_gpio_mod_init(struct gpio_bank *bank)
>> ?{
>> ? ? ? if (cpu_class_is_omap2()) {
>> ? ? ? ? ? ? ? if (cpu_is_omap44xx()) {
>> @@ -1028,12 +1028,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
>>
>> ? ? ? ? ? ? ? ? ? ? ? /* Initialize interface clk ungated, module enabled */
>> ? ? ? ? ? ? ? ? ? ? ? __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
>> - ? ? ? ? ? ? } else if (cpu_is_omap24xx()) {
>> - ? ? ? ? ? ? ? ? ? ? static const u32 non_wakeup_gpios[] = {
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0xe203ffc0, 0x08700040
>> - ? ? ? ? ? ? ? ? ? ? };
>> - ? ? ? ? ? ? ? ? ? ? if (id < ARRAY_SIZE(non_wakeup_gpios))
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->non_wakeup_gpios = non_wakeup_gpios[id];
>> ? ? ? ? ? ? ? }
>> ? ? ? } else if (cpu_class_is_omap1()) {
>> ? ? ? ? ? ? ? if (bank_is_mpuio(bank))
>> @@ -1179,6 +1173,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> ? ? ? bank->dbck_flag = pdata->dbck_flag;
>> ? ? ? bank->stride = pdata->bank_stride;
>> ? ? ? bank->width = pdata->bank_width;
>> + ? ? bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
>>
>> ? ? ? bank->regs = pdata->regs;
>>
>> @@ -1205,7 +1200,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> ? ? ? pm_runtime_enable(bank->dev);
>> ? ? ? pm_runtime_get_sync(bank->dev);
>>
>> - ? ? omap_gpio_mod_init(bank, id);
>> + ? ? omap_gpio_mod_init(bank);
>> ? ? ? omap_gpio_chip_init(bank);
>> ? ? ? omap_gpio_show_rev(bank);
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
2011-05-25 21:19 ` Kevin Hilman
@ 2011-05-26 9:38 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:38 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
On Thu, May 26, 2011 at 02:49, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Remove cpu-is checks while enabling/disabling OMAP GPIO module
>> during a gpio request/free.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> This looks mostly OK, but one nitpick about the usage of USHRT_MAX.
>
> For most registers, you should just test for a non-zero register offset
> to determine if it's present or not instead of USHRT_MAX.
Is it safe to assume that zero offset is always for revision register only?
IMHO I feel that it is safe to assume an offset of 0xFFFF as invalid.
Pls add your thoughts on this.
>
> I used USHRT_MAX for the revision register because it is at offset zero
> on most SoCs, so testing for non-zero wouldn't work there.
>
> Other than that, the approach looks fine.
>
> Thanks,
>
> Kevin
>
>> ---
>> arch/arm/mach-omap1/gpio15xx.c | 2 +
>> arch/arm/mach-omap1/gpio16xx.c | 2 +
>> arch/arm/mach-omap1/gpio7xx.c | 2 +
>> arch/arm/mach-omap2/gpio.c | 2 +
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 53 ++++++++++++++------------------
>> 6 files changed, 32 insertions(+), 30 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index f79c6ae..6d83e0a 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> .irqstatus = OMAP_MPUIO_GPIO_INT,
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
>> .irqenable_inv = true,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> .irqstatus = OMAP1510_GPIO_INT_STATUS,
>> .irqenable = OMAP1510_GPIO_INT_MASK,
>> .irqenable_inv = true,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index c69b3b1..6bba196 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> .irqstatus = OMAP_MPUIO_GPIO_INT,
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
>> .irqenable_inv = true,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> .irqenable = OMAP1610_GPIO_IRQENABLE1,
>> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
>> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index d7f2ad3..0fc2557 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
>> .irqenable_inv = true,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> .irqstatus = OMAP7XX_GPIO_INT_STATUS,
>> .irqenable = OMAP7XX_GPIO_INT_MASK,
>> .irqenable_inv = true,
>> + .ctrl = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 9a46d77..0446bd1 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
>> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
>> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> + pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> break;
>> case 2:
>> pdata->bank_type = METHOD_GPIO_44XX;
>> @@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
>> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
>> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
>> + pdata->regs->ctrl = OMAP4_GPIO_CTRL;
>> break;
>> default:
>> WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index 91e8de3..caf432c 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
>> u16 clr_irqenable;
>> u16 debounce;
>> u16 debounce_en;
>> + u16 ctrl;
>>
>> bool irqenable_inv;
>> };
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index a490cb1..dfdc45e 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -89,6 +89,7 @@ int gpio_bank_count;
>>
>> #define GPIO_INDEX(bank, gpio) (gpio % bank->width)
>> #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
>> +#define GPIO_MOD_CTRL_BIT BIT(0)
>>
>> static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
>> {
>> @@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
>> __raw_writel(__raw_readl(reg) | (1 << offset), reg);
>> }
>> #endif
>> - if (!cpu_class_is_omap1()) {
>> - if (!bank->mod_usage) {
>> - void __iomem *reg = bank->base;
>> - u32 ctrl;
>> -
>> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
>> - reg += OMAP24XX_GPIO_CTRL;
>> - else if (cpu_is_omap44xx())
>> - reg += OMAP4_GPIO_CTRL;
>> - ctrl = __raw_readl(reg);
>> - /* Module is enabled, clocks are not gated */
>> - ctrl &= 0xFFFFFFFE;
>> - __raw_writel(ctrl, reg);
>> - }
>> - bank->mod_usage |= 1 << offset;
>> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> + void __iomem *reg = bank->base + bank->regs->ctrl;
>> + u32 ctrl;
>> +
>> + ctrl = __raw_readl(reg);
>> + /* Module is enabled, clocks are not gated */
>> + ctrl &= ~GPIO_MOD_CTRL_BIT;
>> + __raw_writel(ctrl, reg);
>> }
>> +
>> + bank->mod_usage |= 1 << offset;
>> +
>> spin_unlock_irqrestore(&bank->lock, flags);
>>
>> return 0;
>> @@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
>> __raw_writel(1 << offset, reg);
>> }
>> #endif
>> - if (!cpu_class_is_omap1()) {
>> - bank->mod_usage &= ~(1 << offset);
>> - if (!bank->mod_usage) {
>> - void __iomem *reg = bank->base;
>> - u32 ctrl;
>> -
>> - if (cpu_is_omap24xx() || cpu_is_omap34xx())
>> - reg += OMAP24XX_GPIO_CTRL;
>> - else if (cpu_is_omap44xx())
>> - reg += OMAP4_GPIO_CTRL;
>> - ctrl = __raw_readl(reg);
>> - /* Module is disabled, clocks are gated */
>> - ctrl |= 1;
>> - __raw_writel(ctrl, reg);
>> - }
>> + bank->mod_usage &= ~(1 << offset);
>> +
>> + if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> + void __iomem *reg = bank->base + bank->regs->ctrl;
>> + u32 ctrl;
>> +
>> + ctrl = __raw_readl(reg);
>> + /* Module is disabled, clocks are gated */
>> + ctrl |= GPIO_MOD_CTRL_BIT;
>> + __raw_writel(ctrl, reg);
>> }
>> +
>> _reset_gpio(bank, bank->chip.base + offset);
>> spin_unlock_irqrestore(&bank->lock, flags);
>> }
>
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable
@ 2011-05-26 9:38 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:38 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 02:49, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Remove cpu-is checks while enabling/disabling OMAP GPIO module
>> during a gpio request/free.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>
> This looks mostly OK, but one nitpick about the usage of USHRT_MAX.
>
> For most registers, you should just test for a non-zero register offset
> to determine if it's present or not instead of USHRT_MAX.
Is it safe to assume that zero offset is always for revision register only?
IMHO I feel that it is safe to assume an offset of 0xFFFF as invalid.
Pls add your thoughts on this.
>
> I used USHRT_MAX for the revision register because it is at offset zero
> on most SoCs, so testing for non-zero wouldn't work there.
>
> Other than that, the approach looks fine.
>
> Thanks,
>
> Kevin
>
>> ---
>> ?arch/arm/mach-omap1/gpio15xx.c ? ? ? ? | ? ?2 +
>> ?arch/arm/mach-omap1/gpio16xx.c ? ? ? ? | ? ?2 +
>> ?arch/arm/mach-omap1/gpio7xx.c ? ? ? ? ?| ? ?2 +
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? | ? ?2 +
>> ?arch/arm/plat-omap/include/plat/gpio.h | ? ?1 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? | ? 53 ++++++++++++++------------------
>> ?6 files changed, 32 insertions(+), 30 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index f79c6ae..6d83e0a 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> ? ? ? .irqstatus ? ? ?= OMAP_MPUIO_GPIO_INT,
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT,
>> ? ? ? .irqenable_inv ?= true,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> ? ? ? .irqstatus ? ? ?= OMAP1510_GPIO_INT_STATUS,
>> ? ? ? .irqenable ? ? ?= OMAP1510_GPIO_INT_MASK,
>> ? ? ? .irqenable_inv ?= true,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index c69b3b1..6bba196 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> ? ? ? .irqstatus ? ? ?= OMAP_MPUIO_GPIO_INT,
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT,
>> ? ? ? .irqenable_inv ?= true,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -89,6 +90,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP1610_GPIO_IRQENABLE1,
>> ? ? ? .set_irqenable ?= OMAP1610_GPIO_SET_IRQENABLE1,
>> ? ? ? .clr_irqenable ?= OMAP1610_GPIO_CLEAR_IRQENABLE1,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index d7f2ad3..0fc2557 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> ? ? ? .irqstatus ? ? ?= OMAP_MPUIO_GPIO_INT / 2,
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT / 2,
>> ? ? ? .irqenable_inv ?= true,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> ? ? ? .irqstatus ? ? ?= OMAP7XX_GPIO_INT_STATUS,
>> ? ? ? .irqenable ? ? ?= OMAP7XX_GPIO_INT_MASK,
>> ? ? ? .irqenable_inv ?= true,
>> + ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 9a46d77..0446bd1 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
>> ? ? ? ? ? ? ? pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
>> ? ? ? ? ? ? ? pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> + ? ? ? ? ? ? pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> ? ? ? ? ? ? ? break;
>> ? ? ? case 2:
>> ? ? ? ? ? ? ? pdata->bank_type = METHOD_GPIO_44XX;
>> @@ -100,6 +101,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
>> ? ? ? ? ? ? ? pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
>> ? ? ? ? ? ? ? pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
>> + ? ? ? ? ? ? pdata->regs->ctrl = OMAP4_GPIO_CTRL;
>> ? ? ? ? ? ? ? break;
>> ? ? ? default:
>> ? ? ? ? ? ? ? WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index 91e8de3..caf432c 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
>> ? ? ? u16 clr_irqenable;
>> ? ? ? u16 debounce;
>> ? ? ? u16 debounce_en;
>> + ? ? u16 ctrl;
>>
>> ? ? ? bool irqenable_inv;
>> ?};
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index a490cb1..dfdc45e 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -89,6 +89,7 @@ int gpio_bank_count;
>>
>> ?#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
>> ?#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
>> +#define GPIO_MOD_CTRL_BIT ? ?BIT(0)
>>
>> ?static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
>> ?{
>> @@ -586,22 +587,18 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
>> ? ? ? ? ? ? ? __raw_writel(__raw_readl(reg) | (1 << offset), reg);
>> ? ? ? }
>> ?#endif
>> - ? ? if (!cpu_class_is_omap1()) {
>> - ? ? ? ? ? ? if (!bank->mod_usage) {
>> - ? ? ? ? ? ? ? ? ? ? void __iomem *reg = bank->base;
>> - ? ? ? ? ? ? ? ? ? ? u32 ctrl;
>> -
>> - ? ? ? ? ? ? ? ? ? ? if (cpu_is_omap24xx() || cpu_is_omap34xx())
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg += OMAP24XX_GPIO_CTRL;
>> - ? ? ? ? ? ? ? ? ? ? else if (cpu_is_omap44xx())
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg += OMAP4_GPIO_CTRL;
>> - ? ? ? ? ? ? ? ? ? ? ctrl = __raw_readl(reg);
>> - ? ? ? ? ? ? ? ? ? ? /* Module is enabled, clocks are not gated */
>> - ? ? ? ? ? ? ? ? ? ? ctrl &= 0xFFFFFFFE;
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(ctrl, reg);
>> - ? ? ? ? ? ? }
>> - ? ? ? ? ? ? bank->mod_usage |= 1 << offset;
>> + ? ? if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> + ? ? ? ? ? ? void __iomem *reg = bank->base + bank->regs->ctrl;
>> + ? ? ? ? ? ? u32 ctrl;
>> +
>> + ? ? ? ? ? ? ctrl = __raw_readl(reg);
>> + ? ? ? ? ? ? /* Module is enabled, clocks are not gated */
>> + ? ? ? ? ? ? ctrl &= ~GPIO_MOD_CTRL_BIT;
>> + ? ? ? ? ? ? __raw_writel(ctrl, reg);
>> ? ? ? }
>> +
>> + ? ? bank->mod_usage |= 1 << offset;
>> +
>> ? ? ? spin_unlock_irqrestore(&bank->lock, flags);
>>
>> ? ? ? return 0;
>> @@ -634,22 +631,18 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
>> ? ? ? ? ? ? ? __raw_writel(1 << offset, reg);
>> ? ? ? }
>> ?#endif
>> - ? ? if (!cpu_class_is_omap1()) {
>> - ? ? ? ? ? ? bank->mod_usage &= ~(1 << offset);
>> - ? ? ? ? ? ? if (!bank->mod_usage) {
>> - ? ? ? ? ? ? ? ? ? ? void __iomem *reg = bank->base;
>> - ? ? ? ? ? ? ? ? ? ? u32 ctrl;
>> -
>> - ? ? ? ? ? ? ? ? ? ? if (cpu_is_omap24xx() || cpu_is_omap34xx())
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg += OMAP24XX_GPIO_CTRL;
>> - ? ? ? ? ? ? ? ? ? ? else if (cpu_is_omap44xx())
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? reg += OMAP4_GPIO_CTRL;
>> - ? ? ? ? ? ? ? ? ? ? ctrl = __raw_readl(reg);
>> - ? ? ? ? ? ? ? ? ? ? /* Module is disabled, clocks are gated */
>> - ? ? ? ? ? ? ? ? ? ? ctrl |= 1;
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(ctrl, reg);
>> - ? ? ? ? ? ? }
>> + ? ? bank->mod_usage &= ~(1 << offset);
>> +
>> + ? ? if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> + ? ? ? ? ? ? void __iomem *reg = bank->base + bank->regs->ctrl;
>> + ? ? ? ? ? ? u32 ctrl;
>> +
>> + ? ? ? ? ? ? ctrl = __raw_readl(reg);
>> + ? ? ? ? ? ? /* Module is disabled, clocks are gated */
>> + ? ? ? ? ? ? ctrl |= GPIO_MOD_CTRL_BIT;
>> + ? ? ? ? ? ? __raw_writel(ctrl, reg);
>> ? ? ? }
>> +
>> ? ? ? _reset_gpio(bank, bank->chip.base + offset);
>> ? ? ? spin_unlock_irqrestore(&bank->lock, flags);
>> ?}
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-26 9:42 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:42 UTC (permalink / raw)
To: DebBarma, Tarun Kanti, linux-omap
Cc: Hilman, Kevin, Shilimkar, Santosh, tony, linux-arm-kernel,
Varadarajan, Charulatha
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap@vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; DebBarma, Tarun Kanti;
> Varadarajan, Charulatha
> Subject: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets
> in ctxt save/restore
>
> It is not required to use hard-coded offsets any more in context
> save and restore functions and instead use the generic offsets
> which have been correctly initialized during device registration.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/gpio.c | 2 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 123
> ++++++++++----------------------
> 3 files changed, 40 insertions(+), 86 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0f8782f..5c888dd 100644
[snip]...[snip]
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 28390a9..05c2857 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -1395,96 +1395,47 @@ restore_gpio_ctx:
>
> void omap_gpio_save_context(struct gpio_bank *bank)
> {
[sp] The [PATCH 06/15] OMAP4: GPIO: Save/restore context
seems to be doing exactly opposite:
It introduces the checks for
[quote]
+ if (bank->method == METHOD_GPIO_24XX) {
...
...
+ } else if (bank->method == METHOD_GPIO_44XX) {
[/quote]
and this patch removes the same checks.
Am I missing something?
~sanjeev
> - if (bank->method == METHOD_GPIO_24XX) {
> - bank->context.irqenable1 = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_IRQENABLE1);
> - bank->context.irqenable2 = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_IRQENABLE2);
> - bank->context.wake_en = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_WAKE_EN);
> - bank->context.ctrl = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_CTRL);
> - bank->context.oe = __raw_readl(
> - bank->base + OMAP24XX_GPIO_OE);
> - bank->context.leveldetect0 = __raw_readl(bank->base +
> - OMAP24XX_GPIO_LEVELDETECT0);
> - bank->context.leveldetect1 = __raw_readl(bank->base +
> - OMAP24XX_GPIO_LEVELDETECT1);
> - bank->context.risingdetect = __raw_readl(bank->base +
> - OMAP24XX_GPIO_RISINGDETECT);
> - bank->context.fallingdetect = __raw_readl(bank->base +
> - OMAP24XX_GPIO_FALLINGDETECT);
> - bank->context.dataout = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_DATAOUT);
> - } else if (bank->method == METHOD_GPIO_44XX) {
> - bank->context.irqenable1 = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQSTATUSSET0);
> - bank->context.irqenable2 = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQSTATUSSET1);
> - bank->context.wake_en = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQWAKEN0);
> - bank->context.ctrl = __raw_readl(
> - bank->base + OMAP4_GPIO_CTRL);
> - bank->context.oe = __raw_readl(
> - bank->base + OMAP24XX_GPIO_OE);
> - bank->context.leveldetect0 = __raw_readl(bank->base +
> - OMAP4_GPIO_LEVELDETECT0);
> - bank->context.leveldetect1 = __raw_readl(bank->base +
> - OMAP4_GPIO_LEVELDETECT1);
> - bank->context.risingdetect = __raw_readl(bank->base +
> - OMAP4_GPIO_RISINGDETECT);
> - bank->context.fallingdetect = __raw_readl(bank->base +
> - OMAP4_GPIO_FALLINGDETECT);
> - bank->context.dataout = __raw_readl(
> - bank->base +
> OMAP4_GPIO_DATAOUT);
> - }
> + bank->context.irqenable1 =
> + __raw_readl(bank->base + bank->regs->irqenable);
> + bank->context.irqenable2 =
> + __raw_readl(bank->base +
> bank->regs->irqenable2);
> + bank->context.wake_en =
> + __raw_readl(bank->base +
> bank->regs->wkupstatus);
> + bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
> + bank->context.oe = __raw_readl(bank->base +
> bank->regs->direction);
> + bank->context.leveldetect0 =
> + __raw_readl(bank->base +
> bank->regs->leveldetect0);
> + bank->context.leveldetect1 =
> + __raw_readl(bank->base +
> bank->regs->leveldetect1);
> + bank->context.risingdetect =
> + __raw_readl(bank->base +
> bank->regs->risingdetect);
> + bank->context.fallingdetect =
> + __raw_readl(bank->base +
> bank->regs->fallingdetect);
> + bank->context.dataout = __raw_readl(bank->base +
> bank->regs->dataout);
> }
>
> void omap_gpio_restore_context(struct gpio_bank *bank)
> {
> - if (bank->method == METHOD_GPIO_24XX) {
> - __raw_writel(bank->context.irqenable1, bank->base +
> -
> OMAP24XX_GPIO_IRQENABLE1);
> - __raw_writel(bank->context.irqenable2, bank->base +
> -
> OMAP24XX_GPIO_IRQENABLE2);
> - __raw_writel(bank->context.wake_en, bank->base +
> - OMAP24XX_GPIO_WAKE_EN);
> - __raw_writel(bank->context.ctrl, bank->base +
> - OMAP24XX_GPIO_CTRL);
> - __raw_writel(bank->context.oe, bank->base +
> - OMAP24XX_GPIO_OE);
> - __raw_writel(bank->context.leveldetect0, bank->base +
> -
> OMAP24XX_GPIO_LEVELDETECT0);
> - __raw_writel(bank->context.leveldetect1, bank->base +
> -
> OMAP24XX_GPIO_LEVELDETECT1);
> - __raw_writel(bank->context.risingdetect, bank->base +
> -
> OMAP24XX_GPIO_RISINGDETECT);
> - __raw_writel(bank->context.fallingdetect, bank->base +
> -
> OMAP24XX_GPIO_FALLINGDETECT);
> - __raw_writel(bank->context.dataout, bank->base +
> - OMAP24XX_GPIO_DATAOUT);
> - } else if (bank->method == METHOD_GPIO_44XX) {
> - __raw_writel(bank->context.irqenable1, bank->base +
> -
> OMAP4_GPIO_IRQSTATUSSET0);
> - __raw_writel(bank->context.irqenable2, bank->base +
> -
> OMAP4_GPIO_IRQSTATUSSET1);
> - __raw_writel(bank->context.wake_en, bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - __raw_writel(bank->context.ctrl, bank->base +
> - OMAP4_GPIO_CTRL);
> - __raw_writel(bank->context.oe, bank->base +
> - OMAP24XX_GPIO_OE);
> - __raw_writel(bank->context.leveldetect0, bank->base +
> -
> OMAP4_GPIO_LEVELDETECT0);
> - __raw_writel(bank->context.leveldetect1, bank->base +
> -
> OMAP4_GPIO_LEVELDETECT1);
> - __raw_writel(bank->context.risingdetect, bank->base +
> -
> OMAP4_GPIO_RISINGDETECT);
> - __raw_writel(bank->context.fallingdetect, bank->base +
> -
> OMAP4_GPIO_FALLINGDETECT);
> - __raw_writel(bank->context.dataout, bank->base +
> - OMAP4_GPIO_DATAOUT);
> - }
> + __raw_writel(bank->context.irqenable1,
> + bank->base + bank->regs->irqenable);
> + __raw_writel(bank->context.irqenable2,
> + bank->base + bank->regs->irqenable2);
> + __raw_writel(bank->context.wake_en,
> + bank->base + bank->regs->wkupstatus);
> + __raw_writel(bank->context.ctrl,
> + bank->base + bank->regs->ctrl);
> + __raw_writel(bank->context.oe,
> + bank->base + bank->regs->direction);
> + __raw_writel(bank->context.leveldetect0,
> + bank->base + bank->regs->leveldetect0);
> + __raw_writel(bank->context.leveldetect1,
> + bank->base + bank->regs->leveldetect1);
> + __raw_writel(bank->context.risingdetect,
> + bank->base + bank->regs->risingdetect);
> + __raw_writel(bank->context.fallingdetect,
> + bank->base + bank->regs->fallingdetect);
> + __raw_writel(bank->context.dataout,
> + bank->base + bank->regs->dataout);
> }
>
> #endif
> --
> 1.6.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe
> linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
@ 2011-05-26 9:42 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:42 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: linux-omap-owner at vger.kernel.org
> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap at vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; DebBarma, Tarun Kanti;
> Varadarajan, Charulatha
> Subject: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets
> in ctxt save/restore
>
> It is not required to use hard-coded offsets any more in context
> save and restore functions and instead use the generic offsets
> which have been correctly initialized during device registration.
>
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/gpio.c | 2 +
> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> drivers/gpio/gpio_omap.c | 123
> ++++++++++----------------------
> 3 files changed, 40 insertions(+), 86 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
> index 0f8782f..5c888dd 100644
[snip]...[snip]
> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
> index 28390a9..05c2857 100644
> --- a/drivers/gpio/gpio_omap.c
> +++ b/drivers/gpio/gpio_omap.c
> @@ -1395,96 +1395,47 @@ restore_gpio_ctx:
>
> void omap_gpio_save_context(struct gpio_bank *bank)
> {
[sp] The [PATCH 06/15] OMAP4: GPIO: Save/restore context
seems to be doing exactly opposite:
It introduces the checks for
[quote]
+ if (bank->method == METHOD_GPIO_24XX) {
...
...
+ } else if (bank->method == METHOD_GPIO_44XX) {
[/quote]
and this patch removes the same checks.
Am I missing something?
~sanjeev
> - if (bank->method == METHOD_GPIO_24XX) {
> - bank->context.irqenable1 = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_IRQENABLE1);
> - bank->context.irqenable2 = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_IRQENABLE2);
> - bank->context.wake_en = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_WAKE_EN);
> - bank->context.ctrl = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_CTRL);
> - bank->context.oe = __raw_readl(
> - bank->base + OMAP24XX_GPIO_OE);
> - bank->context.leveldetect0 = __raw_readl(bank->base +
> - OMAP24XX_GPIO_LEVELDETECT0);
> - bank->context.leveldetect1 = __raw_readl(bank->base +
> - OMAP24XX_GPIO_LEVELDETECT1);
> - bank->context.risingdetect = __raw_readl(bank->base +
> - OMAP24XX_GPIO_RISINGDETECT);
> - bank->context.fallingdetect = __raw_readl(bank->base +
> - OMAP24XX_GPIO_FALLINGDETECT);
> - bank->context.dataout = __raw_readl(
> - bank->base +
> OMAP24XX_GPIO_DATAOUT);
> - } else if (bank->method == METHOD_GPIO_44XX) {
> - bank->context.irqenable1 = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQSTATUSSET0);
> - bank->context.irqenable2 = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQSTATUSSET1);
> - bank->context.wake_en = __raw_readl(
> - bank->base +
> OMAP4_GPIO_IRQWAKEN0);
> - bank->context.ctrl = __raw_readl(
> - bank->base + OMAP4_GPIO_CTRL);
> - bank->context.oe = __raw_readl(
> - bank->base + OMAP24XX_GPIO_OE);
> - bank->context.leveldetect0 = __raw_readl(bank->base +
> - OMAP4_GPIO_LEVELDETECT0);
> - bank->context.leveldetect1 = __raw_readl(bank->base +
> - OMAP4_GPIO_LEVELDETECT1);
> - bank->context.risingdetect = __raw_readl(bank->base +
> - OMAP4_GPIO_RISINGDETECT);
> - bank->context.fallingdetect = __raw_readl(bank->base +
> - OMAP4_GPIO_FALLINGDETECT);
> - bank->context.dataout = __raw_readl(
> - bank->base +
> OMAP4_GPIO_DATAOUT);
> - }
> + bank->context.irqenable1 =
> + __raw_readl(bank->base + bank->regs->irqenable);
> + bank->context.irqenable2 =
> + __raw_readl(bank->base +
> bank->regs->irqenable2);
> + bank->context.wake_en =
> + __raw_readl(bank->base +
> bank->regs->wkupstatus);
> + bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
> + bank->context.oe = __raw_readl(bank->base +
> bank->regs->direction);
> + bank->context.leveldetect0 =
> + __raw_readl(bank->base +
> bank->regs->leveldetect0);
> + bank->context.leveldetect1 =
> + __raw_readl(bank->base +
> bank->regs->leveldetect1);
> + bank->context.risingdetect =
> + __raw_readl(bank->base +
> bank->regs->risingdetect);
> + bank->context.fallingdetect =
> + __raw_readl(bank->base +
> bank->regs->fallingdetect);
> + bank->context.dataout = __raw_readl(bank->base +
> bank->regs->dataout);
> }
>
> void omap_gpio_restore_context(struct gpio_bank *bank)
> {
> - if (bank->method == METHOD_GPIO_24XX) {
> - __raw_writel(bank->context.irqenable1, bank->base +
> -
> OMAP24XX_GPIO_IRQENABLE1);
> - __raw_writel(bank->context.irqenable2, bank->base +
> -
> OMAP24XX_GPIO_IRQENABLE2);
> - __raw_writel(bank->context.wake_en, bank->base +
> - OMAP24XX_GPIO_WAKE_EN);
> - __raw_writel(bank->context.ctrl, bank->base +
> - OMAP24XX_GPIO_CTRL);
> - __raw_writel(bank->context.oe, bank->base +
> - OMAP24XX_GPIO_OE);
> - __raw_writel(bank->context.leveldetect0, bank->base +
> -
> OMAP24XX_GPIO_LEVELDETECT0);
> - __raw_writel(bank->context.leveldetect1, bank->base +
> -
> OMAP24XX_GPIO_LEVELDETECT1);
> - __raw_writel(bank->context.risingdetect, bank->base +
> -
> OMAP24XX_GPIO_RISINGDETECT);
> - __raw_writel(bank->context.fallingdetect, bank->base +
> -
> OMAP24XX_GPIO_FALLINGDETECT);
> - __raw_writel(bank->context.dataout, bank->base +
> - OMAP24XX_GPIO_DATAOUT);
> - } else if (bank->method == METHOD_GPIO_44XX) {
> - __raw_writel(bank->context.irqenable1, bank->base +
> -
> OMAP4_GPIO_IRQSTATUSSET0);
> - __raw_writel(bank->context.irqenable2, bank->base +
> -
> OMAP4_GPIO_IRQSTATUSSET1);
> - __raw_writel(bank->context.wake_en, bank->base +
> - OMAP4_GPIO_IRQWAKEN0);
> - __raw_writel(bank->context.ctrl, bank->base +
> - OMAP4_GPIO_CTRL);
> - __raw_writel(bank->context.oe, bank->base +
> - OMAP24XX_GPIO_OE);
> - __raw_writel(bank->context.leveldetect0, bank->base +
> -
> OMAP4_GPIO_LEVELDETECT0);
> - __raw_writel(bank->context.leveldetect1, bank->base +
> -
> OMAP4_GPIO_LEVELDETECT1);
> - __raw_writel(bank->context.risingdetect, bank->base +
> -
> OMAP4_GPIO_RISINGDETECT);
> - __raw_writel(bank->context.fallingdetect, bank->base +
> -
> OMAP4_GPIO_FALLINGDETECT);
> - __raw_writel(bank->context.dataout, bank->base +
> - OMAP4_GPIO_DATAOUT);
> - }
> + __raw_writel(bank->context.irqenable1,
> + bank->base + bank->regs->irqenable);
> + __raw_writel(bank->context.irqenable2,
> + bank->base + bank->regs->irqenable2);
> + __raw_writel(bank->context.wake_en,
> + bank->base + bank->regs->wkupstatus);
> + __raw_writel(bank->context.ctrl,
> + bank->base + bank->regs->ctrl);
> + __raw_writel(bank->context.oe,
> + bank->base + bank->regs->direction);
> + __raw_writel(bank->context.leveldetect0,
> + bank->base + bank->regs->leveldetect0);
> + __raw_writel(bank->context.leveldetect1,
> + bank->base + bank->regs->leveldetect1);
> + __raw_writel(bank->context.risingdetect,
> + bank->base + bank->regs->risingdetect);
> + __raw_writel(bank->context.fallingdetect,
> + bank->base + bank->regs->fallingdetect);
> + __raw_writel(bank->context.dataout,
> + bank->base + bank->regs->dataout);
> }
>
> #endif
> --
> 1.6.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe
> linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 9:23 ` Premi, Sanjeev
@ 2011-05-26 9:43 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:43 UTC (permalink / raw)
To: Premi, Sanjeev
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Cousson, Benoit, Paul Walmsley
Sanjeev,
Thanks for the comments.
On Thu, May 26, 2011 at 14:53, Premi, Sanjeev <premi@ti.com> wrote:
>
>
>> -----Original Message-----
>> From: linux-omap-owner@vger.kernel.org
>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap@vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>> linux-arm-kernel@lists.infradead.org; Varadarajan,
>> Charulatha; Cousson, Benoit; Paul Walmsley
>> Subject: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO
>> and rev_ids
>>
>> From: Charulatha V <charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same
>> for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 - 2
>> OMAP4 - 3
>
> [sp] Magic numbers should be avoided.
> Suggest using something like:
> #define GPIO_REV_2420 0
> #define GPIO_REV_2430 1
> #define GPIO_REV_34XX 2
> #define GPIO_REV_44xx 3
>
> We don't have to refer back to this comment while reading the code.
Okay.
> I also believed that HWMODs were auto generated.
> Can the changes to structures in this patch recreated using current
> scripts?
Benoit's and Paul's ack is required for this change.
>
> ~sanjeev
>
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Cc: Cousson, Benoit <b-cousson@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 26
>> ++++++++++++++++++++++++--
>> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 11 +++--------
>> 6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
>> omap_hwmod *oh, void *unused)
>> return -ENOMEM;
>> }
>>
>> + switch (oh->class->rev) {
>> + case 0:
>> + if (id == 1)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + pdata->non_wakeup_gpios = 0xe203ffc0;
>> + else if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + pdata->non_wakeup_gpios = 0x08700040;
>> + break;
>> + case 2:
>> + if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + pdata->non_wakeup_gpios = 0x00000001;
>> + else if (id == 6)
>> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + pdata->non_wakeup_gpios = 0x08000000;
>> + break;
>
> [sp] Where is the description on non-wakeup GPIOs in OMAP3?
As mentioned in other reply, I am referring to
Table 25-5. GPIO Channel Description at page no 3354
OMAP3430 public TRM Version P. Please correct me if I am wrong.
> Here is text from AM37x TRM:
> [quote ...only relevant text]
> Each GPIO module provides 32 dedicated general-purpose pins with input
> and output capabilities; .... These pins can be configured for the
> following applications:
> - Data input (capture)/output (drive)
> - Keyboard interface with a debounce cell
> - Interrupt generation in ....
> - Wake-up request generation in idle mode
> [/quote]
> Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
>
>> + default:
>> + /* No non-wakeup GPIO pins for other SoCs */
>> + break;
>> + }
>> +
>
> ~sanjeev
>
> [snip]...[snip]
>
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To unsubscribe from this list: send the line "unsubscribe linux-omap" in
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 9:43 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:43 UTC (permalink / raw)
To: linux-arm-kernel
Sanjeev,
Thanks for the comments.
On Thu, May 26, 2011 at 14:53, Premi, Sanjeev <premi@ti.com> wrote:
>
>
>> -----Original Message-----
>> From: linux-omap-owner at vger.kernel.org
>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap at vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>> linux-arm-kernel at lists.infradead.org; Varadarajan,
>> Charulatha; Cousson, Benoit; Paul Walmsley
>> Subject: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO
>> and rev_ids
>>
>> From: Charulatha V <charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same
>> for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 ? ?- 2
>> OMAP4 ? ?- 3
>
> [sp] Magic numbers should be avoided.
> ? ? Suggest using something like:
> ? ? #define GPIO_REV_2420 ? ? ?0
> ? ? #define GPIO_REV_2430 ? ? ?1
> ? ? #define GPIO_REV_34XX ? ? ?2
> ? ? #define GPIO_REV_44xx ? ? ?3
>
> ? ? We don't have to refer back to this comment while reading the code.
Okay.
> ? ? I also believed that HWMODs were auto generated.
> ? ? Can the changes to structures in this patch recreated using current
> ? ? scripts?
Benoit's and Paul's ack is required for this change.
>
> ~sanjeev
>
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Cc: Cousson, Benoit <b-cousson@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> ---
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? ? ? | ? 26
>> ++++++++++++++++++++++++--
>> ?arch/arm/mach-omap2/omap_hwmod_2430_data.c | ? ?2 +-
>> ?arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ? ?2 +-
>> ?arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ? ?2 +-
>> ?arch/arm/plat-omap/include/plat/gpio.h ? ? | ? ?1 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? ? ? | ? 11 +++--------
>> ?6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
>> omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? return -ENOMEM;
>> ? ? ? }
>>
>> + ? ? switch (oh->class->rev) {
>> + ? ? case 0:
>> + ? ? ? ? ? ? if (id == 1)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0xe203ffc0;
>> + ? ? ? ? ? ? else if (id == 2)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x08700040;
>> + ? ? ? ? ? ? break;
>> + ? ? case 2:
>> + ? ? ? ? ? ? if (id == 2)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x00000001;
>> + ? ? ? ? ? ? else if (id == 6)
>> + ? ? ? ? ? ? ? ? ? ? /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + ? ? ? ? ? ? ? ? ? ? pdata->non_wakeup_gpios = 0x08000000;
>> + ? ? ? ? ? ? break;
>
> [sp] Where is the description on non-wakeup GPIOs in OMAP3?
As mentioned in other reply, I am referring to
Table 25-5. GPIO Channel Description at page no 3354
OMAP3430 public TRM Version P. Please correct me if I am wrong.
> ? ? Here is text from AM37x TRM:
> ? ? [quote ...only relevant text]
> ? ? Each GPIO module provides 32 dedicated general-purpose pins with input
> ? ? and output capabilities; .... These pins can be configured for the
> ? ? following applications:
> ? ? - Data input (capture)/output (drive)
> ? ? - Keyboard interface with a debounce cell
> ? ? - Interrupt generation in ....
> ? ? - Wake-up request generation in idle mode
> ? ? [/quote]
> ? ? Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> ? ? GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
>
>> + ? ? default:
>> + ? ? ? ? ? ? /* No non-wakeup GPIO pins for other SoCs */
>> + ? ? ? ? ? ? break;
>> + ? ? }
>> +
>
> ~sanjeev
>
> [snip]...[snip]
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
2011-05-26 9:42 ` Premi, Sanjeev
@ 2011-05-26 9:48 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:48 UTC (permalink / raw)
To: Premi, Sanjeev, Hilman, Kevin
Cc: DebBarma, Tarun Kanti, linux-omap, Shilimkar, Santosh, tony,
linux-arm-kernel
Sanjeev,
On Thu, May 26, 2011 at 15:12, Premi, Sanjeev <premi@ti.com> wrote:
>> -----Original Message-----
>> From: linux-omap-owner@vger.kernel.org
>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap@vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>> linux-arm-kernel@lists.infradead.org; DebBarma, Tarun Kanti;
>> Varadarajan, Charulatha
>> Subject: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets
>> in ctxt save/restore
>>
>> It is not required to use hard-coded offsets any more in context
>> save and restore functions and instead use the generic offsets
>> which have been correctly initialized during device registration.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 2 +
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 123
>> ++++++++++----------------------
>> 3 files changed, 40 insertions(+), 86 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0f8782f..5c888dd 100644
>
> [snip]...[snip]
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 28390a9..05c2857 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -1395,96 +1395,47 @@ restore_gpio_ctx:
>>
>> void omap_gpio_save_context(struct gpio_bank *bank)
>> {
>
> [sp] The [PATCH 06/15] OMAP4: GPIO: Save/restore context
> seems to be doing exactly opposite:
> It introduces the checks for
> [quote]
> + if (bank->method == METHOD_GPIO_24XX) {
> ...
> ...
> + } else if (bank->method == METHOD_GPIO_44XX) {
> [/quote]
>
> and this patch removes the same checks.
>
> Am I missing something?
Patch 6 introduces the save/restore context code for OMAP4 and this patch
tries to replace all the macro usage with the reg offset values which is nothing
but cleanup.
Based on your comments and Kevin's I understand that I should make cleanups
first and then any fixes/functionality changes to avoid confusions.
Will do that and send a revised series next week.
-V Charulatha
>
> ~sanjeev
>
>
>> - if (bank->method == METHOD_GPIO_24XX) {
>> - bank->context.irqenable1 = __raw_readl(
>> - bank->base +
>> OMAP24XX_GPIO_IRQENABLE1);
>> - bank->context.irqenable2 = __raw_readl(
>> - bank->base +
>> OMAP24XX_GPIO_IRQENABLE2);
>> - bank->context.wake_en = __raw_readl(
>> - bank->base +
>> OMAP24XX_GPIO_WAKE_EN);
>> - bank->context.ctrl = __raw_readl(
>> - bank->base +
>> OMAP24XX_GPIO_CTRL);
>> - bank->context.oe = __raw_readl(
>> - bank->base + OMAP24XX_GPIO_OE);
>> - bank->context.leveldetect0 = __raw_readl(bank->base +
>> - OMAP24XX_GPIO_LEVELDETECT0);
>> - bank->context.leveldetect1 = __raw_readl(bank->base +
>> - OMAP24XX_GPIO_LEVELDETECT1);
>> - bank->context.risingdetect = __raw_readl(bank->base +
>> - OMAP24XX_GPIO_RISINGDETECT);
>> - bank->context.fallingdetect = __raw_readl(bank->base +
>> - OMAP24XX_GPIO_FALLINGDETECT);
>> - bank->context.dataout = __raw_readl(
>> - bank->base +
>> OMAP24XX_GPIO_DATAOUT);
>> - } else if (bank->method == METHOD_GPIO_44XX) {
>> - bank->context.irqenable1 = __raw_readl(
>> - bank->base +
>> OMAP4_GPIO_IRQSTATUSSET0);
>> - bank->context.irqenable2 = __raw_readl(
>> - bank->base +
>> OMAP4_GPIO_IRQSTATUSSET1);
>> - bank->context.wake_en = __raw_readl(
>> - bank->base +
>> OMAP4_GPIO_IRQWAKEN0);
>> - bank->context.ctrl = __raw_readl(
>> - bank->base + OMAP4_GPIO_CTRL);
>> - bank->context.oe = __raw_readl(
>> - bank->base + OMAP24XX_GPIO_OE);
>> - bank->context.leveldetect0 = __raw_readl(bank->base +
>> - OMAP4_GPIO_LEVELDETECT0);
>> - bank->context.leveldetect1 = __raw_readl(bank->base +
>> - OMAP4_GPIO_LEVELDETECT1);
>> - bank->context.risingdetect = __raw_readl(bank->base +
>> - OMAP4_GPIO_RISINGDETECT);
>> - bank->context.fallingdetect = __raw_readl(bank->base +
>> - OMAP4_GPIO_FALLINGDETECT);
>> - bank->context.dataout = __raw_readl(
>> - bank->base +
>> OMAP4_GPIO_DATAOUT);
>> - }
>> + bank->context.irqenable1 =
>> + __raw_readl(bank->base + bank->regs->irqenable);
>> + bank->context.irqenable2 =
>> + __raw_readl(bank->base +
>> bank->regs->irqenable2);
>> + bank->context.wake_en =
>> + __raw_readl(bank->base +
>> bank->regs->wkupstatus);
>> + bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
>> + bank->context.oe = __raw_readl(bank->base +
>> bank->regs->direction);
>> + bank->context.leveldetect0 =
>> + __raw_readl(bank->base +
>> bank->regs->leveldetect0);
>> + bank->context.leveldetect1 =
>> + __raw_readl(bank->base +
>> bank->regs->leveldetect1);
>> + bank->context.risingdetect =
>> + __raw_readl(bank->base +
>> bank->regs->risingdetect);
>> + bank->context.fallingdetect =
>> + __raw_readl(bank->base +
>> bank->regs->fallingdetect);
>> + bank->context.dataout = __raw_readl(bank->base +
>> bank->regs->dataout);
>> }
>>
>> void omap_gpio_restore_context(struct gpio_bank *bank)
>> {
>> - if (bank->method == METHOD_GPIO_24XX) {
>> - __raw_writel(bank->context.irqenable1, bank->base +
>> -
>> OMAP24XX_GPIO_IRQENABLE1);
>> - __raw_writel(bank->context.irqenable2, bank->base +
>> -
>> OMAP24XX_GPIO_IRQENABLE2);
>> - __raw_writel(bank->context.wake_en, bank->base +
>> - OMAP24XX_GPIO_WAKE_EN);
>> - __raw_writel(bank->context.ctrl, bank->base +
>> - OMAP24XX_GPIO_CTRL);
>> - __raw_writel(bank->context.oe, bank->base +
>> - OMAP24XX_GPIO_OE);
>> - __raw_writel(bank->context.leveldetect0, bank->base +
>> -
>> OMAP24XX_GPIO_LEVELDETECT0);
>> - __raw_writel(bank->context.leveldetect1, bank->base +
>> -
>> OMAP24XX_GPIO_LEVELDETECT1);
>> - __raw_writel(bank->context.risingdetect, bank->base +
>> -
>> OMAP24XX_GPIO_RISINGDETECT);
>> - __raw_writel(bank->context.fallingdetect, bank->base +
>> -
>> OMAP24XX_GPIO_FALLINGDETECT);
>> - __raw_writel(bank->context.dataout, bank->base +
>> - OMAP24XX_GPIO_DATAOUT);
>> - } else if (bank->method == METHOD_GPIO_44XX) {
>> - __raw_writel(bank->context.irqenable1, bank->base +
>> -
>> OMAP4_GPIO_IRQSTATUSSET0);
>> - __raw_writel(bank->context.irqenable2, bank->base +
>> -
>> OMAP4_GPIO_IRQSTATUSSET1);
>> - __raw_writel(bank->context.wake_en, bank->base +
>> - OMAP4_GPIO_IRQWAKEN0);
>> - __raw_writel(bank->context.ctrl, bank->base +
>> - OMAP4_GPIO_CTRL);
>> - __raw_writel(bank->context.oe, bank->base +
>> - OMAP24XX_GPIO_OE);
>> - __raw_writel(bank->context.leveldetect0, bank->base +
>> -
>> OMAP4_GPIO_LEVELDETECT0);
>> - __raw_writel(bank->context.leveldetect1, bank->base +
>> -
>> OMAP4_GPIO_LEVELDETECT1);
>> - __raw_writel(bank->context.risingdetect, bank->base +
>> -
>> OMAP4_GPIO_RISINGDETECT);
>> - __raw_writel(bank->context.fallingdetect, bank->base +
>> -
>> OMAP4_GPIO_FALLINGDETECT);
>> - __raw_writel(bank->context.dataout, bank->base +
>> - OMAP4_GPIO_DATAOUT);
>> - }
>> + __raw_writel(bank->context.irqenable1,
>> + bank->base + bank->regs->irqenable);
>> + __raw_writel(bank->context.irqenable2,
>> + bank->base + bank->regs->irqenable2);
>> + __raw_writel(bank->context.wake_en,
>> + bank->base + bank->regs->wkupstatus);
>> + __raw_writel(bank->context.ctrl,
>> + bank->base + bank->regs->ctrl);
>> + __raw_writel(bank->context.oe,
>> + bank->base + bank->regs->direction);
>> + __raw_writel(bank->context.leveldetect0,
>> + bank->base + bank->regs->leveldetect0);
>> + __raw_writel(bank->context.leveldetect1,
>> + bank->base + bank->regs->leveldetect1);
>> + __raw_writel(bank->context.risingdetect,
>> + bank->base + bank->regs->risingdetect);
>> + __raw_writel(bank->context.fallingdetect,
>> + bank->base + bank->regs->fallingdetect);
>> + __raw_writel(bank->context.dataout,
>> + bank->base + bank->regs->dataout);
>> }
>>
>> #endif
>> --
>> 1.6.0.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe
>> linux-omap" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
--
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore
@ 2011-05-26 9:48 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:48 UTC (permalink / raw)
To: linux-arm-kernel
Sanjeev,
On Thu, May 26, 2011 at 15:12, Premi, Sanjeev <premi@ti.com> wrote:
>> -----Original Message-----
>> From: linux-omap-owner at vger.kernel.org
>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap at vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>> linux-arm-kernel at lists.infradead.org; DebBarma, Tarun Kanti;
>> Varadarajan, Charulatha
>> Subject: [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets
>> in ctxt save/restore
>>
>> It is not required to use hard-coded offsets any more in context
>> save and restore functions and instead use the generic offsets
>> which have been correctly initialized during device registration.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? | ? ?2 +
>> ?arch/arm/plat-omap/include/plat/gpio.h | ? ?1 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? | ?123
>> ++++++++++----------------------
>> ?3 files changed, 40 insertions(+), 86 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0f8782f..5c888dd 100644
>
> [snip]...[snip]
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 28390a9..05c2857 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -1395,96 +1395,47 @@ restore_gpio_ctx:
>>
>> ?void omap_gpio_save_context(struct gpio_bank *bank)
>> ?{
>
> [sp] The [PATCH 06/15] OMAP4: GPIO: Save/restore context
> ? ? seems to be doing exactly opposite:
> ? ? It introduces the checks for
> [quote]
> ?+ ? ? ? ? ? ? ?if (bank->method == METHOD_GPIO_24XX) {
> ...
> ...
> ?+ ? ? ? ? ? ? ?} else if (bank->method == METHOD_GPIO_44XX) {
> [/quote]
>
> and this patch removes the same checks.
>
> Am I missing something?
Patch 6 introduces the save/restore context code for OMAP4 and this patch
tries to replace all the macro usage with the reg offset values which is nothing
but cleanup.
Based on your comments and Kevin's I understand that I should make cleanups
first and then any fixes/functionality changes to avoid confusions.
Will do that and send a revised series next week.
-V Charulatha
>
> ~sanjeev
>
>
>> - ? ? if (bank->method == METHOD_GPIO_24XX) {
>> - ? ? ? ? ? ? bank->context.irqenable1 = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP24XX_GPIO_IRQENABLE1);
>> - ? ? ? ? ? ? bank->context.irqenable2 = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP24XX_GPIO_IRQENABLE2);
>> - ? ? ? ? ? ? bank->context.wake_en = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP24XX_GPIO_WAKE_EN);
>> - ? ? ? ? ? ? bank->context.ctrl = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP24XX_GPIO_CTRL);
>> - ? ? ? ? ? ? bank->context.oe = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + OMAP24XX_GPIO_OE);
>> - ? ? ? ? ? ? bank->context.leveldetect0 = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_LEVELDETECT0);
>> - ? ? ? ? ? ? bank->context.leveldetect1 = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_LEVELDETECT1);
>> - ? ? ? ? ? ? bank->context.risingdetect = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_RISINGDETECT);
>> - ? ? ? ? ? ? bank->context.fallingdetect = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_FALLINGDETECT);
>> - ? ? ? ? ? ? bank->context.dataout = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP24XX_GPIO_DATAOUT);
>> - ? ? } else if (bank->method == METHOD_GPIO_44XX) {
>> - ? ? ? ? ? ? bank->context.irqenable1 = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP4_GPIO_IRQSTATUSSET0);
>> - ? ? ? ? ? ? bank->context.irqenable2 = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP4_GPIO_IRQSTATUSSET1);
>> - ? ? ? ? ? ? bank->context.wake_en = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP4_GPIO_IRQWAKEN0);
>> - ? ? ? ? ? ? bank->context.ctrl = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + OMAP4_GPIO_CTRL);
>> - ? ? ? ? ? ? bank->context.oe = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + OMAP24XX_GPIO_OE);
>> - ? ? ? ? ? ? bank->context.leveldetect0 = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_LEVELDETECT0);
>> - ? ? ? ? ? ? bank->context.leveldetect1 = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_LEVELDETECT1);
>> - ? ? ? ? ? ? bank->context.risingdetect = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_RISINGDETECT);
>> - ? ? ? ? ? ? bank->context.fallingdetect = __raw_readl(bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_FALLINGDETECT);
>> - ? ? ? ? ? ? bank->context.dataout = __raw_readl(
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base +
>> OMAP4_GPIO_DATAOUT);
>> - ? ? }
>> + ? ? bank->context.irqenable1 =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base + bank->regs->irqenable);
>> + ? ? bank->context.irqenable2 =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->irqenable2);
>> + ? ? bank->context.wake_en =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->wkupstatus);
>> + ? ? bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
>> + ? ? bank->context.oe = __raw_readl(bank->base +
>> bank->regs->direction);
>> + ? ? bank->context.leveldetect0 =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->leveldetect0);
>> + ? ? bank->context.leveldetect1 =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->leveldetect1);
>> + ? ? bank->context.risingdetect =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->risingdetect);
>> + ? ? bank->context.fallingdetect =
>> + ? ? ? ? ? ? ? ? ? ? __raw_readl(bank->base +
>> bank->regs->fallingdetect);
>> + ? ? bank->context.dataout = __raw_readl(bank->base +
>> bank->regs->dataout);
>> ?}
>>
>> ?void omap_gpio_restore_context(struct gpio_bank *bank)
>> ?{
>> - ? ? if (bank->method == METHOD_GPIO_24XX) {
>> - ? ? ? ? ? ? __raw_writel(bank->context.irqenable1, bank->base +
>> -
>> OMAP24XX_GPIO_IRQENABLE1);
>> - ? ? ? ? ? ? __raw_writel(bank->context.irqenable2, bank->base +
>> -
>> OMAP24XX_GPIO_IRQENABLE2);
>> - ? ? ? ? ? ? __raw_writel(bank->context.wake_en, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_WAKE_EN);
>> - ? ? ? ? ? ? __raw_writel(bank->context.ctrl, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_CTRL);
>> - ? ? ? ? ? ? __raw_writel(bank->context.oe, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_OE);
>> - ? ? ? ? ? ? __raw_writel(bank->context.leveldetect0, bank->base +
>> -
>> OMAP24XX_GPIO_LEVELDETECT0);
>> - ? ? ? ? ? ? __raw_writel(bank->context.leveldetect1, bank->base +
>> -
>> OMAP24XX_GPIO_LEVELDETECT1);
>> - ? ? ? ? ? ? __raw_writel(bank->context.risingdetect, bank->base +
>> -
>> OMAP24XX_GPIO_RISINGDETECT);
>> - ? ? ? ? ? ? __raw_writel(bank->context.fallingdetect, bank->base +
>> -
>> OMAP24XX_GPIO_FALLINGDETECT);
>> - ? ? ? ? ? ? __raw_writel(bank->context.dataout, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_DATAOUT);
>> - ? ? } else if (bank->method == METHOD_GPIO_44XX) {
>> - ? ? ? ? ? ? __raw_writel(bank->context.irqenable1, bank->base +
>> -
>> OMAP4_GPIO_IRQSTATUSSET0);
>> - ? ? ? ? ? ? __raw_writel(bank->context.irqenable2, bank->base +
>> -
>> OMAP4_GPIO_IRQSTATUSSET1);
>> - ? ? ? ? ? ? __raw_writel(bank->context.wake_en, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_IRQWAKEN0);
>> - ? ? ? ? ? ? __raw_writel(bank->context.ctrl, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_CTRL);
>> - ? ? ? ? ? ? __raw_writel(bank->context.oe, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_OE);
>> - ? ? ? ? ? ? __raw_writel(bank->context.leveldetect0, bank->base +
>> -
>> OMAP4_GPIO_LEVELDETECT0);
>> - ? ? ? ? ? ? __raw_writel(bank->context.leveldetect1, bank->base +
>> -
>> OMAP4_GPIO_LEVELDETECT1);
>> - ? ? ? ? ? ? __raw_writel(bank->context.risingdetect, bank->base +
>> -
>> OMAP4_GPIO_RISINGDETECT);
>> - ? ? ? ? ? ? __raw_writel(bank->context.fallingdetect, bank->base +
>> -
>> OMAP4_GPIO_FALLINGDETECT);
>> - ? ? ? ? ? ? __raw_writel(bank->context.dataout, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_DATAOUT);
>> - ? ? }
>> + ? ? __raw_writel(bank->context.irqenable1,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->irqenable);
>> + ? ? __raw_writel(bank->context.irqenable2,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->irqenable2);
>> + ? ? __raw_writel(bank->context.wake_en,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->wkupstatus);
>> + ? ? __raw_writel(bank->context.ctrl,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->ctrl);
>> + ? ? __raw_writel(bank->context.oe,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->direction);
>> + ? ? __raw_writel(bank->context.leveldetect0,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->leveldetect0);
>> + ? ? __raw_writel(bank->context.leveldetect1,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->leveldetect1);
>> + ? ? __raw_writel(bank->context.risingdetect,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->risingdetect);
>> + ? ? __raw_writel(bank->context.fallingdetect,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->fallingdetect);
>> + ? ? __raw_writel(bank->context.dataout,
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? bank->base + bank->regs->dataout);
>> ?}
>>
>> ?#endif
>> --
>> 1.6.0.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe
>> linux-omap" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
2011-05-25 23:27 ` Kevin Hilman
@ 2011-05-26 9:55 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:55 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 04:57, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Getting rid of ifdefs within the function by adding register offset intctrl
>> and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> ---
>> arch/arm/mach-omap1/gpio15xx.c | 14 ++++
>> arch/arm/mach-omap1/gpio16xx.c | 14 ++++
>> arch/arm/mach-omap1/gpio7xx.c | 14 ++++
>> arch/arm/mach-omap2/gpio.c | 4 +
>> arch/arm/plat-omap/include/plat/gpio.h | 3 +
>> drivers/gpio/gpio_omap.c | 125 +++++++-------------------------
>> 6 files changed, 77 insertions(+), 97 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index b0bd21e..ceee046 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> .wkupstatus = USHRT_MAX,
>> .wkupclear = USHRT_MAX,
>> .wkupset = USHRT_MAX,
>> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
>> + .edgectrl1 = USHRT_MAX,
>> + .edgectrl2 = USHRT_MAX,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>
> As before, drop the USHRT_MAX and just use non-zer value to determine if
> register exists.
>
>> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> .wkupstatus = USHRT_MAX,
>> .wkupclear = USHRT_MAX,
>> .wkupset = USHRT_MAX,
>> + .irqctrl = OMAP1510_GPIO_INT_CONTROL,
>> + .edgectrl1 = USHRT_MAX,
>> + .edgectrl2 = USHRT_MAX,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index 403437b..b2479c5 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> .wkupstatus = USHRT_MAX,
>> .wkupclear = USHRT_MAX,
>> .wkupset = USHRT_MAX,
>> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
>> + .edgectrl1 = USHRT_MAX,
>> + .edgectrl2 = USHRT_MAX,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
>> .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
>> .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
>> + .irqctrl = USHRT_MAX,
>> + .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
>> + .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index d5a4aaf..ceac936 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> .wkupstatus = USHRT_MAX,
>> .wkupclear = USHRT_MAX,
>> .wkupset = USHRT_MAX,
>> + .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE / 2,
>> + .edgectrl1 = USHRT_MAX,
>> + .edgectrl2 = USHRT_MAX,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> .wkupstatus = USHRT_MAX,
>> .wkupclear = USHRT_MAX,
>> .wkupset = USHRT_MAX,
>> + .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
>> + .edgectrl1 = USHRT_MAX,
>> + .edgectrl2 = USHRT_MAX,
>> + .leveldetect0 = USHRT_MAX,
>> + .leveldetect1 = USHRT_MAX,
>> + .risingdetect = USHRT_MAX,
>> + .fallingdetect = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index fbedbbb..eda1846 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> return -ENOMEM;
>> }
>>
>> + pdata->regs->irqctrl = USHRT_MAX;
>> + pdata->regs->edgectrl1 = USHRT_MAX;
>> + pdata->regs->edgectrl2 = USHRT_MAX;
>> +
>> switch (oh->class->rev) {
>> case 0:
>> case 1:
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index a341790..f82881c 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
>> u16 wkupstatus;
>> u16 wkupclear;
>> u16 wkupset;
>> + u16 irqctrl;
>> + u16 edgectrl1;
>> + u16 edgectrl2;
>>
>> bool irqenable_inv;
>> };
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 762d73c..ebeb16e 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
>> __raw_writel(val, reg);
>> }
>>
>> -#ifdef CONFIG_ARCH_OMAP2PLUS
>> -static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> +static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
>> int trigger)
>> {
>> void __iomem *base = bank->base;
>> u32 gpio_bit = 1 << gpio;
>> - u32 val;
>>
>> - if (cpu_is_omap44xx()) {
>> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
>> + MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
>> trigger & IRQ_TYPE_LEVEL_LOW);
>> - MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
>> + MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
>> trigger & IRQ_TYPE_LEVEL_HIGH);
>> - MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
>> + MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
>> trigger & IRQ_TYPE_EDGE_RISING);
>> - MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
>> + MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
>> trigger & IRQ_TYPE_EDGE_FALLING);
>> - } else {
>> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
>> - trigger & IRQ_TYPE_LEVEL_LOW);
>> - MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
>> - trigger & IRQ_TYPE_LEVEL_HIGH);
>> - MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
>> - trigger & IRQ_TYPE_EDGE_RISING);
>> - MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
>> - trigger & IRQ_TYPE_EDGE_FALLING);
>> - }
>>
>> if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
>> /*
>> @@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> __raw_readl(bank->base + bank->regs->leveldetect0) |
>> __raw_readl(bank->base + bank->regs->leveldetect1);
>> }
>> -#endif
>>
>> -#ifdef CONFIG_ARCH_OMAP1
>> /*
>> * This only applies to chips that can't do both rising and falling edge
>> * detection at once. For all other chips, this function is a noop.
>> */
>> static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>> {
>> - void __iomem *reg = bank->base;
>> + void __iomem *reg = bank->base + bank->regs->irqctrl;
>> u32 l = 0;
>
> Need to check for valid regs->irqctrl here.
Okay. I will move the check to this place.
>
>> - switch (bank->method) {
>> - case METHOD_MPUIO:
>> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
>> - break;
>> -#ifdef CONFIG_ARCH_OMAP15XX
>> - case METHOD_GPIO_1510:
>> - reg += OMAP1510_GPIO_INT_CONTROL;
>> - break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
>> - case METHOD_GPIO_7XX:
>> - reg += OMAP7XX_GPIO_INT_CONTROL;
>> - break;
>> -#endif
>> - default:
>> - return;
>> - }
>> -
>> l = __raw_readl(reg);
>> if ((l >> gpio) & 1)
>> l &= ~(1 << gpio);
>> @@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>>
>> __raw_writel(l, reg);
>> }
>> -#endif
>>
>> static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> {
>> void __iomem *reg = bank->base;
>> u32 l = 0;
>>
>> - switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP1
>> - case METHOD_MPUIO:
>> - reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
>> - l = __raw_readl(reg);
>> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> - bank->toggle_mask |= 1 << gpio;
>> - if (trigger & IRQ_TYPE_EDGE_RISING)
>> - l |= 1 << gpio;
>> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> - l &= ~(1 << gpio);
>> - else
>> - goto bad;
>> - break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP15XX
>> - case METHOD_GPIO_1510:
>> - reg += OMAP1510_GPIO_INT_CONTROL;
>> + if ((bank->regs->leveldetect0 != USHRT_MAX) &&
>> + (bank->regs->wkupstatus != USHRT_MAX)) {
>> + set_gpio_trigger(bank, gpio, trigger);
>> + } else if (bank->regs->irqctrl != USHRT_MAX) {
>> + reg += bank->regs->irqctrl;
>> +
>> l = __raw_readl(reg);
>> if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> bank->toggle_mask |= 1 << gpio;
>> @@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> l &= ~(1 << gpio);
>> else
>> - goto bad;
>> - break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - case METHOD_GPIO_1610:
>> + return -EINVAL;
>> +
>> + __raw_writel(l, reg);
>> +
>> + } else if (bank->regs->edgectrl1 != USHRT_MAX) {
>> if (gpio & 0x08)
>> - reg += OMAP1610_GPIO_EDGE_CTRL2;
>> + reg += bank->regs->edgectrl2;
>> else
>> - reg += OMAP1610_GPIO_EDGE_CTRL1;
>> + reg += bank->regs->edgectrl1;
>> +
>> gpio &= 0x07;
>> l = __raw_readl(reg);
>> l &= ~(3 << (gpio << 1));
>> @@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> l |= 2 << (gpio << 1);
>> if (trigger & IRQ_TYPE_EDGE_FALLING)
>> l |= 1 << (gpio << 1);
>> +
>> if (trigger)
>> /* Enable wake-up during idle for dynamic tick */
>> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
>> - else
>> - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
>> - break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
>> - case METHOD_GPIO_7XX:
>> - reg += OMAP7XX_GPIO_INT_CONTROL;
>> - l = __raw_readl(reg);
>> - if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> - bank->toggle_mask |= 1 << gpio;
>> - if (trigger & IRQ_TYPE_EDGE_RISING)
>> - l |= 1 << gpio;
>> - else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> - l &= ~(1 << gpio);
>> + __raw_writel(1 << gpio, bank->wake_set);
>> else
>> - goto bad;
>> - break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP2PLUS
>> - case METHOD_GPIO_24XX:
>> - case METHOD_GPIO_44XX:
>> - set_24xx_gpio_triggering(bank, gpio, trigger);
>> - return 0;
>> -#endif
>> - default:
>> - goto bad;
>> + __raw_writel(1 << gpio, bank->wake_clear);
>> +
>> + __raw_writel(l, reg);
>> }
>> - __raw_writel(l, reg);
>> +
>> return 0;
>> -bad:
>> - return -EINVAL;
>> }
>>
>> static int gpio_irq_type(struct irq_data *d, unsigned type)
>> @@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>> if (!(isr & 1))
>> continue;
>>
>> -#ifdef CONFIG_ARCH_OMAP1
>> /*
>> * Some chips can't respond to both rising and falling
>> * at the same time. If this irq was requested with
>> @@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>> * to respond to the IRQ for the opposite direction.
>> * This will be indicated in the bank toggle_mask.
>> */
>> - if (bank->toggle_mask & (1 << gpio_index))
>> + if ((bank->regs->irqctrl != USHRT_MAX) &&
>
> The valid register check belongs in function, not here.
>
>> + (bank->toggle_mask & (1 << gpio_index)))
>> _toggle_gpio_edge_triggering(bank, gpio_index);
>> -#endif
>
> This change isn't quite right, as we don't want (or need) do do this on
> OMAP2+. This really is an OMAP1-specific hack.
>
> For the purposes of this patch, leave the OMAP1 #ifdef. Then, in a
> subsequent patch, add another per-bank flag (passed in from pdata) that
> indicates whether we want to use this hack, and enable it for
> OMAP1-based platforms.
Agreed.
-V Charulatha
>
> Kevin
>
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function
@ 2011-05-26 9:55 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 9:55 UTC (permalink / raw)
To: linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 04:57, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> Getting rid of ifdefs within the function by adding register offset intctrl
>> and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> ---
>> ?arch/arm/mach-omap1/gpio15xx.c ? ? ? ? | ? 14 ++++
>> ?arch/arm/mach-omap1/gpio16xx.c ? ? ? ? | ? 14 ++++
>> ?arch/arm/mach-omap1/gpio7xx.c ? ? ? ? ?| ? 14 ++++
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? | ? ?4 +
>> ?arch/arm/plat-omap/include/plat/gpio.h | ? ?3 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? | ?125 +++++++-------------------------
>> ?6 files changed, 77 insertions(+), 97 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index b0bd21e..ceee046 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -46,6 +46,13 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> ? ? ? .wkupstatus ? ? = USHRT_MAX,
>> ? ? ? .wkupclear ? ? ?= USHRT_MAX,
>> ? ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> + ? ? .irqctrl ? ? ? ?= OMAP_MPUIO_GPIO_INT_EDGE,
>> + ? ? .edgectrl1 ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl2 ? ? ?= USHRT_MAX,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>
> As before, drop the USHRT_MAX and just use non-zer value to determine if
> register exists.
>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -91,6 +98,13 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> ? ? ? .wkupstatus ? ? = USHRT_MAX,
>> ? ? ? .wkupclear ? ? ?= USHRT_MAX,
>> ? ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> + ? ? .irqctrl ? ? ? ?= OMAP1510_GPIO_INT_CONTROL,
>> + ? ? .edgectrl1 ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl2 ? ? ?= USHRT_MAX,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index 403437b..b2479c5 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -49,6 +49,13 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> ? ? ? .wkupstatus ? ? = USHRT_MAX,
>> ? ? ? .wkupclear ? ? ?= USHRT_MAX,
>> ? ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> + ? ? .irqctrl ? ? ? ?= OMAP_MPUIO_GPIO_INT_EDGE,
>> + ? ? .edgectrl1 ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl2 ? ? ?= USHRT_MAX,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -97,6 +104,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> ? ? ? .wkupstatus ? ? = OMAP1610_GPIO_WAKEUPENABLE,
>> ? ? ? .wkupclear ? ? ?= OMAP1610_GPIO_CLEAR_WAKEUPENA,
>> ? ? ? .wkupset ? ? ? ?= OMAP1610_GPIO_SET_WAKEUPENA,
>> + ? ? .irqctrl ? ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl1 ? ? ?= OMAP1610_GPIO_EDGE_CTRL1,
>> + ? ? .edgectrl2 ? ? ?= OMAP1610_GPIO_EDGE_CTRL2,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index d5a4aaf..ceac936 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -51,6 +51,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> ? ? ? .wkupstatus ? ? = USHRT_MAX,
>> ? ? ? .wkupclear ? ? ?= USHRT_MAX,
>> ? ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> + ? ? .irqctrl ? ? ? ?= OMAP_MPUIO_GPIO_INT_EDGE / 2,
>> + ? ? .edgectrl1 ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl2 ? ? ?= USHRT_MAX,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -96,6 +103,13 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> ? ? ? .wkupstatus ? ? = USHRT_MAX,
>> ? ? ? .wkupclear ? ? ?= USHRT_MAX,
>> ? ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> + ? ? .irqctrl ? ? ? ?= OMAP7XX_GPIO_INT_CONTROL,
>> + ? ? .edgectrl1 ? ? ?= USHRT_MAX,
>> + ? ? .edgectrl2 ? ? ?= USHRT_MAX,
>> + ? ? .leveldetect0 ? = USHRT_MAX,
>> + ? ? .leveldetect1 ? = USHRT_MAX,
>> + ? ? .risingdetect ? = USHRT_MAX,
>> + ? ? .fallingdetect ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index fbedbbb..eda1846 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -92,6 +92,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? return -ENOMEM;
>> ? ? ? }
>>
>> + ? ? pdata->regs->irqctrl = USHRT_MAX;
>> + ? ? pdata->regs->edgectrl1 = USHRT_MAX;
>> + ? ? pdata->regs->edgectrl2 = USHRT_MAX;
>> +
>> ? ? ? switch (oh->class->rev) {
>> ? ? ? case 0:
>> ? ? ? case 1:
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index a341790..f82881c 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
>> ? ? ? u16 wkupstatus;
>> ? ? ? u16 wkupclear;
>> ? ? ? u16 wkupset;
>> + ? ? u16 irqctrl;
>> + ? ? u16 edgectrl1;
>> + ? ? u16 edgectrl2;
>>
>> ? ? ? bool irqenable_inv;
>> ?};
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index 762d73c..ebeb16e 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -202,33 +202,20 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
>> ? ? ? __raw_writel(val, reg);
>> ?}
>>
>> -#ifdef CONFIG_ARCH_OMAP2PLUS
>> -static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> +static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? int trigger)
>> ?{
>> ? ? ? void __iomem *base = bank->base;
>> ? ? ? u32 gpio_bit = 1 << gpio;
>> - ? ? u32 val;
>>
>> - ? ? if (cpu_is_omap44xx()) {
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
>> + ? ? MOD_REG_BIT(bank->regs->leveldetect0, gpio_bit,
>> ? ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_LEVEL_LOW);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
>> + ? ? MOD_REG_BIT(bank->regs->leveldetect1, gpio_bit,
>> ? ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_LEVEL_HIGH);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
>> + ? ? MOD_REG_BIT(bank->regs->risingdetect, gpio_bit,
>> ? ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_EDGE_RISING);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
>> + ? ? MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
>> ? ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_EDGE_FALLING);
>> - ? ? } else {
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
>> - ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_LEVEL_LOW);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
>> - ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_LEVEL_HIGH);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
>> - ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_EDGE_RISING);
>> - ? ? ? ? ? ? MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
>> - ? ? ? ? ? ? ? ? ? ? trigger & IRQ_TYPE_EDGE_FALLING);
>> - ? ? }
>>
>> ? ? ? if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
>> ? ? ? ? ? ? ? /*
>> @@ -259,36 +246,16 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
>> ? ? ? ? ? ? ? __raw_readl(bank->base + bank->regs->leveldetect0) |
>> ? ? ? ? ? ? ? __raw_readl(bank->base + bank->regs->leveldetect1);
>> ?}
>> -#endif
>>
>> -#ifdef CONFIG_ARCH_OMAP1
>> ?/*
>> ? * This only applies to chips that can't do both rising and falling edge
>> ? * detection at once. ?For all other chips, this function is a noop.
>> ? */
>> ?static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>> ?{
>> - ? ? void __iomem *reg = bank->base;
>> + ? ? void __iomem *reg = bank->base + bank->regs->irqctrl;
>> ? ? ? u32 l = 0;
>
> Need to check for valid regs->irqctrl here.
Okay. I will move the check to this place.
>
>> - ? ? switch (bank->method) {
>> - ? ? case METHOD_MPUIO:
>> - ? ? ? ? ? ? reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
>> - ? ? ? ? ? ? break;
>> -#ifdef CONFIG_ARCH_OMAP15XX
>> - ? ? case METHOD_GPIO_1510:
>> - ? ? ? ? ? ? reg += OMAP1510_GPIO_INT_CONTROL;
>> - ? ? ? ? ? ? break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
>> - ? ? case METHOD_GPIO_7XX:
>> - ? ? ? ? ? ? reg += OMAP7XX_GPIO_INT_CONTROL;
>> - ? ? ? ? ? ? break;
>> -#endif
>> - ? ? default:
>> - ? ? ? ? ? ? return;
>> - ? ? }
>> -
>> ? ? ? l = __raw_readl(reg);
>> ? ? ? if ((l >> gpio) & 1)
>> ? ? ? ? ? ? ? l &= ~(1 << gpio);
>> @@ -297,31 +264,18 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
>>
>> ? ? ? __raw_writel(l, reg);
>> ?}
>> -#endif
>>
>> ?static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> ?{
>> ? ? ? void __iomem *reg = bank->base;
>> ? ? ? u32 l = 0;
>>
>> - ? ? switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP1
>> - ? ? case METHOD_MPUIO:
>> - ? ? ? ? ? ? reg += OMAP_MPUIO_GPIO_INT_EDGE / bank->stride;
>> - ? ? ? ? ? ? l = __raw_readl(reg);
>> - ? ? ? ? ? ? if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> - ? ? ? ? ? ? ? ? ? ? bank->toggle_mask |= 1 << gpio;
>> - ? ? ? ? ? ? if (trigger & IRQ_TYPE_EDGE_RISING)
>> - ? ? ? ? ? ? ? ? ? ? l |= 1 << gpio;
>> - ? ? ? ? ? ? else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> - ? ? ? ? ? ? ? ? ? ? l &= ~(1 << gpio);
>> - ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? goto bad;
>> - ? ? ? ? ? ? break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP15XX
>> - ? ? case METHOD_GPIO_1510:
>> - ? ? ? ? ? ? reg += OMAP1510_GPIO_INT_CONTROL;
>> + ? ? if ((bank->regs->leveldetect0 != USHRT_MAX) &&
>> + ? ? ? ? ? ? ? ? ? ? (bank->regs->wkupstatus != USHRT_MAX)) {
>> + ? ? ? ? ? ? set_gpio_trigger(bank, gpio, trigger);
>> + ? ? } else if (bank->regs->irqctrl != USHRT_MAX) {
>> + ? ? ? ? ? ? reg += bank->regs->irqctrl;
>> +
>> ? ? ? ? ? ? ? l = __raw_readl(reg);
>> ? ? ? ? ? ? ? if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> ? ? ? ? ? ? ? ? ? ? ? bank->toggle_mask |= 1 << gpio;
>> @@ -330,15 +284,16 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> ? ? ? ? ? ? ? else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> ? ? ? ? ? ? ? ? ? ? ? l &= ~(1 << gpio);
>> ? ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? goto bad;
>> - ? ? ? ? ? ? break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - ? ? case METHOD_GPIO_1610:
>> + ? ? ? ? ? ? ? ? ? ? return -EINVAL;
>> +
>> + ? ? ? ? ? ? __raw_writel(l, reg);
>> +
>> + ? ? } else if (bank->regs->edgectrl1 != USHRT_MAX) {
>> ? ? ? ? ? ? ? if (gpio & 0x08)
>> - ? ? ? ? ? ? ? ? ? ? reg += OMAP1610_GPIO_EDGE_CTRL2;
>> + ? ? ? ? ? ? ? ? ? ? reg += bank->regs->edgectrl2;
>> ? ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? reg += OMAP1610_GPIO_EDGE_CTRL1;
>> + ? ? ? ? ? ? ? ? ? ? reg += bank->regs->edgectrl1;
>> +
>> ? ? ? ? ? ? ? gpio &= 0x07;
>> ? ? ? ? ? ? ? l = __raw_readl(reg);
>> ? ? ? ? ? ? ? l &= ~(3 << (gpio << 1));
>> @@ -346,40 +301,17 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
>> ? ? ? ? ? ? ? ? ? ? ? l |= 2 << (gpio << 1);
>> ? ? ? ? ? ? ? if (trigger & IRQ_TYPE_EDGE_FALLING)
>> ? ? ? ? ? ? ? ? ? ? ? l |= 1 << (gpio << 1);
>> +
>> ? ? ? ? ? ? ? if (trigger)
>> ? ? ? ? ? ? ? ? ? ? ? /* Enable wake-up during idle for dynamic tick */
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
>> - ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
>> - ? ? ? ? ? ? break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
>> - ? ? case METHOD_GPIO_7XX:
>> - ? ? ? ? ? ? reg += OMAP7XX_GPIO_INT_CONTROL;
>> - ? ? ? ? ? ? l = __raw_readl(reg);
>> - ? ? ? ? ? ? if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
>> - ? ? ? ? ? ? ? ? ? ? bank->toggle_mask |= 1 << gpio;
>> - ? ? ? ? ? ? if (trigger & IRQ_TYPE_EDGE_RISING)
>> - ? ? ? ? ? ? ? ? ? ? l |= 1 << gpio;
>> - ? ? ? ? ? ? else if (trigger & IRQ_TYPE_EDGE_FALLING)
>> - ? ? ? ? ? ? ? ? ? ? l &= ~(1 << gpio);
>> + ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->wake_set);
>> ? ? ? ? ? ? ? else
>> - ? ? ? ? ? ? ? ? ? ? goto bad;
>> - ? ? ? ? ? ? break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP2PLUS
>> - ? ? case METHOD_GPIO_24XX:
>> - ? ? case METHOD_GPIO_44XX:
>> - ? ? ? ? ? ? set_24xx_gpio_triggering(bank, gpio, trigger);
>> - ? ? ? ? ? ? return 0;
>> -#endif
>> - ? ? default:
>> - ? ? ? ? ? ? goto bad;
>> + ? ? ? ? ? ? ? ? ? ? __raw_writel(1 << gpio, bank->wake_clear);
>> +
>> + ? ? ? ? ? ? __raw_writel(l, reg);
>> ? ? ? }
>> - ? ? __raw_writel(l, reg);
>> +
>> ? ? ? return 0;
>> -bad:
>> - ? ? return -EINVAL;
>> ?}
>>
>> ?static int gpio_irq_type(struct irq_data *d, unsigned type)
>> @@ -678,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>> ? ? ? ? ? ? ? ? ? ? ? if (!(isr & 1))
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? continue;
>>
>> -#ifdef CONFIG_ARCH_OMAP1
>> ? ? ? ? ? ? ? ? ? ? ? /*
>> ? ? ? ? ? ? ? ? ? ? ? ?* Some chips can't respond to both rising and falling
>> ? ? ? ? ? ? ? ? ? ? ? ?* at the same time. ?If this irq was requested with
>> @@ -686,9 +617,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
>> ? ? ? ? ? ? ? ? ? ? ? ?* to respond to the IRQ for the opposite direction.
>> ? ? ? ? ? ? ? ? ? ? ? ?* This will be indicated in the bank toggle_mask.
>> ? ? ? ? ? ? ? ? ? ? ? ?*/
>> - ? ? ? ? ? ? ? ? ? ? if (bank->toggle_mask & (1 << gpio_index))
>> + ? ? ? ? ? ? ? ? ? ? if ((bank->regs->irqctrl != USHRT_MAX) &&
>
> The valid register check belongs in function, not here.
>
>> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (bank->toggle_mask & (1 << gpio_index)))
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? _toggle_gpio_edge_triggering(bank, gpio_index);
>> -#endif
>
> This change isn't quite right, as we don't want (or need) do do this on
> OMAP2+. ?This really is an OMAP1-specific hack.
>
> For the purposes of this patch, leave the OMAP1 #ifdef. ?Then, in a
> subsequent patch, add another per-bank flag (passed in from pdata) that
> indicates whether we want to use this hack, and enable it for
> OMAP1-based platforms.
Agreed.
-V Charulatha
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-26 9:58 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:58 UTC (permalink / raw)
To: DebBarma, Tarun Kanti, linux-omap
Cc: Hilman, Kevin, Shilimkar, Santosh, tony, linux-arm-kernel,
Varadarajan, Charulatha
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap@vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan, Charulatha
> Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
> gpio_bank structure
>
> From: Charulatha V <charu@ti.com>
>
> gpio_context array, which is used to save gpio bank's context,
> is used only for OMAP3 architecture.
>
> Move gpio_context as part of gpio_bank structure so that
> it can be specific to each gpio bank and can be used for
> any OMAP architecture
>
> TODO: extend the gpio save/restore context function for OMAP4
> architecture. This is done in one of the next patches in this
> series
[sp] Should this TODO be part of commit?
BTW, this is the last patch in the series.
~sanjeev
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
@ 2011-05-26 9:58 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:58 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: linux-omap-owner at vger.kernel.org
> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> DebBarma, Tarun Kanti
> Sent: Tuesday, May 24, 2011 7:55 PM
> To: linux-omap at vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan, Charulatha
> Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
> gpio_bank structure
>
> From: Charulatha V <charu@ti.com>
>
> gpio_context array, which is used to save gpio bank's context,
> is used only for OMAP3 architecture.
>
> Move gpio_context as part of gpio_bank structure so that
> it can be specific to each gpio bank and can be used for
> any OMAP architecture
>
> TODO: extend the gpio save/restore context function for OMAP4
> architecture. This is done in one of the next patches in this
> series
[sp] Should this TODO be part of commit?
BTW, this is the last patch in the series.
~sanjeev
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
2011-05-24 14:24 ` Tarun Kanti DebBarma
@ 2011-05-26 9:59 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:59 UTC (permalink / raw)
To: Premi, Sanjeev, DebBarma, Tarun Kanti, linux-omap
Cc: Hilman, Kevin, Shilimkar, Santosh, tony, linux-arm-kernel,
Varadarajan, Charulatha
> -----Original Message-----
> From: Premi, Sanjeev
> Sent: Thursday, May 26, 2011 3:29 PM
> To: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan, Charulatha
> Subject: RE: [PATCH 05/15] OMAP: GPIO: Make gpio_context part
> of gpio_bank structure
>
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org
> > [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> > DebBarma, Tarun Kanti
> > Sent: Tuesday, May 24, 2011 7:55 PM
> > To: linux-omap@vger.kernel.org
> > Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> > linux-arm-kernel@lists.infradead.org; Varadarajan, Charulatha
> > Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
> > gpio_bank structure
> >
> > From: Charulatha V <charu@ti.com>
> >
> > gpio_context array, which is used to save gpio bank's context,
> > is used only for OMAP3 architecture.
> >
> > Move gpio_context as part of gpio_bank structure so that
> > it can be specific to each gpio bank and can be used for
> > any OMAP architecture
> >
> > TODO: extend the gpio save/restore context function for OMAP4
> > architecture. This is done in one of the next patches in this
> > series
>
> [sp] Should this TODO be part of commit?
> BTW, this is the last patch in the series.
>
Sorry, mistake... This showed up last on my mailbox.
~sanjeev
> ~sanjeev
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
@ 2011-05-26 9:59 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 9:59 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Premi, Sanjeev
> Sent: Thursday, May 26, 2011 3:29 PM
> To: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org
> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan, Charulatha
> Subject: RE: [PATCH 05/15] OMAP: GPIO: Make gpio_context part
> of gpio_bank structure
>
> > -----Original Message-----
> > From: linux-omap-owner at vger.kernel.org
> > [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> > DebBarma, Tarun Kanti
> > Sent: Tuesday, May 24, 2011 7:55 PM
> > To: linux-omap at vger.kernel.org
> > Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> > linux-arm-kernel at lists.infradead.org; Varadarajan, Charulatha
> > Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
> > gpio_bank structure
> >
> > From: Charulatha V <charu@ti.com>
> >
> > gpio_context array, which is used to save gpio bank's context,
> > is used only for OMAP3 architecture.
> >
> > Move gpio_context as part of gpio_bank structure so that
> > it can be specific to each gpio bank and can be used for
> > any OMAP architecture
> >
> > TODO: extend the gpio save/restore context function for OMAP4
> > architecture. This is done in one of the next patches in this
> > series
>
> [sp] Should this TODO be part of commit?
> BTW, this is the last patch in the series.
>
Sorry, mistake... This showed up last on my mailbox.
~sanjeev
> ~sanjeev
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
2011-05-25 22:57 ` Kevin Hilman
@ 2011-05-26 10:02 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 10:02 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 04:27, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> Since wake_status, wake_clear, wake_set is common for all banks on a given
>> OMAP version it is enough to get their values once during probe().
>> Also, register offsets are already initialzed according to OMAP versions
>> during device registration. We no longer need these explicit checks.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> arch/arm/mach-omap1/gpio15xx.c | 6 ++
>> arch/arm/mach-omap1/gpio16xx.c | 6 ++
>> arch/arm/mach-omap1/gpio7xx.c | 6 ++
>> arch/arm/mach-omap2/gpio.c | 6 ++
>> arch/arm/plat-omap/include/plat/gpio.h | 3 +
>> drivers/gpio/gpio_omap.c | 102 +++++++-------------------------
>> 6 files changed, 49 insertions(+), 80 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index f18a4a9..b0bd21e 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
>> .irqenable_inv = true,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = USHRT_MAX,
>> + .wkupclear = USHRT_MAX,
>> + .wkupset = USHRT_MAX,
>> };
>
> Same comment as earlier about USHRT_MAX.
>
> Just use zero to indicate no register present.
>
>> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> .irqenable = OMAP1510_GPIO_INT_MASK,
>> .irqenable_inv = true,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = USHRT_MAX,
>> + .wkupclear = USHRT_MAX,
>> + .wkupset = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index d886b88..403437b 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT,
>> .irqenable_inv = true,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = USHRT_MAX,
>> + .wkupclear = USHRT_MAX,
>> + .wkupset = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
>> .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = OMAP1610_GPIO_WAKEUPENABLE,
>> + .wkupclear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
>> + .wkupset = OMAP1610_GPIO_SET_WAKEUPENA,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index c7684ce..d5a4aaf 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
>> .irqenable_inv = true,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = USHRT_MAX,
>> + .wkupclear = USHRT_MAX,
>> + .wkupset = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> .irqenable = OMAP7XX_GPIO_INT_MASK,
>> .irqenable_inv = true,
>> .ctrl = USHRT_MAX,
>> + .wkupstatus = USHRT_MAX,
>> + .wkupclear = USHRT_MAX,
>> + .wkupset = USHRT_MAX,
>> };
>>
>> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0782e06..7e79999 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
>> pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> + pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
>> + pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
>> + pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
>> break;
>> case 3:
>> pdata->bank_type = METHOD_GPIO_44XX;
>> @@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
>> pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
>> pdata->regs->ctrl = OMAP4_GPIO_CTRL;
>> + pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
>> + pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
>> + pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
>> break;
>> default:
>> WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index 5718a45..2d1a5d6 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
>> u16 debounce;
>> u16 debounce_en;
>> u16 ctrl;
>> + u16 wkupstatus;
>> + u16 wkupclear;
>> + u16 wkupset;
>
> s/wkup/wkup_/
Okay.
>
>> bool irqenable_inv;
>> };
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index fcc60be..c189416 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -77,6 +77,9 @@ struct gpio_bank {
>> u32 width;
>> u32 ctx_lost_cnt_before;
>> u16 id;
>> + void __iomem *wake_status;
>> + void __iomem *wake_clear;
>> + void __iomem *wake_set;
>>
>> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
>>
>> @@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
>> unsigned long flags;
>>
>> spin_lock_irqsave(&bank->lock, flags);
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - if (bank->method == METHOD_GPIO_1610) {
>> - /* Disable wake-up during idle for dynamic tick */
>> - void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - __raw_writel(1 << offset, reg);
>> - }
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - if (bank->method == METHOD_GPIO_24XX) {
>> - /* Disable wake-up during idle for dynamic tick */
>> - void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - __raw_writel(1 << offset, reg);
>> - }
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - if (bank->method == METHOD_GPIO_44XX) {
>> +
>> + if (bank->regs->wkupclear != USHRT_MAX)
>
> Here you check the 'regs' version...
>
>> /* Disable wake-up during idle for dynamic tick */
>> - void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - __raw_writel(1 << offset, reg);
>> - }
>> -#endif
>> + __raw_writel(1 << offset, bank->wake_clear);
>> +
>
> ...and here you write using the copy. Not good for readability. More
> on this below.
Agreed. Will do the needful.
>
>> bank->mod_usage &= ~(1 << offset);
>>
>> if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> @@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> goto err_free;
>> }
>>
>> + /*
>> + * Storing these addresses avoids redundant computation of these
>> + * values every time in suspend/resume functions and for all the
>> + * gpio banks.
>> + */
>> + bank->wake_status = bank->base + bank->regs->wkupstatus;
>> + bank->wake_clear = bank->base + bank->regs->wkupclear;
>> + bank->wake_set = bank->base + bank->regs->wkupset;
>
> Well, it's not really redundant since these are only used in the suspend
> and resume functions. I'd rather have an extra add in the
> suspend/resume functions than have 3 extra words in every struct gpio_bank.
>
> Also, Using 'bank + reg offset' in the functions that use them is
> consistent with the pattern of all the other changes in the cleanup
> series, so lets not start something new.
Agreed.
>
>> pm_runtime_enable(bank->dev);
>> pm_runtime_get_sync(bank->dev);
>>
>> @@ -1207,7 +1203,7 @@ err_exit:
>> }
>>
>> #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
>> -static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
>> +static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
>
> change not related to $SUBJECT patch
>
>> {
>> struct gpio_bank *bank;
>>
>> @@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
>> return 0;
>>
>> list_for_each_entry(bank, &omap_gpio_list, node) {
>> - void __iomem *wake_status;
>> - void __iomem *wake_clear;
>> - void __iomem *wake_set;
>
> IMO, these should stay here and should just be assigned 'bank->base +
> bank->regs->...'
Okay.
>
>> unsigned long flags;
>>
>> - switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - case METHOD_GPIO_1610:
>> - wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
>> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
>> - break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - case METHOD_GPIO_24XX:
>> - wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
>> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
>> - break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - case METHOD_GPIO_44XX:
>> - wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - break;
>> -#endif
>> - default:
>> - continue;
>> - }
>> -
>> spin_lock_irqsave(&bank->lock, flags);
>> - bank->saved_wakeup = __raw_readl(wake_status);
>> - __raw_writel(0xffffffff, wake_clear);
>> - __raw_writel(bank->suspend_wakeup, wake_set);
>> + bank->saved_wakeup = __raw_readl(bank->wake_status);
>> + __raw_writel(0xffffffff, bank->wake_clear);
>> + __raw_writel(bank->suspend_wakeup, bank->wake_set);
>> spin_unlock_irqrestore(&bank->lock, flags);
>> }
>
>> @@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
>> return 0;
>>
>> list_for_each_entry(bank, &omap_gpio_list, node) {
>> - void __iomem *wake_clear;
>> - void __iomem *wake_set;
>> unsigned long flags;
>>
>> - switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - case METHOD_GPIO_1610:
>> - wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
>> - break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - case METHOD_GPIO_24XX:
>> - wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
>> - break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - case METHOD_GPIO_44XX:
>> - wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - break;
>> -#endif
>> - default:
>> - continue;
>> - }
>> -
>> spin_lock_irqsave(&bank->lock, flags);
>> - __raw_writel(0xffffffff, wake_clear);
>> - __raw_writel(bank->saved_wakeup, wake_set);
>> + __raw_writel(0xffffffff, bank->wake_clear);
>> + __raw_writel(bank->saved_wakeup, bank->wake_set);
>> spin_unlock_irqrestore(&bank->lock, flags);
>> }
>
> In addition, the cpu_is_* checks in the suspend/resume functions could
> be replaced by checking for non-zero values in bank->regs->wkup*
This is taken care in a later patch. In our next series, we will take care
about the patch order too with cleanup taken care in a separately and
later any functionality change/fixes.
-V Charulatha
>
> Kevin
>
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions
@ 2011-05-26 10:02 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 10:02 UTC (permalink / raw)
To: linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 04:27, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> Since wake_status, wake_clear, wake_set is common for all banks on a given
>> OMAP version it is enough to get their values once during probe().
>> Also, register offsets are already initialzed according to OMAP versions
>> during device registration. We no longer need these explicit checks.
>>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> ---
>> ?arch/arm/mach-omap1/gpio15xx.c ? ? ? ? | ? ?6 ++
>> ?arch/arm/mach-omap1/gpio16xx.c ? ? ? ? | ? ?6 ++
>> ?arch/arm/mach-omap1/gpio7xx.c ? ? ? ? ?| ? ?6 ++
>> ?arch/arm/mach-omap2/gpio.c ? ? ? ? ? ? | ? ?6 ++
>> ?arch/arm/plat-omap/include/plat/gpio.h | ? ?3 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? | ?102 +++++++-------------------------
>> ?6 files changed, 49 insertions(+), 80 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
>> index f18a4a9..b0bd21e 100644
>> --- a/arch/arm/mach-omap1/gpio15xx.c
>> +++ b/arch/arm/mach-omap1/gpio15xx.c
>> @@ -43,6 +43,9 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT,
>> ? ? ? .irqenable_inv ?= true,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = USHRT_MAX,
>> + ? ? .wkupclear ? ? ?= USHRT_MAX,
>> + ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> ?};
>
> Same comment as earlier about USHRT_MAX.
>
> Just use zero to indicate no register present.
>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
>> @@ -85,6 +88,9 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP1510_GPIO_INT_MASK,
>> ? ? ? .irqenable_inv ?= true,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = USHRT_MAX,
>> + ? ? .wkupclear ? ? ?= USHRT_MAX,
>> + ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index d886b88..403437b 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -46,6 +46,9 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT,
>> ? ? ? .irqenable_inv ?= true,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = USHRT_MAX,
>> + ? ? .wkupclear ? ? ?= USHRT_MAX,
>> + ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
>> @@ -91,6 +94,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
>> ? ? ? .set_irqenable ?= OMAP1610_GPIO_SET_IRQENABLE1,
>> ? ? ? .clr_irqenable ?= OMAP1610_GPIO_CLEAR_IRQENABLE1,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = OMAP1610_GPIO_WAKEUPENABLE,
>> + ? ? .wkupclear ? ? ?= OMAP1610_GPIO_CLEAR_WAKEUPENA,
>> + ? ? .wkupset ? ? ? ?= OMAP1610_GPIO_SET_WAKEUPENA,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
>> index c7684ce..d5a4aaf 100644
>> --- a/arch/arm/mach-omap1/gpio7xx.c
>> +++ b/arch/arm/mach-omap1/gpio7xx.c
>> @@ -48,6 +48,9 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP_MPUIO_GPIO_MASKIT / 2,
>> ? ? ? .irqenable_inv ?= true,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = USHRT_MAX,
>> + ? ? .wkupclear ? ? ?= USHRT_MAX,
>> + ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
>> @@ -90,6 +93,9 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
>> ? ? ? .irqenable ? ? ?= OMAP7XX_GPIO_INT_MASK,
>> ? ? ? .irqenable_inv ?= true,
>> ? ? ? .ctrl ? ? ? ? ? = USHRT_MAX,
>> + ? ? .wkupstatus ? ? = USHRT_MAX,
>> + ? ? .wkupclear ? ? ?= USHRT_MAX,
>> + ? ? .wkupset ? ? ? ?= USHRT_MAX,
>> ?};
>>
>> ?static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0782e06..7e79999 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -111,6 +111,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
>> ? ? ? ? ? ? ? pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
>> ? ? ? ? ? ? ? pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
>> + ? ? ? ? ? ? pdata->regs->wkupstatus = OMAP24XX_GPIO_WAKE_EN;
>> + ? ? ? ? ? ? pdata->regs->wkupclear = OMAP24XX_GPIO_CLEARWKUENA;
>> + ? ? ? ? ? ? pdata->regs->wkupset = OMAP24XX_GPIO_SETWKUENA;
>> ? ? ? ? ? ? ? break;
>> ? ? ? case 3:
>> ? ? ? ? ? ? ? pdata->bank_type = METHOD_GPIO_44XX;
>> @@ -128,6 +131,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
>> ? ? ? ? ? ? ? pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
>> ? ? ? ? ? ? ? pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
>> ? ? ? ? ? ? ? pdata->regs->ctrl = OMAP4_GPIO_CTRL;
>> + ? ? ? ? ? ? pdata->regs->wkupstatus = OMAP4_GPIO_IRQWAKEN0;
>> + ? ? ? ? ? ? pdata->regs->wkupclear = OMAP4_GPIO_IRQWAKEN0;
>> + ? ? ? ? ? ? pdata->regs->wkupset = OMAP4_GPIO_IRQWAKEN0;
>> ? ? ? ? ? ? ? break;
>> ? ? ? default:
>> ? ? ? ? ? ? ? WARN(1, "Invalid gpio bank_type\n");
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index 5718a45..2d1a5d6 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
>> ? ? ? u16 debounce;
>> ? ? ? u16 debounce_en;
>> ? ? ? u16 ctrl;
>> + ? ? u16 wkupstatus;
>> + ? ? u16 wkupclear;
>> + ? ? u16 wkupset;
>
> s/wkup/wkup_/
Okay.
>
>> ? ? ? bool irqenable_inv;
>> ?};
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index fcc60be..c189416 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -77,6 +77,9 @@ struct gpio_bank {
>> ? ? ? u32 width;
>> ? ? ? u32 ctx_lost_cnt_before;
>> ? ? ? u16 id;
>> + ? ? void __iomem *wake_status;
>> + ? ? void __iomem *wake_clear;
>> + ? ? void __iomem *wake_set;
>>
>> ? ? ? void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
>>
>> @@ -606,27 +609,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
>> ? ? ? unsigned long flags;
>>
>> ? ? ? spin_lock_irqsave(&bank->lock, flags);
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - ? ? if (bank->method == METHOD_GPIO_1610) {
>> - ? ? ? ? ? ? /* Disable wake-up during idle for dynamic tick */
>> - ? ? ? ? ? ? void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - ? ? ? ? ? ? __raw_writel(1 << offset, reg);
>> - ? ? }
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - ? ? if (bank->method == METHOD_GPIO_24XX) {
>> - ? ? ? ? ? ? /* Disable wake-up during idle for dynamic tick */
>> - ? ? ? ? ? ? void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - ? ? ? ? ? ? __raw_writel(1 << offset, reg);
>> - ? ? }
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - ? ? if (bank->method == METHOD_GPIO_44XX) {
>> +
>> + ? ? if (bank->regs->wkupclear != USHRT_MAX)
>
> Here you check the 'regs' version...
>
>> ? ? ? ? ? ? ? /* Disable wake-up during idle for dynamic tick */
>> - ? ? ? ? ? ? void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? __raw_writel(1 << offset, reg);
>> - ? ? }
>> -#endif
>> + ? ? ? ? ? ? __raw_writel(1 << offset, bank->wake_clear);
>> +
>
> ...and here you write using the copy. ?Not good for readability. ?More
> on this below.
Agreed. Will do the needful.
>
>> ? ? ? bank->mod_usage &= ~(1 << offset);
>>
>> ? ? ? if ((bank->regs->ctrl != USHRT_MAX) && (!bank->mod_usage)) {
>> @@ -1189,6 +1176,15 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
>> ? ? ? ? ? ? ? goto err_free;
>> ? ? ? }
>>
>> + ? ? /*
>> + ? ? ?* Storing these addresses avoids redundant computation of these
>> + ? ? ?* values every time in suspend/resume functions and for all the
>> + ? ? ?* gpio banks.
>> + ? ? ?*/
>> + ? ? bank->wake_status = bank->base + bank->regs->wkupstatus;
>> + ? ? bank->wake_clear = bank->base + bank->regs->wkupclear;
>> + ? ? bank->wake_set = bank->base + bank->regs->wkupset;
>
> Well, it's not really redundant since these are only used in the suspend
> and resume functions. ?I'd rather have an extra add in the
> suspend/resume functions than have 3 extra words in every struct gpio_bank.
>
> Also, Using 'bank + reg offset' in the functions that use them is
> consistent with the pattern of all the other changes in the cleanup
> series, so lets not start something new.
Agreed.
>
>> ? ? ? pm_runtime_enable(bank->dev);
>> ? ? ? pm_runtime_get_sync(bank->dev);
>>
>> @@ -1207,7 +1203,7 @@ err_exit:
>> ?}
>>
>> ?#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
>> -static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
>> +static int omap_gpio_suspend(struct sys_device *dev, pm_message_t unused)
>
> change not related to $SUBJECT patch
>
>> ?{
>> ? ? ? struct gpio_bank *bank;
>>
>> @@ -1215,41 +1211,12 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
>> ? ? ? ? ? ? ? return 0;
>>
>> ? ? ? list_for_each_entry(bank, &omap_gpio_list, node) {
>> - ? ? ? ? ? ? void __iomem *wake_status;
>> - ? ? ? ? ? ? void __iomem *wake_clear;
>> - ? ? ? ? ? ? void __iomem *wake_set;
>
> IMO, these should stay here and should just be assigned 'bank->base +
> bank->regs->...'
Okay.
>
>> ? ? ? ? ? ? ? unsigned long flags;
>>
>> - ? ? ? ? ? ? switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - ? ? ? ? ? ? case METHOD_GPIO_1610:
>> - ? ? ? ? ? ? ? ? ? ? wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - ? ? ? ? ? ? case METHOD_GPIO_24XX:
>> - ? ? ? ? ? ? ? ? ? ? wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - ? ? ? ? ? ? case METHOD_GPIO_44XX:
>> - ? ? ? ? ? ? ? ? ? ? wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> - ? ? ? ? ? ? default:
>> - ? ? ? ? ? ? ? ? ? ? continue;
>> - ? ? ? ? ? ? }
>> -
>> ? ? ? ? ? ? ? spin_lock_irqsave(&bank->lock, flags);
>> - ? ? ? ? ? ? bank->saved_wakeup = __raw_readl(wake_status);
>> - ? ? ? ? ? ? __raw_writel(0xffffffff, wake_clear);
>> - ? ? ? ? ? ? __raw_writel(bank->suspend_wakeup, wake_set);
>> + ? ? ? ? ? ? bank->saved_wakeup = __raw_readl(bank->wake_status);
>> + ? ? ? ? ? ? __raw_writel(0xffffffff, bank->wake_clear);
>> + ? ? ? ? ? ? __raw_writel(bank->suspend_wakeup, bank->wake_set);
>> ? ? ? ? ? ? ? spin_unlock_irqrestore(&bank->lock, flags);
>> ? ? ? }
>
>> @@ -1264,36 +1231,11 @@ static int omap_gpio_resume(struct sys_device *dev)
>> ? ? ? ? ? ? ? return 0;
>>
>> ? ? ? list_for_each_entry(bank, &omap_gpio_list, node) {
>> - ? ? ? ? ? ? void __iomem *wake_clear;
>> - ? ? ? ? ? ? void __iomem *wake_set;
>> ? ? ? ? ? ? ? unsigned long flags;
>>
>> - ? ? ? ? ? ? switch (bank->method) {
>> -#ifdef CONFIG_ARCH_OMAP16XX
>> - ? ? ? ? ? ? case METHOD_GPIO_1610:
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
>> - ? ? ? ? ? ? case METHOD_GPIO_24XX:
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> -#ifdef CONFIG_ARCH_OMAP4
>> - ? ? ? ? ? ? case METHOD_GPIO_44XX:
>> - ? ? ? ? ? ? ? ? ? ? wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? ? ? ? ? wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
>> - ? ? ? ? ? ? ? ? ? ? break;
>> -#endif
>> - ? ? ? ? ? ? default:
>> - ? ? ? ? ? ? ? ? ? ? continue;
>> - ? ? ? ? ? ? }
>> -
>> ? ? ? ? ? ? ? spin_lock_irqsave(&bank->lock, flags);
>> - ? ? ? ? ? ? __raw_writel(0xffffffff, wake_clear);
>> - ? ? ? ? ? ? __raw_writel(bank->saved_wakeup, wake_set);
>> + ? ? ? ? ? ? __raw_writel(0xffffffff, bank->wake_clear);
>> + ? ? ? ? ? ? __raw_writel(bank->saved_wakeup, bank->wake_set);
>> ? ? ? ? ? ? ? spin_unlock_irqrestore(&bank->lock, flags);
>> ? ? ? }
>
> In addition, the cpu_is_* checks in the suspend/resume functions could
> be replaced by checking for non-zero values in bank->regs->wkup*
This is taken care in a later patch. In our next series, we will take care
about the patch order too with cleanup taken care in a separately and
later any functionality change/fixes.
-V Charulatha
>
> Kevin
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
2011-05-26 9:58 ` Premi, Sanjeev
@ 2011-05-26 10:07 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 10:07 UTC (permalink / raw)
To: Premi, Sanjeev
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel
On Thu, May 26, 2011 at 15:28, Premi, Sanjeev <premi@ti.com> wrote:
>> -----Original Message-----
>> From: linux-omap-owner@vger.kernel.org
>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap@vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>> linux-arm-kernel@lists.infradead.org; Varadarajan, Charulatha
>> Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
>> gpio_bank structure
>>
>> From: Charulatha V <charu@ti.com>
>>
>> gpio_context array, which is used to save gpio bank's context,
>> is used only for OMAP3 architecture.
>>
>> Move gpio_context as part of gpio_bank structure so that
>> it can be specific to each gpio bank and can be used for
>> any OMAP architecture
>>
>> TODO: extend the gpio save/restore context function for OMAP4
>> architecture. This is done in one of the next patches in this
>> series
>
> [sp] Should this TODO be part of commit?
Probably this could be moved into diff section.
<<<snip>>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure
@ 2011-05-26 10:07 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 10:07 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 26, 2011 at 15:28, Premi, Sanjeev <premi@ti.com> wrote:
>> -----Original Message-----
>> From: linux-omap-owner at vger.kernel.org
>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>> To: linux-omap at vger.kernel.org
>> Cc: Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>> linux-arm-kernel at lists.infradead.org; Varadarajan, Charulatha
>> Subject: [PATCH 05/15] OMAP: GPIO: Make gpio_context part of
>> gpio_bank structure
>>
>> From: Charulatha V <charu@ti.com>
>>
>> gpio_context array, which is used to save gpio bank's context,
>> is used only for OMAP3 architecture.
>>
>> Move gpio_context as part of gpio_bank structure so that
>> it can be specific to each gpio bank and can be used for
>> any OMAP architecture
>>
>> TODO: extend the gpio save/restore context function for OMAP4
>> architecture. This is done in one of the next patches in this
>> series
>
> [sp] Should this TODO be part of commit?
Probably this could be moved into diff section.
<<<snip>>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 9:23 ` Premi, Sanjeev
@ 2011-05-26 10:11 ` Cousson, Benoit
-1 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 10:11 UTC (permalink / raw)
To: Premi, Sanjeev
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>> From: linux-omap-owner@vger.kernel.org
>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>>
>> From: Charulatha V<charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same
>> for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 - 2
>> OMAP4 - 3
>
> [sp] Magic numbers should be avoided.
> Suggest using something like:
> #define GPIO_REV_2420 0
> #define GPIO_REV_2430 1
> #define GPIO_REV_34XX 2
> #define GPIO_REV_44xx 3
Well, it is not a magic number, it is a revision id that is incremented
each time there is a difference in the IP.
The OMAP version -> IP version link is done at hwmod level. The driver
does not have to know it is an OMAP3 or OMAP4. In that case we did
change the IP version for every revisions, but OMAP5 will use the OMAP4
revision.
I'm not even considering all the Davinci variants that are not named
OMAP but do use OMAP IPs... as you already know...
That can provide a rather confusing information for my point of view.
Whereas a comment like that will give you the exhaustive information.
0: OMAP2420
1: OMAP2430
2: OMAP3, DMxxx
3: OMAP4, OMAP5, DM816x
That being said, some drivers already did that, so I'm not opposed to
such change. I just think it is not the best approach.
At least it gives a pointer to the TRM that contains the IP doc.
> We don't have to refer back to this comment while reading the code.
> I also believed that HWMODs were auto generated.
> Can the changes to structures in this patch recreated using current
> scripts?
Only OMAP4 & 5 are generated today, and in anycase this information is
some custom data added by driver owner. So we just have to update that
information.
I cannot really use the real HW IP version because it is irrelevant most
of the time. Maybe in the future we will be able to force the HW team to
provide relevant data in that field :-)
Regards,
Benoit
>
> ~sanjeev
>
>>
>> Signed-off-by: Charulatha V<charu@ti.com>
>> Cc: Cousson, Benoit<b-cousson@ti.com>
>> Cc: Paul Walmsley<paul@pwsan.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 26
>> ++++++++++++++++++++++++--
>> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 11 +++--------
>> 6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
>> omap_hwmod *oh, void *unused)
>> return -ENOMEM;
>> }
>>
>> + switch (oh->class->rev) {
>> + case 0:
>> + if (id == 1)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + pdata->non_wakeup_gpios = 0xe203ffc0;
>> + else if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + pdata->non_wakeup_gpios = 0x08700040;
>> + break;
>> + case 2:
>> + if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + pdata->non_wakeup_gpios = 0x00000001;
>> + else if (id == 6)
>> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + pdata->non_wakeup_gpios = 0x08000000;
>> + break;
>
> [sp] Where is the description on non-wakeup GPIOs in OMAP3?
> Here is text from AM37x TRM:
> [quote ...only relevant text]
> Each GPIO module provides 32 dedicated general-purpose pins with input
> and output capabilities; .... These pins can be configured for the
> following applications:
> - Data input (capture)/output (drive)
> - Keyboard interface with a debounce cell
> - Interrupt generation in ....
> - Wake-up request generation in idle mode
> [/quote]
> Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
>
>> + default:
>> + /* No non-wakeup GPIO pins for other SoCs */
>> + break;
>> + }
>> +
>
> ~sanjeev
>
> [snip]...[snip]
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 10:11 ` Cousson, Benoit
0 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 10:11 UTC (permalink / raw)
To: linux-arm-kernel
On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>> From: linux-omap-owner at vger.kernel.org
>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>> DebBarma, Tarun Kanti
>> Sent: Tuesday, May 24, 2011 7:55 PM
>>
>> From: Charulatha V<charu@ti.com>
>>
>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>
>> Fix the above by providing non-wakeup GPIO information through pdata
>> specific to the SoC.
>>
>> The GPIO rev id provided in the hwmod database is the same
>> for OMAP2420
>> and OMAP2430. Change the GPIO rev ids in hwmod database as given below
>> so that it can be used to identify OMAP2420 and OMAP2430.
>> OMAP2420 - 0
>> OMAP2430 - 1
>> OMAP3 - 2
>> OMAP4 - 3
>
> [sp] Magic numbers should be avoided.
> Suggest using something like:
> #define GPIO_REV_2420 0
> #define GPIO_REV_2430 1
> #define GPIO_REV_34XX 2
> #define GPIO_REV_44xx 3
Well, it is not a magic number, it is a revision id that is incremented
each time there is a difference in the IP.
The OMAP version -> IP version link is done at hwmod level. The driver
does not have to know it is an OMAP3 or OMAP4. In that case we did
change the IP version for every revisions, but OMAP5 will use the OMAP4
revision.
I'm not even considering all the Davinci variants that are not named
OMAP but do use OMAP IPs... as you already know...
That can provide a rather confusing information for my point of view.
Whereas a comment like that will give you the exhaustive information.
0: OMAP2420
1: OMAP2430
2: OMAP3, DMxxx
3: OMAP4, OMAP5, DM816x
That being said, some drivers already did that, so I'm not opposed to
such change. I just think it is not the best approach.
At least it gives a pointer to the TRM that contains the IP doc.
> We don't have to refer back to this comment while reading the code.
> I also believed that HWMODs were auto generated.
> Can the changes to structures in this patch recreated using current
> scripts?
Only OMAP4 & 5 are generated today, and in anycase this information is
some custom data added by driver owner. So we just have to update that
information.
I cannot really use the real HW IP version because it is irrelevant most
of the time. Maybe in the future we will be able to force the HW team to
provide relevant data in that field :-)
Regards,
Benoit
>
> ~sanjeev
>
>>
>> Signed-off-by: Charulatha V<charu@ti.com>
>> Cc: Cousson, Benoit<b-cousson@ti.com>
>> Cc: Paul Walmsley<paul@pwsan.com>
>> ---
>> arch/arm/mach-omap2/gpio.c | 26
>> ++++++++++++++++++++++++--
>> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
>> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 11 +++--------
>> 6 files changed, 31 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
>> index 0446bd1..6cd26b4 100644
>> --- a/arch/arm/mach-omap2/gpio.c
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
>> omap_hwmod *oh, void *unused)
>> return -ENOMEM;
>> }
>>
>> + switch (oh->class->rev) {
>> + case 0:
>> + if (id == 1)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
>> + pdata->non_wakeup_gpios = 0xe203ffc0;
>> + else if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
>> + pdata->non_wakeup_gpios = 0x08700040;
>> + break;
>> + case 2:
>> + if (id == 2)
>> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
>> + pdata->non_wakeup_gpios = 0x00000001;
>> + else if (id == 6)
>> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
>> + pdata->non_wakeup_gpios = 0x08000000;
>> + break;
>
> [sp] Where is the description on non-wakeup GPIOs in OMAP3?
> Here is text from AM37x TRM:
> [quote ...only relevant text]
> Each GPIO module provides 32 dedicated general-purpose pins with input
> and output capabilities; .... These pins can be configured for the
> following applications:
> - Data input (capture)/output (drive)
> - Keyboard interface with a debounce cell
> - Interrupt generation in ....
> - Wake-up request generation in idle mode
> [/quote]
> Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
>
>> + default:
>> + /* No non-wakeup GPIO pins for other SoCs */
>> + break;
>> + }
>> +
>
> ~sanjeev
>
> [snip]...[snip]
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 10:11 ` Cousson, Benoit
@ 2011-05-26 11:47 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 11:47 UTC (permalink / raw)
To: Cousson, Benoit
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 3:41 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >> From: linux-omap-owner@vger.kernel.org
> >> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> >> DebBarma, Tarun Kanti
> >> Sent: Tuesday, May 24, 2011 7:55 PM
> >>
> >> From: Charulatha V<charu@ti.com>
> >>
> >> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> >> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> >> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
> >>
> >> Fix the above by providing non-wakeup GPIO information
> through pdata
> >> specific to the SoC.
> >>
> >> The GPIO rev id provided in the hwmod database is the same
> >> for OMAP2420
> >> and OMAP2430. Change the GPIO rev ids in hwmod database as
> given below
> >> so that it can be used to identify OMAP2420 and OMAP2430.
> >> OMAP2420 - 0
> >> OMAP2430 - 1
> >> OMAP3 - 2
> >> OMAP4 - 3
> >
> > [sp] Magic numbers should be avoided.
> > Suggest using something like:
> > #define GPIO_REV_2420 0
> > #define GPIO_REV_2430 1
> > #define GPIO_REV_34XX 2
> > #define GPIO_REV_44xx 3
>
> Well, it is not a magic number, it is a revision id that is
> incremented
> each time there is a difference in the IP.
> The OMAP version -> IP version link is done at hwmod level.
> The driver
> does not have to know it is an OMAP3 or OMAP4. In that case we did
> change the IP version for every revisions, but OMAP5 will use
> the OMAP4
> revision.
> I'm not even considering all the Davinci variants that are not named
> OMAP but do use OMAP IPs... as you already know...
> That can provide a rather confusing information for my point of view.
>
> Whereas a comment like that will give you the exhaustive information.
>
> 0: OMAP2420
> 1: OMAP2430
> 2: OMAP3, DMxxx
> 3: OMAP4, OMAP5, DM816x
>
> That being said, some drivers already did that, so I'm not opposed to
> such change. I just think it is not the best approach.
> At least it gives a pointer to the TRM that contains the IP doc.
[sp] Benoit, your are right from generation perspectove where the
it is easier to increment numbers but when we use comparison
code - as in this patch, comparison against a number isn't
readable.
As example:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case 0: ## But this is our code.
I am recommending this to read as:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case GPIO_REV_2420: ## More readable.
~sanjeev
>
> > We don't have to refer back to this comment while
> reading the code.
> > I also believed that HWMODs were auto generated.
> > Can the changes to structures in this patch recreated
> using current
> > scripts?
>
> Only OMAP4 & 5 are generated today, and in anycase this
> information is
> some custom data added by driver owner. So we just have to
> update that
> information.
> I cannot really use the real HW IP version because it is
> irrelevant most
> of the time. Maybe in the future we will be able to force the
> HW team to
> provide relevant data in that field :-)
>
> Regards,
> Benoit
>
>
> >
> > ~sanjeev
> >
> >>
> >> Signed-off-by: Charulatha V<charu@ti.com>
> >> Cc: Cousson, Benoit<b-cousson@ti.com>
> >> Cc: Paul Walmsley<paul@pwsan.com>
> >> ---
> >> arch/arm/mach-omap2/gpio.c | 26
> >> ++++++++++++++++++++++++--
> >> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> >> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> >> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> >> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> >> drivers/gpio/gpio_omap.c | 11 +++--------
> >> 6 files changed, 31 insertions(+), 13 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/gpio.c
> b/arch/arm/mach-omap2/gpio.c
> >> index 0446bd1..6cd26b4 100644
> >> --- a/arch/arm/mach-omap2/gpio.c
> >> +++ b/arch/arm/mach-omap2/gpio.c
> >> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
> >> omap_hwmod *oh, void *unused)
> >> return -ENOMEM;
> >> }
> >>
> >> + switch (oh->class->rev) {
> >> + case 0:
> >> + if (id == 1)
> >> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> >> + pdata->non_wakeup_gpios = 0xe203ffc0;
> >> + else if (id == 2)
> >> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> >> + pdata->non_wakeup_gpios = 0x08700040;
> >> + break;
> >> + case 2:
> >> + if (id == 2)
> >> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> >> + pdata->non_wakeup_gpios = 0x00000001;
> >> + else if (id == 6)
> >> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> >> + pdata->non_wakeup_gpios = 0x08000000;
> >> + break;
> >
> > [sp] Where is the description on non-wakeup GPIOs in OMAP3?
> > Here is text from AM37x TRM:
> > [quote ...only relevant text]
> > Each GPIO module provides 32 dedicated
> general-purpose pins with input
> > and output capabilities; .... These pins can be
> configured for the
> > following applications:
> > - Data input (capture)/output (drive)
> > - Keyboard interface with a debounce cell
> > - Interrupt generation in ....
> > - Wake-up request generation in idle mode
> > [/quote]
> > Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> > GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
> >
> >> + default:
> >> + /* No non-wakeup GPIO pins for other SoCs */
> >> + break;
> >> + }
> >> +
> >
> > ~sanjeev
> >
> > [snip]...[snip]
>
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 11:47 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 11:47 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 3:41 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >> From: linux-omap-owner at vger.kernel.org
> >> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> >> DebBarma, Tarun Kanti
> >> Sent: Tuesday, May 24, 2011 7:55 PM
> >>
> >> From: Charulatha V<charu@ti.com>
> >>
> >> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> >> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> >> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
> >>
> >> Fix the above by providing non-wakeup GPIO information
> through pdata
> >> specific to the SoC.
> >>
> >> The GPIO rev id provided in the hwmod database is the same
> >> for OMAP2420
> >> and OMAP2430. Change the GPIO rev ids in hwmod database as
> given below
> >> so that it can be used to identify OMAP2420 and OMAP2430.
> >> OMAP2420 - 0
> >> OMAP2430 - 1
> >> OMAP3 - 2
> >> OMAP4 - 3
> >
> > [sp] Magic numbers should be avoided.
> > Suggest using something like:
> > #define GPIO_REV_2420 0
> > #define GPIO_REV_2430 1
> > #define GPIO_REV_34XX 2
> > #define GPIO_REV_44xx 3
>
> Well, it is not a magic number, it is a revision id that is
> incremented
> each time there is a difference in the IP.
> The OMAP version -> IP version link is done at hwmod level.
> The driver
> does not have to know it is an OMAP3 or OMAP4. In that case we did
> change the IP version for every revisions, but OMAP5 will use
> the OMAP4
> revision.
> I'm not even considering all the Davinci variants that are not named
> OMAP but do use OMAP IPs... as you already know...
> That can provide a rather confusing information for my point of view.
>
> Whereas a comment like that will give you the exhaustive information.
>
> 0: OMAP2420
> 1: OMAP2430
> 2: OMAP3, DMxxx
> 3: OMAP4, OMAP5, DM816x
>
> That being said, some drivers already did that, so I'm not opposed to
> such change. I just think it is not the best approach.
> At least it gives a pointer to the TRM that contains the IP doc.
[sp] Benoit, your are right from generation perspectove where the
it is easier to increment numbers but when we use comparison
code - as in this patch, comparison against a number isn't
readable.
As example:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case 0: ## But this is our code.
I am recommending this to read as:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case GPIO_REV_2420: ## More readable.
~sanjeev
>
> > We don't have to refer back to this comment while
> reading the code.
> > I also believed that HWMODs were auto generated.
> > Can the changes to structures in this patch recreated
> using current
> > scripts?
>
> Only OMAP4 & 5 are generated today, and in anycase this
> information is
> some custom data added by driver owner. So we just have to
> update that
> information.
> I cannot really use the real HW IP version because it is
> irrelevant most
> of the time. Maybe in the future we will be able to force the
> HW team to
> provide relevant data in that field :-)
>
> Regards,
> Benoit
>
>
> >
> > ~sanjeev
> >
> >>
> >> Signed-off-by: Charulatha V<charu@ti.com>
> >> Cc: Cousson, Benoit<b-cousson@ti.com>
> >> Cc: Paul Walmsley<paul@pwsan.com>
> >> ---
> >> arch/arm/mach-omap2/gpio.c | 26
> >> ++++++++++++++++++++++++--
> >> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 +-
> >> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 2 +-
> >> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +-
> >> arch/arm/plat-omap/include/plat/gpio.h | 1 +
> >> drivers/gpio/gpio_omap.c | 11 +++--------
> >> 6 files changed, 31 insertions(+), 13 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/gpio.c
> b/arch/arm/mach-omap2/gpio.c
> >> index 0446bd1..6cd26b4 100644
> >> --- a/arch/arm/mach-omap2/gpio.c
> >> +++ b/arch/arm/mach-omap2/gpio.c
> >> @@ -56,6 +56,28 @@ static int omap2_gpio_dev_init(struct
> >> omap_hwmod *oh, void *unused)
> >> return -ENOMEM;
> >> }
> >>
> >> + switch (oh->class->rev) {
> >> + case 0:
> >> + if (id == 1)
> >> + /* non-wakeup GPIO pins for OMAP2420 Bank1 */
> >> + pdata->non_wakeup_gpios = 0xe203ffc0;
> >> + else if (id == 2)
> >> + /* non-wakeup GPIO pins for OMAP2420 Bank2 */
> >> + pdata->non_wakeup_gpios = 0x08700040;
> >> + break;
> >> + case 2:
> >> + if (id == 2)
> >> + /* non-wakeup GPIO pins for OMAP3 Bank2 */
> >> + pdata->non_wakeup_gpios = 0x00000001;
> >> + else if (id == 6)
> >> + /* non-wakeup GPIO pins for OMAP3 Bank6 */
> >> + pdata->non_wakeup_gpios = 0x08000000;
> >> + break;
> >
> > [sp] Where is the description on non-wakeup GPIOs in OMAP3?
> > Here is text from AM37x TRM:
> > [quote ...only relevant text]
> > Each GPIO module provides 32 dedicated
> general-purpose pins with input
> > and output capabilities; .... These pins can be
> configured for the
> > following applications:
> > - Data input (capture)/output (drive)
> > - Keyboard interface with a debounce cell
> > - Interrupt generation in ....
> > - Wake-up request generation in idle mode
> > [/quote]
> > Otherwise, what are the GPIO2_WAKEUPENABLE (0x4905 0020) and
> > GPIO6_WAKEUPENABLE (0x4905 8020) meant for?
> >
> >> + default:
> >> + /* No non-wakeup GPIO pins for other SoCs */
> >> + break;
> >> + }
> >> +
> >
> > ~sanjeev
> >
> > [snip]...[snip]
>
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 11:47 ` Premi, Sanjeev
@ 2011-05-26 12:11 ` Cousson, Benoit
-1 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 12:11 UTC (permalink / raw)
To: Premi, Sanjeev
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
>> -----Original Message-----
>> From: Cousson, Benoit
>> Sent: Thursday, May 26, 2011 3:41 PM
>> To: Premi, Sanjeev
>> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
>> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>> linux-arm-kernel@lists.infradead.org; Varadarajan,
>> Charulatha; Paul Walmsley
>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>> GPIO and rev_ids
>>
>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>>>> From: linux-omap-owner@vger.kernel.org
>>>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>>>> DebBarma, Tarun Kanti
>>>> Sent: Tuesday, May 24, 2011 7:55 PM
>>>>
>>>> From: Charulatha V<charu@ti.com>
>>>>
>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>>>
>>>> Fix the above by providing non-wakeup GPIO information
>> through pdata
>>>> specific to the SoC.
>>>>
>>>> The GPIO rev id provided in the hwmod database is the same
>>>> for OMAP2420
>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
>> given below
>>>> so that it can be used to identify OMAP2420 and OMAP2430.
>>>> OMAP2420 - 0
>>>> OMAP2430 - 1
>>>> OMAP3 - 2
>>>> OMAP4 - 3
>>>
>>> [sp] Magic numbers should be avoided.
>>> Suggest using something like:
>>> #define GPIO_REV_2420 0
>>> #define GPIO_REV_2430 1
>>> #define GPIO_REV_34XX 2
>>> #define GPIO_REV_44xx 3
>>
>> Well, it is not a magic number, it is a revision id that is
>> incremented
>> each time there is a difference in the IP.
>> The OMAP version -> IP version link is done at hwmod level.
>> The driver
>> does not have to know it is an OMAP3 or OMAP4. In that case we did
>> change the IP version for every revisions, but OMAP5 will use
>> the OMAP4
>> revision.
>> I'm not even considering all the Davinci variants that are not named
>> OMAP but do use OMAP IPs... as you already know...
>> That can provide a rather confusing information for my point of view.
>>
>> Whereas a comment like that will give you the exhaustive information.
>>
>> 0: OMAP2420
>> 1: OMAP2430
>> 2: OMAP3, DMxxx
>> 3: OMAP4, OMAP5, DM816x
>>
>> That being said, some drivers already did that, so I'm not opposed to
>> such change. I just think it is not the best approach.
>> At least it gives a pointer to the TRM that contains the IP doc.
>
> [sp] Benoit, your are right from generation perspectove where the
> it is easier to increment numbers but when we use comparison
This is not even related to generation. A version number is a number.
If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
version is relevant for the driver.
For the documentation point of view, since we do not have a per IP TRM,
then it can make sense to know where that IP is documented. But as I
said a comment is enough and will allow a much more relevant level of
details information than a define.
> code - as in this patch, comparison against a number isn't
> readable.
>
> As example:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case 0: ## But this is our code.
>
> I am recommending this to read as:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case GPIO_REV_2420: ## More readable.
More readable, maybe, but not necessarily relevant nor accurate if the
same IP version is used in another chip or revision.
What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 12:11 ` Cousson, Benoit
0 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 12:11 UTC (permalink / raw)
To: linux-arm-kernel
On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
>> -----Original Message-----
>> From: Cousson, Benoit
>> Sent: Thursday, May 26, 2011 3:41 PM
>> To: Premi, Sanjeev
>> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
>> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>> linux-arm-kernel at lists.infradead.org; Varadarajan,
>> Charulatha; Paul Walmsley
>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>> GPIO and rev_ids
>>
>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>>>> From: linux-omap-owner at vger.kernel.org
>>>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>>>> DebBarma, Tarun Kanti
>>>> Sent: Tuesday, May 24, 2011 7:55 PM
>>>>
>>>> From: Charulatha V<charu@ti.com>
>>>>
>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>>>
>>>> Fix the above by providing non-wakeup GPIO information
>> through pdata
>>>> specific to the SoC.
>>>>
>>>> The GPIO rev id provided in the hwmod database is the same
>>>> for OMAP2420
>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
>> given below
>>>> so that it can be used to identify OMAP2420 and OMAP2430.
>>>> OMAP2420 - 0
>>>> OMAP2430 - 1
>>>> OMAP3 - 2
>>>> OMAP4 - 3
>>>
>>> [sp] Magic numbers should be avoided.
>>> Suggest using something like:
>>> #define GPIO_REV_2420 0
>>> #define GPIO_REV_2430 1
>>> #define GPIO_REV_34XX 2
>>> #define GPIO_REV_44xx 3
>>
>> Well, it is not a magic number, it is a revision id that is
>> incremented
>> each time there is a difference in the IP.
>> The OMAP version -> IP version link is done at hwmod level.
>> The driver
>> does not have to know it is an OMAP3 or OMAP4. In that case we did
>> change the IP version for every revisions, but OMAP5 will use
>> the OMAP4
>> revision.
>> I'm not even considering all the Davinci variants that are not named
>> OMAP but do use OMAP IPs... as you already know...
>> That can provide a rather confusing information for my point of view.
>>
>> Whereas a comment like that will give you the exhaustive information.
>>
>> 0: OMAP2420
>> 1: OMAP2430
>> 2: OMAP3, DMxxx
>> 3: OMAP4, OMAP5, DM816x
>>
>> That being said, some drivers already did that, so I'm not opposed to
>> such change. I just think it is not the best approach.
>> At least it gives a pointer to the TRM that contains the IP doc.
>
> [sp] Benoit, your are right from generation perspectove where the
> it is easier to increment numbers but when we use comparison
This is not even related to generation. A version number is a number.
If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
version is relevant for the driver.
For the documentation point of view, since we do not have a per IP TRM,
then it can make sense to know where that IP is documented. But as I
said a comment is enough and will allow a much more relevant level of
details information than a define.
> code - as in this patch, comparison against a number isn't
> readable.
>
> As example:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case 0: ## But this is our code.
>
> I am recommending this to read as:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case GPIO_REV_2420: ## More readable.
More readable, maybe, but not necessarily relevant nor accurate if the
same IP version is used in another chip or revision.
What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 12:11 ` Cousson, Benoit
@ 2011-05-26 12:38 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 12:38 UTC (permalink / raw)
To: Cousson, Benoit
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 5:41 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
> >> -----Original Message-----
> >> From: Cousson, Benoit
> >> Sent: Thursday, May 26, 2011 3:41 PM
> >> To: Premi, Sanjeev
> >> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> >> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> >> linux-arm-kernel@lists.infradead.org; Varadarajan,
> >> Charulatha; Paul Walmsley
> >> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >> GPIO and rev_ids
> >>
> >> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >>>> From: linux-omap-owner@vger.kernel.org
> >>>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> >>>> DebBarma, Tarun Kanti
> >>>> Sent: Tuesday, May 24, 2011 7:55 PM
> >>>>
> >>>> From: Charulatha V<charu@ti.com>
> >>>>
> >>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> >>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> >>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
> >>>>
> >>>> Fix the above by providing non-wakeup GPIO information
> >> through pdata
> >>>> specific to the SoC.
> >>>>
> >>>> The GPIO rev id provided in the hwmod database is the same
> >>>> for OMAP2420
> >>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
> >> given below
> >>>> so that it can be used to identify OMAP2420 and OMAP2430.
> >>>> OMAP2420 - 0
> >>>> OMAP2430 - 1
> >>>> OMAP3 - 2
> >>>> OMAP4 - 3
> >>>
> >>> [sp] Magic numbers should be avoided.
> >>> Suggest using something like:
> >>> #define GPIO_REV_2420 0
> >>> #define GPIO_REV_2430 1
> >>> #define GPIO_REV_34XX 2
> >>> #define GPIO_REV_44xx 3
> >>
> >> Well, it is not a magic number, it is a revision id that is
> >> incremented
> >> each time there is a difference in the IP.
> >> The OMAP version -> IP version link is done at hwmod level.
> >> The driver
> >> does not have to know it is an OMAP3 or OMAP4. In that case we did
> >> change the IP version for every revisions, but OMAP5 will use
> >> the OMAP4
> >> revision.
> >> I'm not even considering all the Davinci variants that are
> not named
> >> OMAP but do use OMAP IPs... as you already know...
> >> That can provide a rather confusing information for my
> point of view.
> >>
> >> Whereas a comment like that will give you the exhaustive
> information.
> >>
> >> 0: OMAP2420
> >> 1: OMAP2430
> >> 2: OMAP3, DMxxx
> >> 3: OMAP4, OMAP5, DM816x
> >>
> >> That being said, some drivers already did that, so I'm not
> opposed to
> >> such change. I just think it is not the best approach.
> >> At least it gives a pointer to the TRM that contains the IP doc.
> >
> > [sp] Benoit, your are right from generation perspectove where the
> > it is easier to increment numbers but when we use comparison
>
> This is not even related to generation. A version number is a number.
> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
> version is relevant for the driver.
> For the documentation point of view, since we do not have a
> per IP TRM,
> then it can make sense to know where that IP is documented. But as I
> said a comment is enough and will allow a much more relevant level of
> details information than a define.
>
> > code - as in this patch, comparison against a number isn't
> > readable.
> >
> > As example:
> >
> > + switch (oh->class->rev) { ## This is auto-generated.
> > + case 0: ## But this is our code.
> >
> > I am recommending this to read as:
> >
> > + switch (oh->class->rev) { ## This is auto-generated.
> > + case GPIO_REV_2420: ## More readable.
>
> More readable, maybe, but not necessarily relevant nor
> accurate if the
> same IP version is used in another chip or revision.
>
> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
How is value 0 accurate?
>
> Benoit
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 12:38 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 12:38 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 5:41 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
> >> -----Original Message-----
> >> From: Cousson, Benoit
> >> Sent: Thursday, May 26, 2011 3:41 PM
> >> To: Premi, Sanjeev
> >> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> >> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> >> linux-arm-kernel at lists.infradead.org; Varadarajan,
> >> Charulatha; Paul Walmsley
> >> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >> GPIO and rev_ids
> >>
> >> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >>>> From: linux-omap-owner at vger.kernel.org
> >>>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> >>>> DebBarma, Tarun Kanti
> >>>> Sent: Tuesday, May 24, 2011 7:55 PM
> >>>>
> >>>> From: Charulatha V<charu@ti.com>
> >>>>
> >>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
> >>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
> >>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
> >>>>
> >>>> Fix the above by providing non-wakeup GPIO information
> >> through pdata
> >>>> specific to the SoC.
> >>>>
> >>>> The GPIO rev id provided in the hwmod database is the same
> >>>> for OMAP2420
> >>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
> >> given below
> >>>> so that it can be used to identify OMAP2420 and OMAP2430.
> >>>> OMAP2420 - 0
> >>>> OMAP2430 - 1
> >>>> OMAP3 - 2
> >>>> OMAP4 - 3
> >>>
> >>> [sp] Magic numbers should be avoided.
> >>> Suggest using something like:
> >>> #define GPIO_REV_2420 0
> >>> #define GPIO_REV_2430 1
> >>> #define GPIO_REV_34XX 2
> >>> #define GPIO_REV_44xx 3
> >>
> >> Well, it is not a magic number, it is a revision id that is
> >> incremented
> >> each time there is a difference in the IP.
> >> The OMAP version -> IP version link is done at hwmod level.
> >> The driver
> >> does not have to know it is an OMAP3 or OMAP4. In that case we did
> >> change the IP version for every revisions, but OMAP5 will use
> >> the OMAP4
> >> revision.
> >> I'm not even considering all the Davinci variants that are
> not named
> >> OMAP but do use OMAP IPs... as you already know...
> >> That can provide a rather confusing information for my
> point of view.
> >>
> >> Whereas a comment like that will give you the exhaustive
> information.
> >>
> >> 0: OMAP2420
> >> 1: OMAP2430
> >> 2: OMAP3, DMxxx
> >> 3: OMAP4, OMAP5, DM816x
> >>
> >> That being said, some drivers already did that, so I'm not
> opposed to
> >> such change. I just think it is not the best approach.
> >> At least it gives a pointer to the TRM that contains the IP doc.
> >
> > [sp] Benoit, your are right from generation perspectove where the
> > it is easier to increment numbers but when we use comparison
>
> This is not even related to generation. A version number is a number.
> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
> version is relevant for the driver.
> For the documentation point of view, since we do not have a
> per IP TRM,
> then it can make sense to know where that IP is documented. But as I
> said a comment is enough and will allow a much more relevant level of
> details information than a define.
>
> > code - as in this patch, comparison against a number isn't
> > readable.
> >
> > As example:
> >
> > + switch (oh->class->rev) { ## This is auto-generated.
> > + case 0: ## But this is our code.
> >
> > I am recommending this to read as:
> >
> > + switch (oh->class->rev) { ## This is auto-generated.
> > + case GPIO_REV_2420: ## More readable.
>
> More readable, maybe, but not necessarily relevant nor
> accurate if the
> same IP version is used in another chip or revision.
>
> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
How is value 0 accurate?
>
> Benoit
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 12:38 ` Premi, Sanjeev
@ 2011-05-26 12:46 ` Cousson, Benoit
-1 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 12:46 UTC (permalink / raw)
To: Premi, Sanjeev
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
On 5/26/2011 2:38 PM, Premi, Sanjeev wrote:
>> -----Original Message-----
>> From: Cousson, Benoit
>> Sent: Thursday, May 26, 2011 5:41 PM
>> To: Premi, Sanjeev
>> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
>> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>> linux-arm-kernel@lists.infradead.org; Varadarajan,
>> Charulatha; Paul Walmsley
>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>> GPIO and rev_ids
>>
>> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
>>>> -----Original Message-----
>>>> From: Cousson, Benoit
>>>> Sent: Thursday, May 26, 2011 3:41 PM
>>>> To: Premi, Sanjeev
>>>> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
>>>> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
>>>> linux-arm-kernel@lists.infradead.org; Varadarajan,
>>>> Charulatha; Paul Walmsley
>>>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>>>> GPIO and rev_ids
>>>>
>>>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>>>>>> From: linux-omap-owner@vger.kernel.org
>>>>>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
>>>>>> DebBarma, Tarun Kanti
>>>>>> Sent: Tuesday, May 24, 2011 7:55 PM
>>>>>>
>>>>>> From: Charulatha V<charu@ti.com>
>>>>>>
>>>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>>>>>
>>>>>> Fix the above by providing non-wakeup GPIO information
>>>> through pdata
>>>>>> specific to the SoC.
>>>>>>
>>>>>> The GPIO rev id provided in the hwmod database is the same
>>>>>> for OMAP2420
>>>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
>>>> given below
>>>>>> so that it can be used to identify OMAP2420 and OMAP2430.
>>>>>> OMAP2420 - 0
>>>>>> OMAP2430 - 1
>>>>>> OMAP3 - 2
>>>>>> OMAP4 - 3
>>>>>
>>>>> [sp] Magic numbers should be avoided.
>>>>> Suggest using something like:
>>>>> #define GPIO_REV_2420 0
>>>>> #define GPIO_REV_2430 1
>>>>> #define GPIO_REV_34XX 2
>>>>> #define GPIO_REV_44xx 3
>>>>
>>>> Well, it is not a magic number, it is a revision id that is
>>>> incremented
>>>> each time there is a difference in the IP.
>>>> The OMAP version -> IP version link is done at hwmod level.
>>>> The driver
>>>> does not have to know it is an OMAP3 or OMAP4. In that case we did
>>>> change the IP version for every revisions, but OMAP5 will use
>>>> the OMAP4
>>>> revision.
>>>> I'm not even considering all the Davinci variants that are
>> not named
>>>> OMAP but do use OMAP IPs... as you already know...
>>>> That can provide a rather confusing information for my
>> point of view.
>>>>
>>>> Whereas a comment like that will give you the exhaustive
>> information.
>>>>
>>>> 0: OMAP2420
>>>> 1: OMAP2430
>>>> 2: OMAP3, DMxxx
>>>> 3: OMAP4, OMAP5, DM816x
>>>>
>>>> That being said, some drivers already did that, so I'm not
>> opposed to
>>>> such change. I just think it is not the best approach.
>>>> At least it gives a pointer to the TRM that contains the IP doc.
>>>
>>> [sp] Benoit, your are right from generation perspectove where the
>>> it is easier to increment numbers but when we use comparison
>>
>> This is not even related to generation. A version number is a number.
>> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
>> version is relevant for the driver.
>> For the documentation point of view, since we do not have a
>> per IP TRM,
>> then it can make sense to know where that IP is documented. But as I
>> said a comment is enough and will allow a much more relevant level of
>> details information than a define.
>>
>>> code - as in this patch, comparison against a number isn't
>>> readable.
>>>
>>> As example:
>>>
>>> + switch (oh->class->rev) { ## This is auto-generated.
>>> + case 0: ## But this is our code.
>>>
>>> I am recommending this to read as:
>>>
>>> + switch (oh->class->rev) { ## This is auto-generated.
>>> + case GPIO_REV_2420: ## More readable.
>>
>> More readable, maybe, but not necessarily relevant nor
>> accurate if the
>> same IP version is used in another chip or revision.
>>
>> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
>
> How is value 0 accurate?
0 is just the revision number that can give you the exact list of Soc
that does use that IP. Thanks to an exhaustive comment.
0: OMAP2420
1: OMAP2430
2: OMAP3, DMxxx
3: OMAP4, OMAP5, DM816x
BTW, I'm still waiting the answer for previous question...
Regards,
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 12:46 ` Cousson, Benoit
0 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 12:46 UTC (permalink / raw)
To: linux-arm-kernel
On 5/26/2011 2:38 PM, Premi, Sanjeev wrote:
>> -----Original Message-----
>> From: Cousson, Benoit
>> Sent: Thursday, May 26, 2011 5:41 PM
>> To: Premi, Sanjeev
>> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
>> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>> linux-arm-kernel at lists.infradead.org; Varadarajan,
>> Charulatha; Paul Walmsley
>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>> GPIO and rev_ids
>>
>> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
>>>> -----Original Message-----
>>>> From: Cousson, Benoit
>>>> Sent: Thursday, May 26, 2011 3:41 PM
>>>> To: Premi, Sanjeev
>>>> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
>>>> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
>>>> linux-arm-kernel at lists.infradead.org; Varadarajan,
>>>> Charulatha; Paul Walmsley
>>>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
>>>> GPIO and rev_ids
>>>>
>>>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
>>>>>> From: linux-omap-owner at vger.kernel.org
>>>>>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
>>>>>> DebBarma, Tarun Kanti
>>>>>> Sent: Tuesday, May 24, 2011 7:55 PM
>>>>>>
>>>>>> From: Charulatha V<charu@ti.com>
>>>>>>
>>>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is incorrect.
>>>>>>
>>>>>> Fix the above by providing non-wakeup GPIO information
>>>> through pdata
>>>>>> specific to the SoC.
>>>>>>
>>>>>> The GPIO rev id provided in the hwmod database is the same
>>>>>> for OMAP2420
>>>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
>>>> given below
>>>>>> so that it can be used to identify OMAP2420 and OMAP2430.
>>>>>> OMAP2420 - 0
>>>>>> OMAP2430 - 1
>>>>>> OMAP3 - 2
>>>>>> OMAP4 - 3
>>>>>
>>>>> [sp] Magic numbers should be avoided.
>>>>> Suggest using something like:
>>>>> #define GPIO_REV_2420 0
>>>>> #define GPIO_REV_2430 1
>>>>> #define GPIO_REV_34XX 2
>>>>> #define GPIO_REV_44xx 3
>>>>
>>>> Well, it is not a magic number, it is a revision id that is
>>>> incremented
>>>> each time there is a difference in the IP.
>>>> The OMAP version -> IP version link is done at hwmod level.
>>>> The driver
>>>> does not have to know it is an OMAP3 or OMAP4. In that case we did
>>>> change the IP version for every revisions, but OMAP5 will use
>>>> the OMAP4
>>>> revision.
>>>> I'm not even considering all the Davinci variants that are
>> not named
>>>> OMAP but do use OMAP IPs... as you already know...
>>>> That can provide a rather confusing information for my
>> point of view.
>>>>
>>>> Whereas a comment like that will give you the exhaustive
>> information.
>>>>
>>>> 0: OMAP2420
>>>> 1: OMAP2430
>>>> 2: OMAP3, DMxxx
>>>> 3: OMAP4, OMAP5, DM816x
>>>>
>>>> That being said, some drivers already did that, so I'm not
>> opposed to
>>>> such change. I just think it is not the best approach.
>>>> At least it gives a pointer to the TRM that contains the IP doc.
>>>
>>> [sp] Benoit, your are right from generation perspectove where the
>>> it is easier to increment numbers but when we use comparison
>>
>> This is not even related to generation. A version number is a number.
>> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2, only that IP
>> version is relevant for the driver.
>> For the documentation point of view, since we do not have a
>> per IP TRM,
>> then it can make sense to know where that IP is documented. But as I
>> said a comment is enough and will allow a much more relevant level of
>> details information than a define.
>>
>>> code - as in this patch, comparison against a number isn't
>>> readable.
>>>
>>> As example:
>>>
>>> + switch (oh->class->rev) { ## This is auto-generated.
>>> + case 0: ## But this is our code.
>>>
>>> I am recommending this to read as:
>>>
>>> + switch (oh->class->rev) { ## This is auto-generated.
>>> + case GPIO_REV_2420: ## More readable.
>>
>> More readable, maybe, but not necessarily relevant nor
>> accurate if the
>> same IP version is used in another chip or revision.
>>
>> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
>
> How is value 0 accurate?
0 is just the revision number that can give you the exact list of Soc
that does use that IP. Thanks to an exhaustive comment.
0: OMAP2420
1: OMAP2430
2: OMAP3, DMxxx
3: OMAP4, OMAP5, DM816x
BTW, I'm still waiting the answer for previous question...
Regards,
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* RE: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 12:46 ` Cousson, Benoit
@ 2011-05-26 13:19 ` Premi, Sanjeev
-1 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 13:19 UTC (permalink / raw)
To: Cousson, Benoit
Cc: DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin, Shilimkar,
Santosh, tony, linux-arm-kernel, Varadarajan, Charulatha,
Paul Walmsley
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 6:17 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> linux-arm-kernel@lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 2:38 PM, Premi, Sanjeev wrote:
> >> -----Original Message-----
> >> From: Cousson, Benoit
> >> Sent: Thursday, May 26, 2011 5:41 PM
> >> To: Premi, Sanjeev
> >> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> >> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> >> linux-arm-kernel@lists.infradead.org; Varadarajan,
> >> Charulatha; Paul Walmsley
> >> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >> GPIO and rev_ids
> >>
> >> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
> >>>> -----Original Message-----
> >>>> From: Cousson, Benoit
> >>>> Sent: Thursday, May 26, 2011 3:41 PM
> >>>> To: Premi, Sanjeev
> >>>> Cc: DebBarma, Tarun Kanti; linux-omap@vger.kernel.org;
> >>>> Hilman, Kevin; Shilimkar, Santosh; tony@atomide.com;
> >>>> linux-arm-kernel@lists.infradead.org; Varadarajan,
> >>>> Charulatha; Paul Walmsley
> >>>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >>>> GPIO and rev_ids
> >>>>
> >>>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >>>>>> From: linux-omap-owner@vger.kernel.org
> >>>>>> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of
> >>>>>> DebBarma, Tarun Kanti
> >>>>>> Sent: Tuesday, May 24, 2011 7:55 PM
> >>>>>>
> >>>>>> From: Charulatha V<charu@ti.com>
> >>>>>>
> >>>>>> Non-wakeup GPIOs are available only in OMAP2420 and
> OMAP3430. But
> >>>>>> the GPIO driver initializes the non-wakeup GPIO bits
> for OMAP24xx
> >>>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is
> incorrect.
> >>>>>>
> >>>>>> Fix the above by providing non-wakeup GPIO information
> >>>> through pdata
> >>>>>> specific to the SoC.
> >>>>>>
> >>>>>> The GPIO rev id provided in the hwmod database is the same
> >>>>>> for OMAP2420
> >>>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
> >>>> given below
> >>>>>> so that it can be used to identify OMAP2420 and OMAP2430.
> >>>>>> OMAP2420 - 0
> >>>>>> OMAP2430 - 1
> >>>>>> OMAP3 - 2
> >>>>>> OMAP4 - 3
> >>>>>
> >>>>> [sp] Magic numbers should be avoided.
> >>>>> Suggest using something like:
> >>>>> #define GPIO_REV_2420 0
> >>>>> #define GPIO_REV_2430 1
> >>>>> #define GPIO_REV_34XX 2
> >>>>> #define GPIO_REV_44xx 3
> >>>>
> >>>> Well, it is not a magic number, it is a revision id that is
> >>>> incremented
> >>>> each time there is a difference in the IP.
[sp] Just to quote a definition:
[quote]The term magic number or magic constant also refers to
the programming practice of using numbers directly in source code.
[/quote]
It has no relation to whether/how it can signify something
important.
> >>>> The OMAP version -> IP version link is done at hwmod level.
> >>>> The driver
> >>>> does not have to know it is an OMAP3 or OMAP4. In that
> case we did
> >>>> change the IP version for every revisions, but OMAP5 will use
> >>>> the OMAP4
> >>>> revision.
[sp] I don't understand the confusion because IPs are anyways
going to be used across. Many macros originally created
for OMAP34XX are true/valid for OMAP36XX. And same holds
good (probably) for OMAP24XX as well.
But in each context, we are aware of the intended usage and
can relate to the use and reuse better because it is quite
evident. Use of OMAP2_CONTROL_GENERAL in OMAP34xx specific
function is not accurate by your example below, but we all
know the meaning and need for the same.
> >>>> I'm not even considering all the Davinci variants that are
> >> not named
> >>>> OMAP but do use OMAP IPs... as you already know...
> >>>> That can provide a rather confusing information for my
> >> point of view.
[sp] So now what happens when existing IP gets changed to fix
an issue in existing OMAP3 design. Going by same logic will
we add another id for the same?
> >>>>
> >>>> Whereas a comment like that will give you the exhaustive
> >> information.
> >>>>
> >>>> 0: OMAP2420
> >>>> 1: OMAP2430
> >>>> 2: OMAP3, DMxxx
> >>>> 3: OMAP4, OMAP5, DM816x
> >>>>
> >>>> That being said, some drivers already did that, so I'm not
> >> opposed to
> >>>> such change. I just think it is not the best approach.
[sp] Taking same point further, if the IP from OMAP4 above
gets used to create OMAP3699 (for example). How does this
case get handled? OR we expect users to know about exceptions
each time they read code?
Leaving aside the fact the situation is hypothetical; design
should be generic to handle such situations.
> >>>> At least it gives a pointer to the TRM that contains the IP doc.
> >>>
> >>> [sp] Benoit, your are right from generation perspectove where the
> >>> it is easier to increment numbers but when we use
> comparison
> >>
> >> This is not even related to generation. A version number
> is a number.
> >> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2,
> only that IP
> >> version is relevant for the driver.
> >> For the documentation point of view, since we do not have a
> >> per IP TRM,
> >> then it can make sense to know where that IP is
> documented. But as I
> >> said a comment is enough and will allow a much more
> relevant level of
> >> details information than a define.
[sp] Based on what I have read, it makes more sense is to have
the IP version used in this field verbatim. Then there is no
pollution with processor containing the IP.
> >>
> >>> code - as in this patch, comparison against a number isn't
> >>> readable.
> >>>
> >>> As example:
> >>>
> >>> + switch (oh->class->rev) { ## This is auto-generated.
> >>> + case 0: ## But this is our code.
> >>>
> >>> I am recommending this to read as:
> >>>
> >>> + switch (oh->class->rev) { ## This is auto-generated.
> >>> + case GPIO_REV_2420: ## More readable.
> >>
> >> More readable, maybe, but not necessarily relevant nor
> >> accurate if the
> >> same IP version is used in another chip or revision.
> >>
> >> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
> >
> > How is value 0 accurate?
>
> 0 is just the revision number that can give you the exact list of Soc
> that does use that IP. Thanks to an exhaustive comment.
[sp] The exhaustive comment will not accompany every place the field
"rev" is used in the code. So someone needs to find this comment
and then get the meaning of a revision.
Otherwise why do we define so many macros in files like control.h?
Exhaustive comments would have served well!
>
> 0: OMAP2420
> 1: OMAP2430
> 2: OMAP3, DMxxx
> 3: OMAP4, OMAP5, DM816x
>
>
> BTW, I'm still waiting the answer for previous question...
[sp] I didn't find a question - but responsded to what I appeared to
me as question(s).
I will be offline for few days. Futher responses will be delayed.
~sanjeev
>
> Regards,
> Benoit
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 13:19 ` Premi, Sanjeev
0 siblings, 0 replies; 118+ messages in thread
From: Premi, Sanjeev @ 2011-05-26 13:19 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Cousson, Benoit
> Sent: Thursday, May 26, 2011 6:17 PM
> To: Premi, Sanjeev
> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> linux-arm-kernel at lists.infradead.org; Varadarajan,
> Charulatha; Paul Walmsley
> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> GPIO and rev_ids
>
> On 5/26/2011 2:38 PM, Premi, Sanjeev wrote:
> >> -----Original Message-----
> >> From: Cousson, Benoit
> >> Sent: Thursday, May 26, 2011 5:41 PM
> >> To: Premi, Sanjeev
> >> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> >> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> >> linux-arm-kernel at lists.infradead.org; Varadarajan,
> >> Charulatha; Paul Walmsley
> >> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >> GPIO and rev_ids
> >>
> >> On 5/26/2011 1:47 PM, Premi, Sanjeev wrote:
> >>>> -----Original Message-----
> >>>> From: Cousson, Benoit
> >>>> Sent: Thursday, May 26, 2011 3:41 PM
> >>>> To: Premi, Sanjeev
> >>>> Cc: DebBarma, Tarun Kanti; linux-omap at vger.kernel.org;
> >>>> Hilman, Kevin; Shilimkar, Santosh; tony at atomide.com;
> >>>> linux-arm-kernel at lists.infradead.org; Varadarajan,
> >>>> Charulatha; Paul Walmsley
> >>>> Subject: Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup
> >>>> GPIO and rev_ids
> >>>>
> >>>> On 5/26/2011 11:23 AM, Premi, Sanjeev wrote:
> >>>>>> From: linux-omap-owner at vger.kernel.org
> >>>>>> [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
> >>>>>> DebBarma, Tarun Kanti
> >>>>>> Sent: Tuesday, May 24, 2011 7:55 PM
> >>>>>>
> >>>>>> From: Charulatha V<charu@ti.com>
> >>>>>>
> >>>>>> Non-wakeup GPIOs are available only in OMAP2420 and
> OMAP3430. But
> >>>>>> the GPIO driver initializes the non-wakeup GPIO bits
> for OMAP24xx
> >>>>>> (bothe OMAP 2420 and 2430)& not for OMAP3 which is
> incorrect.
> >>>>>>
> >>>>>> Fix the above by providing non-wakeup GPIO information
> >>>> through pdata
> >>>>>> specific to the SoC.
> >>>>>>
> >>>>>> The GPIO rev id provided in the hwmod database is the same
> >>>>>> for OMAP2420
> >>>>>> and OMAP2430. Change the GPIO rev ids in hwmod database as
> >>>> given below
> >>>>>> so that it can be used to identify OMAP2420 and OMAP2430.
> >>>>>> OMAP2420 - 0
> >>>>>> OMAP2430 - 1
> >>>>>> OMAP3 - 2
> >>>>>> OMAP4 - 3
> >>>>>
> >>>>> [sp] Magic numbers should be avoided.
> >>>>> Suggest using something like:
> >>>>> #define GPIO_REV_2420 0
> >>>>> #define GPIO_REV_2430 1
> >>>>> #define GPIO_REV_34XX 2
> >>>>> #define GPIO_REV_44xx 3
> >>>>
> >>>> Well, it is not a magic number, it is a revision id that is
> >>>> incremented
> >>>> each time there is a difference in the IP.
[sp] Just to quote a definition:
[quote]The term magic number or magic constant also refers to
the programming practice of using numbers directly in source code.
[/quote]
It has no relation to whether/how it can signify something
important.
> >>>> The OMAP version -> IP version link is done at hwmod level.
> >>>> The driver
> >>>> does not have to know it is an OMAP3 or OMAP4. In that
> case we did
> >>>> change the IP version for every revisions, but OMAP5 will use
> >>>> the OMAP4
> >>>> revision.
[sp] I don't understand the confusion because IPs are anyways
going to be used across. Many macros originally created
for OMAP34XX are true/valid for OMAP36XX. And same holds
good (probably) for OMAP24XX as well.
But in each context, we are aware of the intended usage and
can relate to the use and reuse better because it is quite
evident. Use of OMAP2_CONTROL_GENERAL in OMAP34xx specific
function is not accurate by your example below, but we all
know the meaning and need for the same.
> >>>> I'm not even considering all the Davinci variants that are
> >> not named
> >>>> OMAP but do use OMAP IPs... as you already know...
> >>>> That can provide a rather confusing information for my
> >> point of view.
[sp] So now what happens when existing IP gets changed to fix
an issue in existing OMAP3 design. Going by same logic will
we add another id for the same?
> >>>>
> >>>> Whereas a comment like that will give you the exhaustive
> >> information.
> >>>>
> >>>> 0: OMAP2420
> >>>> 1: OMAP2430
> >>>> 2: OMAP3, DMxxx
> >>>> 3: OMAP4, OMAP5, DM816x
> >>>>
> >>>> That being said, some drivers already did that, so I'm not
> >> opposed to
> >>>> such change. I just think it is not the best approach.
[sp] Taking same point further, if the IP from OMAP4 above
gets used to create OMAP3699 (for example). How does this
case get handled? OR we expect users to know about exceptions
each time they read code?
Leaving aside the fact the situation is hypothetical; design
should be generic to handle such situations.
> >>>> At least it gives a pointer to the TRM that contains the IP doc.
> >>>
> >>> [sp] Benoit, your are right from generation perspectove where the
> >>> it is easier to increment numbers but when we use
> comparison
> >>
> >> This is not even related to generation. A version number
> is a number.
> >> If OMAP2 is using GPIO v1.6 and OMAP3 the version v2.2,
> only that IP
> >> version is relevant for the driver.
> >> For the documentation point of view, since we do not have a
> >> per IP TRM,
> >> then it can make sense to know where that IP is
> documented. But as I
> >> said a comment is enough and will allow a much more
> relevant level of
> >> details information than a define.
[sp] Based on what I have read, it makes more sense is to have
the IP version used in this field verbatim. Then there is no
pollution with processor containing the IP.
> >>
> >>> code - as in this patch, comparison against a number isn't
> >>> readable.
> >>>
> >>> As example:
> >>>
> >>> + switch (oh->class->rev) { ## This is auto-generated.
> >>> + case 0: ## But this is our code.
> >>>
> >>> I am recommending this to read as:
> >>>
> >>> + switch (oh->class->rev) { ## This is auto-generated.
> >>> + case GPIO_REV_2420: ## More readable.
> >>
> >> More readable, maybe, but not necessarily relevant nor
> >> accurate if the
> >> same IP version is used in another chip or revision.
> >>
> >> What IP version is used in a DM816x? GPIO_REV_3430, GPIO_REV_4430?
> >
> > How is value 0 accurate?
>
> 0 is just the revision number that can give you the exact list of Soc
> that does use that IP. Thanks to an exhaustive comment.
[sp] The exhaustive comment will not accompany every place the field
"rev" is used in the code. So someone needs to find this comment
and then get the meaning of a revision.
Otherwise why do we define so many macros in files like control.h?
Exhaustive comments would have served well!
>
> 0: OMAP2420
> 1: OMAP2430
> 2: OMAP3, DMxxx
> 3: OMAP4, OMAP5, DM816x
>
>
> BTW, I'm still waiting the answer for previous question...
[sp] I didn't find a question - but responsded to what I appeared to
me as question(s).
I will be offline for few days. Futher responses will be delayed.
~sanjeev
>
> Regards,
> Benoit
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 12:46 ` Cousson, Benoit
@ 2011-05-26 13:38 ` B.J. Buchalter
-1 siblings, 0 replies; 118+ messages in thread
From: B.J. Buchalter @ 2011-05-26 13:38 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Hilman, Kevin, Paul Walmsley, Premi, Sanjeev, tony, Shilimkar,
Santosh, linux-omap, DebBarma, Tarun Kanti, linux-arm-kernel,
Varadarajan, Charulatha
Why not do the following:
#define OMAP_GPIO_REV_0 0
#define OMAP_GPIO_REV_1 1
#define OMAP_GPIO_REV_2 2
#define OMAP_GPIO_REV_3 3
/*
OMAP_GPIO_REV_0: OMAP2420
OMAP_GPIO_REV_1: OMAP2430
OMAP_GPIO_REV_2: OMAP3, DMxxx
OMAP_GPIO_REV_3: OMAP4, OMAP5, DM816x
*/
+ switch (oh->class->rev) { ## This is auto-generated.
+ case 0: ## But this is our code.
I am recommending this to read as:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case OMAP_GPIO_REV_0: ## More readable.
That approach solves both issues -- Revision -> Chip mapping in comment, no magic numbers in the code, and no implied restriction of the rev number to a specific SoC. Using the defines makes it easier to search the code for a specific revision, since you would no longer get false positives for all the other '0' and '1' constants that appear in the code. It also makes it indexible by tools like LXR.
B.J. Buchalter
Metric Halo
http://www.mhlabs.com
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 13:38 ` B.J. Buchalter
0 siblings, 0 replies; 118+ messages in thread
From: B.J. Buchalter @ 2011-05-26 13:38 UTC (permalink / raw)
To: linux-arm-kernel
Why not do the following:
#define OMAP_GPIO_REV_0 0
#define OMAP_GPIO_REV_1 1
#define OMAP_GPIO_REV_2 2
#define OMAP_GPIO_REV_3 3
/*
OMAP_GPIO_REV_0: OMAP2420
OMAP_GPIO_REV_1: OMAP2430
OMAP_GPIO_REV_2: OMAP3, DMxxx
OMAP_GPIO_REV_3: OMAP4, OMAP5, DM816x
*/
+ switch (oh->class->rev) { ## This is auto-generated.
+ case 0: ## But this is our code.
I am recommending this to read as:
+ switch (oh->class->rev) { ## This is auto-generated.
+ case OMAP_GPIO_REV_0: ## More readable.
That approach solves both issues -- Revision -> Chip mapping in comment, no magic numbers in the code, and no implied restriction of the rev number to a specific SoC. Using the defines makes it easier to search the code for a specific revision, since you would no longer get false positives for all the other '0' and '1' constants that appear in the code. It also makes it indexible by tools like LXR.
B.J. Buchalter
Metric Halo
http://www.mhlabs.com
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 13:38 ` B.J. Buchalter
@ 2011-05-26 14:12 ` Cousson, Benoit
-1 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 14:12 UTC (permalink / raw)
To: B.J. Buchalter
Cc: Premi, Sanjeev, DebBarma, Tarun Kanti, linux-omap, Hilman, Kevin,
Shilimkar, Santosh, tony, linux-arm-kernel, Varadarajan,
Charulatha, Paul Walmsley
On 5/26/2011 3:38 PM, B.J. Buchalter wrote:
> Why not do the following:
>
> #define OMAP_GPIO_REV_0 0
> #define OMAP_GPIO_REV_1 1
> #define OMAP_GPIO_REV_2 2
> #define OMAP_GPIO_REV_3 3
> /*
> OMAP_GPIO_REV_0: OMAP2420
> OMAP_GPIO_REV_1: OMAP2430
> OMAP_GPIO_REV_2: OMAP3, DMxxx
> OMAP_GPIO_REV_3: OMAP4, OMAP5, DM816x
> */
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case 0: ## But this is our code.
>
> I am recommending this to read as:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case OMAP_GPIO_REV_0: ## More readable.
>
> That approach solves both issues -- Revision -> Chip mapping in comment, no magic numbers in the code, and no implied restriction of the rev number to a specific SoC. Using the defines makes it easier to search the code for a specific revision, since you would no longer get false positives for all the other '0' and '1' constants that appear in the code. It also makes it indexible by tools like LXR.
This is indeed what was done for I2C recently.
The point is that this kind of define does not bring a lot of semantic.
But on the other hand it will definitively help the search aspect.
Thanks,
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 14:12 ` Cousson, Benoit
0 siblings, 0 replies; 118+ messages in thread
From: Cousson, Benoit @ 2011-05-26 14:12 UTC (permalink / raw)
To: linux-arm-kernel
On 5/26/2011 3:38 PM, B.J. Buchalter wrote:
> Why not do the following:
>
> #define OMAP_GPIO_REV_0 0
> #define OMAP_GPIO_REV_1 1
> #define OMAP_GPIO_REV_2 2
> #define OMAP_GPIO_REV_3 3
> /*
> OMAP_GPIO_REV_0: OMAP2420
> OMAP_GPIO_REV_1: OMAP2430
> OMAP_GPIO_REV_2: OMAP3, DMxxx
> OMAP_GPIO_REV_3: OMAP4, OMAP5, DM816x
> */
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case 0: ## But this is our code.
>
> I am recommending this to read as:
>
> + switch (oh->class->rev) { ## This is auto-generated.
> + case OMAP_GPIO_REV_0: ## More readable.
>
> That approach solves both issues -- Revision -> Chip mapping in comment, no magic numbers in the code, and no implied restriction of the rev number to a specific SoC. Using the defines makes it easier to search the code for a specific revision, since you would no longer get false positives for all the other '0' and '1' constants that appear in the code. It also makes it indexible by tools like LXR.
This is indeed what was done for I2C recently.
The point is that this kind of define does not bring a lot of semantic.
But on the other hand it will definitively help the search aspect.
Thanks,
Benoit
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 9:38 ` Varadarajan, Charulatha
@ 2011-05-26 17:15 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-26 17:15 UTC (permalink / raw)
To: Varadarajan, Charulatha
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel, Cousson, Benoit, Paul Walmsley
"Varadarajan, Charulatha" <charu@ti.com> writes:
> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>
>>> From: Charulatha V <charu@ti.com>
>>>
>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>
>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>> GPIOs?
>
> I am referring to Table 25-5. GPIO Channel Description at page no 3354
> OMAP3430 public TRM Version P.
>
Based on how I understand that, those non-wakeup GPIOs are non-wakeup
because they're not actually mapped anywhere, and not available on
external pins. Therefore, they should not need any special case
handling for this triggering workaround.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 17:15 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-26 17:15 UTC (permalink / raw)
To: linux-arm-kernel
"Varadarajan, Charulatha" <charu@ti.com> writes:
> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>
>>> From: Charulatha V <charu@ti.com>
>>>
>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>
>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>> GPIOs?
>
> I am referring to Table 25-5. GPIO Channel Description at page no 3354
> OMAP3430 public TRM Version P.
>
Based on how I understand that, those non-wakeup GPIOs are non-wakeup
because they're not actually mapped anywhere, and not available on
external pins. Therefore, they should not need any special case
handling for this triggering workaround.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 17:15 ` Kevin Hilman
@ 2011-05-26 17:39 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 17:39 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel, Cousson, Benoit, Paul Walmsley
Kevin,
On Thu, May 26, 2011 at 12:15, Kevin Hilman <khilman@ti.com> wrote:
> "Varadarajan, Charulatha" <charu@ti.com> writes:
>
>> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>>
>>>> From: Charulatha V <charu@ti.com>
>>>>
>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>>
>>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>>> GPIOs?
>>
>> I am referring to Table 25-5. GPIO Channel Description at page no 3354
>> OMAP3430 public TRM Version P.
>>
>
> Based on how I understand that, those non-wakeup GPIOs are non-wakeup
> because they're not actually mapped anywhere, and not available on
> external pins. Therefore, they should not need any special case
> handling for this triggering workaround.
Okay. Thanks for clarifying. I will not do this for OMAP3. The special case
would be only for OMAP2420 against the current code which is handling
for OMAP24xx.
-V Charulatha
>
> Kevin
>
>
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 17:39 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-05-26 17:39 UTC (permalink / raw)
To: linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 12:15, Kevin Hilman <khilman@ti.com> wrote:
> "Varadarajan, Charulatha" <charu@ti.com> writes:
>
>> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>>
>>>> From: Charulatha V <charu@ti.com>
>>>>
>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>>
>>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>>> GPIOs?
>>
>> I am referring to Table 25-5. GPIO Channel Description at page no 3354
>> OMAP3430 public TRM Version P.
>>
>
> Based on how I understand that, those non-wakeup GPIOs are non-wakeup
> because they're not actually mapped anywhere, and not available on
> external pins. ?Therefore, they should not need any special case
> handling for this triggering workaround.
Okay. Thanks for clarifying. I will not do this for OMAP3. The special case
would be only for OMAP2420 against the current code which is handling
for OMAP24xx.
-V Charulatha
>
> Kevin
>
>
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
2011-05-26 17:39 ` Varadarajan, Charulatha
@ 2011-05-26 18:32 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-26 18:32 UTC (permalink / raw)
To: Varadarajan, Charulatha
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel, Cousson, Benoit, Paul Walmsley
"Varadarajan, Charulatha" <charu@ti.com> writes:
> Kevin,
>
> On Thu, May 26, 2011 at 12:15, Kevin Hilman <khilman@ti.com> wrote:
>> "Varadarajan, Charulatha" <charu@ti.com> writes:
>>
>>> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>>>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>>>
>>>>> From: Charulatha V <charu@ti.com>
>>>>>
>>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>>>
>>>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>>>> GPIOs?
>>>
>>> I am referring to Table 25-5. GPIO Channel Description at page no 3354
>>> OMAP3430 public TRM Version P.
>>>
>>
>> Based on how I understand that, those non-wakeup GPIOs are non-wakeup
>> because they're not actually mapped anywhere, and not available on
>> external pins. Therefore, they should not need any special case
>> handling for this triggering workaround.
>
> Okay. Thanks for clarifying. I will not do this for OMAP3. The special case
> would be only for OMAP2420 against the current code which is handling
> for OMAP24xx.
>
Great, thanks.
Kevin
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids
@ 2011-05-26 18:32 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-05-26 18:32 UTC (permalink / raw)
To: linux-arm-kernel
"Varadarajan, Charulatha" <charu@ti.com> writes:
> Kevin,
>
> On Thu, May 26, 2011 at 12:15, Kevin Hilman <khilman@ti.com> wrote:
>> "Varadarajan, Charulatha" <charu@ti.com> writes:
>>
>>> On Thu, May 26, 2011 at 03:04, Kevin Hilman <khilman@ti.com> wrote:
>>>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>>>
>>>>> From: Charulatha V <charu@ti.com>
>>>>>
>>>>> Non-wakeup GPIOs are available only in OMAP2420 and OMAP3430. But
>>>>> the GPIO driver initializes the non-wakeup GPIO bits for OMAP24xx
>>>>> (bothe OMAP 2420 and 2430) & not for OMAP3 which is incorrect.
>>>>
>>>> Can you cite the documentation you're using for the OMAP3 non-wakeup
>>>> GPIOs?
>>>
>>> I am referring to Table 25-5. GPIO Channel Description at page no 3354
>>> OMAP3430 public TRM Version P.
>>>
>>
>> Based on how I understand that, those non-wakeup GPIOs are non-wakeup
>> because they're not actually mapped anywhere, and not available on
>> external pins. ?Therefore, they should not need any special case
>> handling for this triggering workaround.
>
> Okay. Thanks for clarifying. I will not do this for OMAP3. The special case
> would be only for OMAP2420 against the current code which is handling
> for OMAP24xx.
>
Great, thanks.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
2011-05-25 23:48 ` Kevin Hilman
@ 2011-06-03 11:20 ` Varadarajan, Charulatha
-1 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-06-03 11:20 UTC (permalink / raw)
To: Kevin Hilman
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 05:18, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> With register offsets now defined for respective OMAP versions
>> we can get rid of cpu_class_* checks. In addition, organized
>> common initialization for the different OMAP silicon versions.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>
> The sysconfig stuff in this patch should be removed. In fact, now that
> hwmod is used to manage all the GPIO IP blocks, the driver should not be
> touching sysconfig at all.
The sysconfig stuff in this patch is for OMAP16XX.
>
> The hwmod defaults should be enough, and for enabling wake-ups, the
> device-specific code should be calling omap_hwmod_enable_wakeup() (which
> will also enable smart-idle if the IP supports it.)
>
>
>> ---
>> arch/arm/mach-omap1/gpio16xx.c | 1 +
>> arch/arm/plat-omap/include/plat/gpio.h | 1 +
>> drivers/gpio/gpio_omap.c | 74 +++++++++++++-------------------
>> 3 files changed, 32 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index 24f6cfa..e9f8abd 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
>> omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
>> omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
>> omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
>> + omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
>>
>> for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
>> platform_device_register(omap16xx_gpio_dev[i]);
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index f82881c..ac45191 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
>>
>> struct omap_gpio_reg_offs {
>> u16 revision;
>> + u16 sysconfig;
>> u16 direction;
>> u16 datain;
>> u16 dataout;
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index ebeb16e..3649c74 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
>> called = true;
>> }
>>
>> -/* This lock class tells lockdep that GPIO irqs are in a different
>> +/*
>> + * This lock class tells lockdep that GPIO irqs are in a different
>> * category than their parents, so it won't report false recursion.
>> */
>> static struct lock_class_key gpio_lock_class;
>>
>> -/* TODO: Cleanup cpu_is_* checks */
>> static void omap_gpio_mod_init(struct gpio_bank *bank)
>> {
>> - if (cpu_class_is_omap2()) {
>> - if (cpu_is_omap44xx()) {
>> - __raw_writel(0xffffffff, bank->base +
>> - OMAP4_GPIO_IRQSTATUSCLR0);
>> - __raw_writel(0x00000000, bank->base +
>> - OMAP4_GPIO_DEBOUNCENABLE);
>> - /* Initialize interface clk ungated, module enabled */
>> - __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
>> - } else if (cpu_is_omap34xx()) {
>> - __raw_writel(0x00000000, bank->base +
>> - OMAP24XX_GPIO_IRQENABLE1);
>> - __raw_writel(0xffffffff, bank->base +
>> - OMAP24XX_GPIO_IRQSTATUS1);
>> - __raw_writel(0x00000000, bank->base +
>> - OMAP24XX_GPIO_DEBOUNCE_EN);
>> + if (bank->width == 32) {
>> + u32 l = 0;
>> +
>> + if (bank->regs->irqenable_inv)
>> + l = ~l;
>>
>> + __raw_writel(l, bank->base + bank->regs->irqstatus);
>
> The ->irqenable_inv flag doesn't affect ->irqstatus.
>
>> + __raw_writel(l, bank->base + bank->regs->irqenable);
>> +
>> + if (bank->regs->debounce_en != USHRT_MAX)
>> + __raw_writel(l, bank->base + bank->regs->debounce_en);
>
> If ->irqenable_inv = true, debounce was just enabled for all GPIOs in
> the bank.
>
>> + if (bank->regs->ctrl != USHRT_MAX)
>> /* Initialize interface clk ungated, module enabled */
>> - __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
>> - }
>> - } else if (cpu_class_is_omap1()) {
>> - if (bank_is_mpuio(bank)) {
>> - __raw_writew(0xffff, bank->base +
>> - OMAP_MPUIO_GPIO_MASKIT / bank->stride);
>> + __raw_writel(l, bank->base + bank->regs->ctrl);
>
> If ->irqenable_env = true, all the clocks were just gated.
Okay. Will do the needful.
>
> Similar problems below.
>
> Kevin
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
@ 2011-06-03 11:20 ` Varadarajan, Charulatha
0 siblings, 0 replies; 118+ messages in thread
From: Varadarajan, Charulatha @ 2011-06-03 11:20 UTC (permalink / raw)
To: linux-arm-kernel
Kevin,
On Thu, May 26, 2011 at 05:18, Kevin Hilman <khilman@ti.com> wrote:
> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>
>> From: Charulatha V <charu@ti.com>
>>
>> With register offsets now defined for respective OMAP versions
>> we can get rid of cpu_class_* checks. In addition, organized
>> common initialization for the different OMAP silicon versions.
>>
>> Signed-off-by: Charulatha V <charu@ti.com>
>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>
> The sysconfig stuff in this patch should be removed. ?In fact, now that
> hwmod is used to manage all the GPIO IP blocks, the driver should not be
> touching sysconfig at all.
The sysconfig stuff in this patch is for OMAP16XX.
>
> The hwmod defaults should be enough, and for enabling wake-ups, the
> device-specific code should be calling omap_hwmod_enable_wakeup() (which
> will also enable smart-idle if the IP supports it.)
>
>
>> ---
>> ?arch/arm/mach-omap1/gpio16xx.c ? ? ? ? | ? ?1 +
>> ?arch/arm/plat-omap/include/plat/gpio.h | ? ?1 +
>> ?drivers/gpio/gpio_omap.c ? ? ? ? ? ? ? | ? 74 +++++++++++++-------------------
>> ?3 files changed, 32 insertions(+), 44 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
>> index 24f6cfa..e9f8abd 100644
>> --- a/arch/arm/mach-omap1/gpio16xx.c
>> +++ b/arch/arm/mach-omap1/gpio16xx.c
>> @@ -227,6 +227,7 @@ static int __init omap16xx_gpio_init(void)
>> ? ? ? omap16xx_gpio_regs.wkupset = OMAP1610_GPIO_SET_WAKEUPENA;
>> ? ? ? omap16xx_gpio_regs.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1;
>> ? ? ? omap16xx_gpio_regs.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2;
>> + ? ? omap16xx_gpio_regs.sysconfig = OMAP1610_GPIO_SYSCONFIG;
>>
>> ? ? ? for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
>> ? ? ? ? ? ? ? platform_device_register(omap16xx_gpio_dev[i]);
>> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
>> index f82881c..ac45191 100644
>> --- a/arch/arm/plat-omap/include/plat/gpio.h
>> +++ b/arch/arm/plat-omap/include/plat/gpio.h
>> @@ -176,6 +176,7 @@ struct omap_gpio_dev_attr {
>>
>> ?struct omap_gpio_reg_offs {
>> ? ? ? u16 revision;
>> + ? ? u16 sysconfig;
>> ? ? ? u16 direction;
>> ? ? ? u16 datain;
>> ? ? ? u16 dataout;
>> diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c
>> index ebeb16e..3649c74 100644
>> --- a/drivers/gpio/gpio_omap.c
>> +++ b/drivers/gpio/gpio_omap.c
>> @@ -885,65 +885,51 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
>> ? ? ? called = true;
>> ?}
>>
>> -/* This lock class tells lockdep that GPIO irqs are in a different
>> +/*
>> + * This lock class tells lockdep that GPIO irqs are in a different
>> ? * category than their parents, so it won't report false recursion.
>> ? */
>> ?static struct lock_class_key gpio_lock_class;
>>
>> -/* TODO: Cleanup cpu_is_* checks */
>> ?static void omap_gpio_mod_init(struct gpio_bank *bank)
>> ?{
>> - ? ? if (cpu_class_is_omap2()) {
>> - ? ? ? ? ? ? if (cpu_is_omap44xx()) {
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0xffffffff, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP4_GPIO_IRQSTATUSCLR0);
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0x00000000, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OMAP4_GPIO_DEBOUNCENABLE);
>> - ? ? ? ? ? ? ? ? ? ? /* Initialize interface clk ungated, module enabled */
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
>> - ? ? ? ? ? ? } else if (cpu_is_omap34xx()) {
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0x00000000, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_IRQENABLE1);
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0xffffffff, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_IRQSTATUS1);
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0x00000000, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP24XX_GPIO_DEBOUNCE_EN);
>> + ? ? if (bank->width == 32) {
>> + ? ? ? ? ? ? u32 l = 0;
>> +
>> + ? ? ? ? ? ? if (bank->regs->irqenable_inv)
>> + ? ? ? ? ? ? ? ? ? ? l = ~l;
>>
>> + ? ? ? ? ? ? __raw_writel(l, bank->base + bank->regs->irqstatus);
>
> The ->irqenable_inv flag doesn't affect ->irqstatus.
>
>> + ? ? ? ? ? ? __raw_writel(l, bank->base + bank->regs->irqenable);
>> +
>> + ? ? ? ? ? ? if (bank->regs->debounce_en != USHRT_MAX)
>> + ? ? ? ? ? ? ? ? ? ? __raw_writel(l, bank->base + bank->regs->debounce_en);
>
> If ->irqenable_inv = true, debounce was just enabled for all GPIOs in
> the bank.
>
>> + ? ? ? ? ? ? if (bank->regs->ctrl != USHRT_MAX)
>> ? ? ? ? ? ? ? ? ? ? ? /* Initialize interface clk ungated, module enabled */
>> - ? ? ? ? ? ? ? ? ? ? __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
>> - ? ? ? ? ? ? }
>> - ? ? } else if (cpu_class_is_omap1()) {
>> - ? ? ? ? ? ? if (bank_is_mpuio(bank)) {
>> - ? ? ? ? ? ? ? ? ? ? __raw_writew(0xffff, bank->base +
>> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? OMAP_MPUIO_GPIO_MASKIT / bank->stride);
>> + ? ? ? ? ? ? ? ? ? ? ?__raw_writel(l, bank->base + bank->regs->ctrl);
>
> If ->irqenable_env = true, all the clocks were just gated.
Okay. Will do the needful.
>
> Similar problems below.
>
> Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
* Re: [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
2011-06-03 11:20 ` Varadarajan, Charulatha
@ 2011-06-03 14:31 ` Kevin Hilman
-1 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-06-03 14:31 UTC (permalink / raw)
To: Varadarajan, Charulatha
Cc: Tarun Kanti DebBarma, linux-omap, santosh.shilimkar, tony,
linux-arm-kernel
"Varadarajan, Charulatha" <charu@ti.com> writes:
> Kevin,
>
> On Thu, May 26, 2011 at 05:18, Kevin Hilman <khilman@ti.com> wrote:
>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>
>>> From: Charulatha V <charu@ti.com>
>>>
>>> With register offsets now defined for respective OMAP versions
>>> we can get rid of cpu_class_* checks. In addition, organized
>>> common initialization for the different OMAP silicon versions.
>>>
>>> Signed-off-by: Charulatha V <charu@ti.com>
>>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>>
>> The sysconfig stuff in this patch should be removed. In fact, now that
>> hwmod is used to manage all the GPIO IP blocks, the driver should not be
>> touching sysconfig at all.
>
> The sysconfig stuff in this patch is for OMAP16XX.
>
Ah, OK. Sorry I missed that.
Kevin
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^ permalink raw reply [flat|nested] 118+ messages in thread
* [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function
@ 2011-06-03 14:31 ` Kevin Hilman
0 siblings, 0 replies; 118+ messages in thread
From: Kevin Hilman @ 2011-06-03 14:31 UTC (permalink / raw)
To: linux-arm-kernel
"Varadarajan, Charulatha" <charu@ti.com> writes:
> Kevin,
>
> On Thu, May 26, 2011 at 05:18, Kevin Hilman <khilman@ti.com> wrote:
>> Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
>>
>>> From: Charulatha V <charu@ti.com>
>>>
>>> With register offsets now defined for respective OMAP versions
>>> we can get rid of cpu_class_* checks. In addition, organized
>>> common initialization for the different OMAP silicon versions.
>>>
>>> Signed-off-by: Charulatha V <charu@ti.com>
>>> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
>>
>> The sysconfig stuff in this patch should be removed. ?In fact, now that
>> hwmod is used to manage all the GPIO IP blocks, the driver should not be
>> touching sysconfig at all.
>
> The sysconfig stuff in this patch is for OMAP16XX.
>
Ah, OK. Sorry I missed that.
Kevin
^ permalink raw reply [flat|nested] 118+ messages in thread
end of thread, other threads:[~2011-06-03 14:31 UTC | newest]
Thread overview: 118+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-05-24 14:24 [PATCH 00/15] OMAP: GPIO: Cleanup OMAP GPIO driver Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-24 14:24 ` [PATCH 01/15] OMAP: GPIO: Avoid cpu_is checks during module ena/disable Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 21:19 ` Kevin Hilman
2011-05-25 21:19 ` Kevin Hilman
2011-05-26 9:38 ` Varadarajan, Charulatha
2011-05-26 9:38 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 02/15] OMAP2PLUS: GPIO: Fix non-wakeup GPIO and rev_ids Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 21:34 ` Kevin Hilman
2011-05-25 21:34 ` Kevin Hilman
2011-05-26 9:38 ` Varadarajan, Charulatha
2011-05-26 9:38 ` Varadarajan, Charulatha
2011-05-26 17:15 ` Kevin Hilman
2011-05-26 17:15 ` Kevin Hilman
2011-05-26 17:39 ` Varadarajan, Charulatha
2011-05-26 17:39 ` Varadarajan, Charulatha
2011-05-26 18:32 ` Kevin Hilman
2011-05-26 18:32 ` Kevin Hilman
2011-05-26 9:23 ` Premi, Sanjeev
2011-05-26 9:23 ` Premi, Sanjeev
2011-05-26 9:43 ` Varadarajan, Charulatha
2011-05-26 9:43 ` Varadarajan, Charulatha
2011-05-26 10:11 ` Cousson, Benoit
2011-05-26 10:11 ` Cousson, Benoit
2011-05-26 11:47 ` Premi, Sanjeev
2011-05-26 11:47 ` Premi, Sanjeev
2011-05-26 12:11 ` Cousson, Benoit
2011-05-26 12:11 ` Cousson, Benoit
2011-05-26 12:38 ` Premi, Sanjeev
2011-05-26 12:38 ` Premi, Sanjeev
2011-05-26 12:46 ` Cousson, Benoit
2011-05-26 12:46 ` Cousson, Benoit
2011-05-26 13:19 ` Premi, Sanjeev
2011-05-26 13:19 ` Premi, Sanjeev
2011-05-26 13:38 ` B.J. Buchalter
2011-05-26 13:38 ` B.J. Buchalter
2011-05-26 14:12 ` Cousson, Benoit
2011-05-26 14:12 ` Cousson, Benoit
2011-05-24 14:24 ` [PATCH 03/15] OMAP: GPIO: Remove dependency on gpio_bank_count Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-24 14:24 ` [PATCH 04/15] OMAP2PLUS: GPIO: Use flag to identify wkup dmn GPIO Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 21:40 ` Kevin Hilman
2011-05-25 21:40 ` Kevin Hilman
2011-05-24 14:24 ` [PATCH 05/15] OMAP: GPIO: Make gpio_context part of gpio_bank structure Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 21:41 ` Kevin Hilman
2011-05-25 21:41 ` Kevin Hilman
2011-05-26 9:58 ` Premi, Sanjeev
2011-05-26 9:58 ` Premi, Sanjeev
2011-05-26 10:07 ` Varadarajan, Charulatha
2011-05-26 10:07 ` Varadarajan, Charulatha
2011-05-26 9:59 ` Premi, Sanjeev
2011-05-26 9:59 ` Premi, Sanjeev
2011-05-24 14:24 ` [PATCH 06/15] OMAP4: GPIO: Save/restore context Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 21:43 ` Kevin Hilman
2011-05-25 21:43 ` Kevin Hilman
2011-05-26 9:37 ` Varadarajan, Charulatha
2011-05-26 9:37 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 07/15] OMAP: GPIO: handle save/restore ctx in GPIO driver Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 22:33 ` Kevin Hilman
2011-05-25 22:33 ` Kevin Hilman
2011-05-25 22:36 ` Kevin Hilman
2011-05-25 22:36 ` Kevin Hilman
2011-05-24 14:24 ` [PATCH 08/15] OMAP2+: GPIO: make workaround_enabled bank specific Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 22:39 ` Kevin Hilman
2011-05-25 22:39 ` Kevin Hilman
2011-05-26 9:37 ` Varadarajan, Charulatha
2011-05-26 9:37 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 09/15] OMAP: GPIO: cleanup suspend and resume functions Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 22:57 ` Kevin Hilman
2011-05-25 22:57 ` Kevin Hilman
2011-05-26 10:02 ` Varadarajan, Charulatha
2011-05-26 10:02 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 10/15] OMAP: GPIO: cleanup prepare/resume idle functions Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:00 ` Kevin Hilman
2011-05-25 23:00 ` Kevin Hilman
2011-05-24 14:24 ` [PATCH 11/15] OMAP: GPIO: Remove hardcoded offsets in ctxt save/restore Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:01 ` Kevin Hilman
2011-05-25 23:01 ` Kevin Hilman
2011-05-26 9:36 ` Varadarajan, Charulatha
2011-05-26 9:36 ` Varadarajan, Charulatha
2011-05-26 9:42 ` Premi, Sanjeev
2011-05-26 9:42 ` Premi, Sanjeev
2011-05-26 9:48 ` Varadarajan, Charulatha
2011-05-26 9:48 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 12/15] OMAP: GPIO: Fix: use wake set/clear regs Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:14 ` Kevin Hilman
2011-05-25 23:14 ` Kevin Hilman
2011-05-26 9:36 ` Varadarajan, Charulatha
2011-05-26 9:36 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 13/15] OMAP: GPIO: clean set_gpio_triggering function Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:27 ` Kevin Hilman
2011-05-25 23:27 ` Kevin Hilman
2011-05-26 9:55 ` Varadarajan, Charulatha
2011-05-26 9:55 ` Varadarajan, Charulatha
2011-05-24 14:24 ` [PATCH 14/15] OMAP: GPIO: Use memset for omap_gpio_reg_offs Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:30 ` Kevin Hilman
2011-05-25 23:30 ` Kevin Hilman
2011-05-24 14:24 ` [PATCH 15/15] OMAP: GPIO: clean omap_gpio_mod_init function Tarun Kanti DebBarma
2011-05-24 14:24 ` Tarun Kanti DebBarma
2011-05-25 23:48 ` Kevin Hilman
2011-05-25 23:48 ` Kevin Hilman
2011-06-03 11:20 ` Varadarajan, Charulatha
2011-06-03 11:20 ` Varadarajan, Charulatha
2011-06-03 14:31 ` Kevin Hilman
2011-06-03 14:31 ` Kevin Hilman
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