* [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds
@ 2022-02-10 18:52 José Roberto de Souza
2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: José Roberto de Souza @ 2022-02-10 18:52 UTC (permalink / raw)
To: intel-gfx
Grouping inside of the same if all the programing sequences and
workarounds of PSR2.
The order of programing changed in intel_psr_enable_source() but
it will not affect PSR2 as at this point PSR2_ENABLE is still disabled.
Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 77 ++++++++++++------------
1 file changed, 37 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a1a663f362e7d..72bd8d3261e0c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1069,25 +1069,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp)
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
u32 mask;
- if (intel_dp->psr.psr2_enabled && DISPLAY_VER(dev_priv) == 9) {
- i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder);
- u32 chicken = intel_de_read(dev_priv, reg);
-
- chicken |= PSR2_VSC_ENABLE_PROG_HEADER |
- PSR2_ADD_VERTICAL_LINE_COUNT;
- intel_de_write(dev_priv, reg, chicken);
- }
-
- /*
- * Wa_16014451276:adlp
- * All supported adlp panels have 1-based X granularity, this may
- * cause issues if non-supported panels are used.
- */
- if (IS_ALDERLAKE_P(dev_priv) &&
- intel_dp->psr.psr2_enabled)
- intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
- ADLP_1_BASED_X_GRANULARITY);
-
/*
* Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD also
* mask LPSP to avoid dependency on other drivers that might block
@@ -1126,18 +1107,33 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp)
intel_dp->psr.psr2_sel_fetch_enabled ?
IGNORE_PSR2_HW_TRACKING : 0);
- /* Wa_16011168373:adl-p */
- if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) &&
- intel_dp->psr.psr2_enabled)
- intel_de_rmw(dev_priv,
- TRANS_SET_CONTEXT_LATENCY(intel_dp->psr.transcoder),
- TRANS_SET_CONTEXT_LATENCY_MASK,
- TRANS_SET_CONTEXT_LATENCY_VALUE(1));
+ if (intel_dp->psr.psr2_enabled) {
+ if (DISPLAY_VER(dev_priv) == 9)
+ intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
+ PSR2_VSC_ENABLE_PROG_HEADER |
+ PSR2_ADD_VERTICAL_LINE_COUNT);
- /* Wa_16012604467:adlp */
- if (IS_ALDERLAKE_P(dev_priv) && intel_dp->psr.psr2_enabled)
- intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
- CLKGATE_DIS_MISC_DMASC_GATING_DIS);
+ /*
+ * Wa_16014451276:adlp
+ * All supported adlp panels have 1-based X granularity, this may
+ * cause issues if non-supported panels are used.
+ */
+ if (IS_ALDERLAKE_P(dev_priv))
+ intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0,
+ ADLP_1_BASED_X_GRANULARITY);
+
+ /* Wa_16011168373:adl-p */
+ if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
+ intel_de_rmw(dev_priv,
+ TRANS_SET_CONTEXT_LATENCY(intel_dp->psr.transcoder),
+ TRANS_SET_CONTEXT_LATENCY_MASK,
+ TRANS_SET_CONTEXT_LATENCY_VALUE(1));
+
+ /* Wa_16012604467:adlp */
+ if (IS_ALDERLAKE_P(dev_priv))
+ intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0,
+ CLKGATE_DIS_MISC_DMASC_GATING_DIS);
+ }
}
static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
@@ -1290,17 +1286,18 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
- /* Wa_16011168373:adl-p */
- if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) &&
- intel_dp->psr.psr2_enabled)
- intel_de_rmw(dev_priv,
- TRANS_SET_CONTEXT_LATENCY(intel_dp->psr.transcoder),
- TRANS_SET_CONTEXT_LATENCY_MASK, 0);
+ if (intel_dp->psr.psr2_enabled) {
+ /* Wa_16011168373:adl-p */
+ if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
+ intel_de_rmw(dev_priv,
+ TRANS_SET_CONTEXT_LATENCY(intel_dp->psr.transcoder),
+ TRANS_SET_CONTEXT_LATENCY_MASK, 0);
- /* Wa_16012604467:adlp */
- if (IS_ALDERLAKE_P(dev_priv) && intel_dp->psr.psr2_enabled)
- intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
- CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
+ /* Wa_16012604467:adlp */
+ if (IS_ALDERLAKE_P(dev_priv))
+ intel_de_rmw(dev_priv, CLKGATE_DIS_MISC,
+ CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
+ }
intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
--
2.35.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza @ 2022-02-10 18:52 ` José Roberto de Souza 2022-02-15 12:31 ` Hogander, Jouni 2022-02-15 13:47 ` Lisovskiy, Stanislav 2022-02-10 19:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds Patchwork ` (3 subsequent siblings) 4 siblings, 2 replies; 12+ messages in thread From: José Roberto de Souza @ 2022-02-10 18:52 UTC (permalink / raw) To: intel-gfx PSR2 workaround required when mode has delayed vblank. BSpec: 52890 BSpec: 49421 Cc: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 40 ++++++++++++++++++++++-- drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- 2 files changed, 46 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 72bd8d3261e0c..2e0b092f4b6be 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct intel_dp *intel_dp) intel_dp->psr.active = true; } -static void intel_psr_enable_source(struct intel_dp *intel_dp) +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) +{ + switch (intel_dp->psr.pipe) { + case PIPE_A: + return LATENCY_REPORTING_REMOVED_PIPE_A; + case PIPE_B: + return LATENCY_REPORTING_REMOVED_PIPE_B; + case PIPE_C: + return LATENCY_REPORTING_REMOVED_PIPE_C; + default: + MISSING_CASE(intel_dp->psr.pipe); + return 0; + } +} + +static void intel_psr_enable_source(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp) if (IS_ALDERLAKE_P(dev_priv)) intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, CLKGATE_DIS_MISC_DMASC_GATING_DIS); + + /* Wa_16013835468:tgl[b0+], dg1 */ + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || + IS_DG1(dev_priv)) { + u16 vtotal, vblank; + + vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal - + crtc_state->uapi.adjusted_mode.crtc_vdisplay; + vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end - + crtc_state->uapi.adjusted_mode.crtc_vblank_start; + if (vblank > vtotal) + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, + wa_16013835468_bit_get(intel_dp)); + } } } @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc); intel_snps_phy_update_psr_power_state(dev_priv, phy, true); intel_psr_enable_sink(intel_dp); - intel_psr_enable_source(intel_dp); + intel_psr_enable_source(intel_dp, crtc_state); intel_dp->psr.enabled = true; intel_dp->psr.paused = false; @@ -1297,6 +1327,12 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) if (IS_ALDERLAKE_P(dev_priv)) intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0); + + /* Wa_16013835468:tgl[b0+], dg1 */ + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || + IS_DG1(dev_priv)) + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, + wa_16013835468_bit_get(intel_dp), 0); } intel_snps_phy_update_psr_power_state(dev_priv, phy, false); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 87c92314ee269..1cd4056400b63 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6040,11 +6040,14 @@ #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) -#define ICL_DELAY_PMRSP REG_BIT(22) -#define DISABLE_FLR_SRC REG_BIT(15) -#define MASK_WAKEMEM REG_BIT(13) +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) +#define ICL_DELAY_PMRSP REG_BIT(22) +#define DISABLE_FLR_SRC REG_BIT(15) +#define MASK_WAKEMEM REG_BIT(13) #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) -- 2.35.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza @ 2022-02-15 12:31 ` Hogander, Jouni 2022-02-16 13:48 ` Souza, Jose 2022-02-15 13:47 ` Lisovskiy, Stanislav 1 sibling, 1 reply; 12+ messages in thread From: Hogander, Jouni @ 2022-02-15 12:31 UTC (permalink / raw) To: intel-gfx, Souza, Jose On Thu, 2022-02-10 at 10:52 -0800, José Roberto de Souza wrote: > PSR2 workaround required when mode has delayed vblank. > > BSpec: 52890 > BSpec: 49421 > Cc: Jouni Högander <jouni.hogander@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 40 > ++++++++++++++++++++++-- > drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- > 2 files changed, 46 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 72bd8d3261e0c..2e0b092f4b6be 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct intel_dp > *intel_dp) > intel_dp->psr.active = true; > } > > -static void intel_psr_enable_source(struct intel_dp *intel_dp) > +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) > +{ > + switch (intel_dp->psr.pipe) { > + case PIPE_A: > + return LATENCY_REPORTING_REMOVED_PIPE_A; > + case PIPE_B: > + return LATENCY_REPORTING_REMOVED_PIPE_B; > + case PIPE_C: > + return LATENCY_REPORTING_REMOVED_PIPE_C; > + default: > + MISSING_CASE(intel_dp->psr.pipe); > + return 0; > + } > +} > + > +static void intel_psr_enable_source(struct intel_dp *intel_dp, > + const struct intel_crtc_state > *crtc_state) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct > intel_dp *intel_dp) > if (IS_ALDERLAKE_P(dev_priv)) > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > CLKGATE_DIS_MISC_DMASC_GATING_DIS) > ; > + > + /* Wa_16013835468:tgl[b0+], dg1 */ > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > STEP_FOREVER) || > + IS_DG1(dev_priv)) { > + u16 vtotal, vblank; > + > + vtotal = crtc_state- > >uapi.adjusted_mode.crtc_vtotal - > + crtc_state- > >uapi.adjusted_mode.crtc_vdisplay; > + vblank = crtc_state- > >uapi.adjusted_mode.crtc_vblank_end - > + crtc_state- > >uapi.adjusted_mode.crtc_vblank_start; > + if (vblank > vtotal) Can you please explain how this calculation indicates we are using "delayed vblank"? Otherwise patch seems to be doing what is written in WA description. > + intel_de_rmw(dev_priv, > GEN8_CHICKEN_DCPR_1, 0, > + wa_16013835468_bit_get(int > el_dp)); > + } > } > } > > @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct > intel_dp *intel_dp, > intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state- > >psr_vsc); > intel_snps_phy_update_psr_power_state(dev_priv, phy, true); > intel_psr_enable_sink(intel_dp); > - intel_psr_enable_source(intel_dp); > + intel_psr_enable_source(intel_dp, crtc_state); > intel_dp->psr.enabled = true; > intel_dp->psr.paused = false; > > @@ -1297,6 +1327,12 @@ static void intel_psr_disable_locked(struct > intel_dp *intel_dp) > if (IS_ALDERLAKE_P(dev_priv)) > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > CLKGATE_DIS_MISC_DMASC_GATING_DIS, > 0); > + > + /* Wa_16013835468:tgl[b0+], dg1 */ > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > STEP_FOREVER) || > + IS_DG1(dev_priv)) > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > + wa_16013835468_bit_get(intel_dp), > 0); > } > > intel_snps_phy_update_psr_power_state(dev_priv, phy, false); > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > index 87c92314ee269..1cd4056400b63 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6040,11 +6040,14 @@ > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > > -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > -#define ICL_DELAY_PMRSP REG_BIT(22) > -#define DISABLE_FLR_SRC REG_BIT(15) > -#define MASK_WAKEMEM REG_BIT(13) > +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) > +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) > +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) > +#define ICL_DELAY_PMRSP REG_BIT(22) > +#define DISABLE_FLR_SRC REG_BIT(15) > +#define MASK_WAKEMEM REG_BIT(13) > > #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) > #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) BR, Jouni Högander ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-15 12:31 ` Hogander, Jouni @ 2022-02-16 13:48 ` Souza, Jose 2022-02-18 13:12 ` Hogander, Jouni 0 siblings, 1 reply; 12+ messages in thread From: Souza, Jose @ 2022-02-16 13:48 UTC (permalink / raw) To: intel-gfx, Hogander, Jouni On Tue, 2022-02-15 at 12:31 +0000, Hogander, Jouni wrote: > On Thu, 2022-02-10 at 10:52 -0800, José Roberto de Souza wrote: > > PSR2 workaround required when mode has delayed vblank. > > > > BSpec: 52890 > > BSpec: 49421 > > Cc: Jouni Högander <jouni.hogander@intel.com> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_psr.c | 40 > > ++++++++++++++++++++++-- > > drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- > > 2 files changed, 46 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > b/drivers/gpu/drm/i915/display/intel_psr.c > > index 72bd8d3261e0c..2e0b092f4b6be 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct intel_dp > > *intel_dp) > > intel_dp->psr.active = true; > > } > > > > -static void intel_psr_enable_source(struct intel_dp *intel_dp) > > +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) > > +{ > > + switch (intel_dp->psr.pipe) { > > + case PIPE_A: > > + return LATENCY_REPORTING_REMOVED_PIPE_A; > > + case PIPE_B: > > + return LATENCY_REPORTING_REMOVED_PIPE_B; > > + case PIPE_C: > > + return LATENCY_REPORTING_REMOVED_PIPE_C; > > + default: > > + MISSING_CASE(intel_dp->psr.pipe); > > + return 0; > > + } > > +} > > + > > +static void intel_psr_enable_source(struct intel_dp *intel_dp, > > + const struct intel_crtc_state > > *crtc_state) > > { > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > > @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct > > intel_dp *intel_dp) > > if (IS_ALDERLAKE_P(dev_priv)) > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > > CLKGATE_DIS_MISC_DMASC_GATING_DIS) > > ; > > + > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > > STEP_FOREVER) || > > + IS_DG1(dev_priv)) { > > + u16 vtotal, vblank; > > + > > + vtotal = crtc_state- > > > uapi.adjusted_mode.crtc_vtotal - > > + crtc_state- > > > uapi.adjusted_mode.crtc_vdisplay; > > + vblank = crtc_state- > > > uapi.adjusted_mode.crtc_vblank_end - > > + crtc_state- > > > uapi.adjusted_mode.crtc_vblank_start; > > + if (vblank > vtotal) > > Can you please explain how this calculation indicates we are using > "delayed vblank"? Check the second box in Bspec 49265 > > Otherwise patch seems to be doing what is written in WA description. > > > + intel_de_rmw(dev_priv, > > GEN8_CHICKEN_DCPR_1, 0, > > + wa_16013835468_bit_get(int > > el_dp)); > > + } > > } > > } > > > > @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct > > intel_dp *intel_dp, > > intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state- > > > psr_vsc); > > intel_snps_phy_update_psr_power_state(dev_priv, phy, true); > > intel_psr_enable_sink(intel_dp); > > - intel_psr_enable_source(intel_dp); > > + intel_psr_enable_source(intel_dp, crtc_state); > > intel_dp->psr.enabled = true; > > intel_dp->psr.paused = false; > > > > @@ -1297,6 +1327,12 @@ static void intel_psr_disable_locked(struct > > intel_dp *intel_dp) > > if (IS_ALDERLAKE_P(dev_priv)) > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > > CLKGATE_DIS_MISC_DMASC_GATING_DIS, > > 0); > > + > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > > STEP_FOREVER) || > > + IS_DG1(dev_priv)) > > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > > + wa_16013835468_bit_get(intel_dp), > > 0); > > } > > > > intel_snps_phy_update_psr_power_state(dev_priv, phy, false); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index 87c92314ee269..1cd4056400b63 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6040,11 +6040,14 @@ > > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > > #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > > > > -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > -#define ICL_DELAY_PMRSP REG_BIT(22) > > -#define DISABLE_FLR_SRC REG_BIT(15) > > -#define MASK_WAKEMEM REG_BIT(13) > > +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) > > +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) > > +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) > > +#define ICL_DELAY_PMRSP REG_BIT(22) > > +#define DISABLE_FLR_SRC REG_BIT(15) > > +#define MASK_WAKEMEM REG_BIT(13) > > > > #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) > > #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) > > BR, > > Jouni Högander ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-16 13:48 ` Souza, Jose @ 2022-02-18 13:12 ` Hogander, Jouni 0 siblings, 0 replies; 12+ messages in thread From: Hogander, Jouni @ 2022-02-18 13:12 UTC (permalink / raw) To: intel-gfx, Souza, Jose On Wed, 2022-02-16 at 13:48 +0000, Souza, Jose wrote: > On Tue, 2022-02-15 at 12:31 +0000, Hogander, Jouni wrote: > > On Thu, 2022-02-10 at 10:52 -0800, José Roberto de Souza wrote: > > > PSR2 workaround required when mode has delayed vblank. > > > > > > BSpec: 52890 > > > BSpec: 49421 > > > Cc: Jouni Högander <jouni.hogander@intel.com> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_psr.c | 40 > > > ++++++++++++++++++++++-- > > > drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- > > > 2 files changed, 46 insertions(+), 7 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > > b/drivers/gpu/drm/i915/display/intel_psr.c > > > index 72bd8d3261e0c..2e0b092f4b6be 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > > @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct > > > intel_dp > > > *intel_dp) > > > intel_dp->psr.active = true; > > > } > > > > > > -static void intel_psr_enable_source(struct intel_dp *intel_dp) > > > +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) > > > +{ > > > + switch (intel_dp->psr.pipe) { > > > + case PIPE_A: > > > + return LATENCY_REPORTING_REMOVED_PIPE_A; > > > + case PIPE_B: > > > + return LATENCY_REPORTING_REMOVED_PIPE_B; > > > + case PIPE_C: > > > + return LATENCY_REPORTING_REMOVED_PIPE_C; > > > + default: > > > + MISSING_CASE(intel_dp->psr.pipe); > > > + return 0; > > > + } > > > +} > > > + > > > +static void intel_psr_enable_source(struct intel_dp *intel_dp, > > > + const struct intel_crtc_state > > > *crtc_state) > > > { > > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > > > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > > > @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct > > > intel_dp *intel_dp) > > > if (IS_ALDERLAKE_P(dev_priv)) > > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > > > CLKGATE_DIS_MISC_DMASC_GATING_ > > > DIS) > > > ; > > > + > > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > > > STEP_FOREVER) || > > > + IS_DG1(dev_priv)) { > > > + u16 vtotal, vblank; > > > + > > > + vtotal = crtc_state- > > > > uapi.adjusted_mode.crtc_vtotal - > > > + crtc_state- > > > > uapi.adjusted_mode.crtc_vdisplay; > > > + vblank = crtc_state- > > > > uapi.adjusted_mode.crtc_vblank_end - > > > + crtc_state- > > > > uapi.adjusted_mode.crtc_vblank_start; > > > + if (vblank > vtotal) > > > > Can you please explain how this calculation indicates we are using > > "delayed vblank"? > > Check the second box in Bspec 49265 Thank you for pointing this out. > > > > Otherwise patch seems to be doing what is written in WA > > description. > > > > > + intel_de_rmw(dev_priv, > > > GEN8_CHICKEN_DCPR_1, 0, > > > + wa_16013835468_bit_get > > > (int > > > el_dp)); > > > + } > > > } > > > } > > > > > > @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct > > > intel_dp *intel_dp, > > > intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state- > > > > psr_vsc); > > > intel_snps_phy_update_psr_power_state(dev_priv, phy, true); > > > intel_psr_enable_sink(intel_dp); > > > - intel_psr_enable_source(intel_dp); > > > + intel_psr_enable_source(intel_dp, crtc_state); > > > intel_dp->psr.enabled = true; > > > intel_dp->psr.paused = false; > > > > > > @@ -1297,6 +1327,12 @@ static void > > > intel_psr_disable_locked(struct > > > intel_dp *intel_dp) > > > if (IS_ALDERLAKE_P(dev_priv)) > > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > > > CLKGATE_DIS_MISC_DMASC_GATING_ > > > DIS, > > > 0); > > > + > > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, > > > STEP_FOREVER) || > > > + IS_DG1(dev_priv)) > > > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > > > + wa_16013835468_bit_get(intel_d > > > p), > > > 0); > > > } > > > > > > intel_snps_phy_update_psr_power_state(dev_priv, phy, > > > false); > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > > b/drivers/gpu/drm/i915/i915_reg.h > > > index 87c92314ee269..1cd4056400b63 100644 > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > @@ -6040,11 +6040,14 @@ > > > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > > > #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > > > > > > -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > > -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > > -#define ICL_DELAY_PMRSP REG_BIT(22) > > > -#define DISABLE_FLR_SRC REG_BIT(15) > > > -#define MASK_WAKEMEM REG_BIT(13) > > > +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > > +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > > +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) > > > +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) > > > +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) > > > +#define ICL_DELAY_PMRSP REG_BIT(22) > > > +#define DISABLE_FLR_SRC REG_BIT(15) > > > +#define MASK_WAKEMEM REG_BIT(13) > > > > > > #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) > > > #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) > > > > BR, > > > > Jouni Högander BR, Jouni Högander ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza 2022-02-15 12:31 ` Hogander, Jouni @ 2022-02-15 13:47 ` Lisovskiy, Stanislav 2022-02-16 13:45 ` Souza, Jose 1 sibling, 1 reply; 12+ messages in thread From: Lisovskiy, Stanislav @ 2022-02-15 13:47 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx On Thu, Feb 10, 2022 at 10:52:23AM -0800, José Roberto de Souza wrote: > PSR2 workaround required when mode has delayed vblank. > > BSpec: 52890 > BSpec: 49421 > Cc: Jouni Högander <jouni.hogander@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> I think we better implement it in a more generic way. BSpec 71580 formulates this workaround more precisely: " If any low power watermark is disabled because the package C state has too much latency for the size of Vblank and PSR1 or PSR2 is enabled, set the register bit for this pipe (listing below) to 1 to disable a PSR optimization to override to the maximum watermark. Clear the bit if the size of Vblank does not require low power watermarks to be disabled or PSR* is disabled." Pipe A 0x46430 bit 23 Pipe B 0x46430 bit 24 Pipe C 0x46430 bit 25 Pipe D 0x46430 bit 31 TRANS_SET_CONTEXT_LATENCY is used to delay the vblank" Almost we must ensure that one: Vblank time >= MAX(framestart delay + package C state latency + watermark 0 time + pipe scaler pre-fill time + DSC pre-fill time, PSR2 vblank time, SDP vblank time) Line time >= PSR2 line time I'm currently working on the latter one. I have suggestion that one I finish with calculations required for this formula, I can provide some api for this patch in order to check if PSR can be enabled and workaround has to be applied. Stan > --- > drivers/gpu/drm/i915/display/intel_psr.c | 40 ++++++++++++++++++++++-- > drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- > 2 files changed, 46 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 72bd8d3261e0c..2e0b092f4b6be 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct intel_dp *intel_dp) > intel_dp->psr.active = true; > } > > -static void intel_psr_enable_source(struct intel_dp *intel_dp) > +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) > +{ > + switch (intel_dp->psr.pipe) { > + case PIPE_A: > + return LATENCY_REPORTING_REMOVED_PIPE_A; > + case PIPE_B: > + return LATENCY_REPORTING_REMOVED_PIPE_B; > + case PIPE_C: > + return LATENCY_REPORTING_REMOVED_PIPE_C; > + default: > + MISSING_CASE(intel_dp->psr.pipe); > + return 0; > + } > +} > + > +static void intel_psr_enable_source(struct intel_dp *intel_dp, > + const struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp) > if (IS_ALDERLAKE_P(dev_priv)) > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > CLKGATE_DIS_MISC_DMASC_GATING_DIS); > + > + /* Wa_16013835468:tgl[b0+], dg1 */ > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || > + IS_DG1(dev_priv)) { > + u16 vtotal, vblank; > + > + vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal - > + crtc_state->uapi.adjusted_mode.crtc_vdisplay; > + vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end - > + crtc_state->uapi.adjusted_mode.crtc_vblank_start; > + if (vblank > vtotal) > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, > + wa_16013835468_bit_get(intel_dp)); > + } > } > } > > @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, > intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc); > intel_snps_phy_update_psr_power_state(dev_priv, phy, true); > intel_psr_enable_sink(intel_dp); > - intel_psr_enable_source(intel_dp); > + intel_psr_enable_source(intel_dp, crtc_state); > intel_dp->psr.enabled = true; > intel_dp->psr.paused = false; > > @@ -1297,6 +1327,12 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) > if (IS_ALDERLAKE_P(dev_priv)) > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0); > + > + /* Wa_16013835468:tgl[b0+], dg1 */ > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || > + IS_DG1(dev_priv)) > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > + wa_16013835468_bit_get(intel_dp), 0); > } > > intel_snps_phy_update_psr_power_state(dev_priv, phy, false); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 87c92314ee269..1cd4056400b63 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6040,11 +6040,14 @@ > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > > -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > -#define ICL_DELAY_PMRSP REG_BIT(22) > -#define DISABLE_FLR_SRC REG_BIT(15) > -#define MASK_WAKEMEM REG_BIT(13) > +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) > +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) > +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) > +#define ICL_DELAY_PMRSP REG_BIT(22) > +#define DISABLE_FLR_SRC REG_BIT(15) > +#define MASK_WAKEMEM REG_BIT(13) > > #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) > #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) > -- > 2.35.1 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 2022-02-15 13:47 ` Lisovskiy, Stanislav @ 2022-02-16 13:45 ` Souza, Jose 0 siblings, 0 replies; 12+ messages in thread From: Souza, Jose @ 2022-02-16 13:45 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx On Tue, 2022-02-15 at 15:47 +0200, Lisovskiy, Stanislav wrote: > On Thu, Feb 10, 2022 at 10:52:23AM -0800, José Roberto de Souza wrote: > > PSR2 workaround required when mode has delayed vblank. > > > > BSpec: 52890 > > BSpec: 49421 > > Cc: Jouni Högander <jouni.hogander@intel.com> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > I think we better implement it in a more generic way. > BSpec 71580 formulates this workaround more precisely: > > " > If any low power watermark is disabled because the package C state > has too much latency for the size of Vblank and PSR1 or PSR2 is enabled, > set the register bit for this pipe (listing below) to 1 to disable a > PSR optimization to override to the maximum watermark. > Clear the bit if the size of Vblank does not require low power watermarks to be disabled > or PSR* is disabled." This is a different workaround than the one implemented in this patch. The programming bits are the same but they have different "triggers" checks. > > > Pipe A 0x46430 bit 23 > > Pipe B 0x46430 bit 24 > > Pipe C 0x46430 bit 25 > > Pipe D 0x46430 bit 31 > > > TRANS_SET_CONTEXT_LATENCY is used to delay the vblank" > > > Almost we must ensure that one: > > Vblank time >= MAX(framestart delay + package C state latency + watermark 0 time + pipe scaler pre-fill time + DSC pre-fill time, > PSR2 vblank time, SDP vblank time) > > Line time >= PSR2 line time > > I'm currently working on the latter one. I have suggestion that one I finish > with calculations required for this formula, I can provide some api for this > patch in order to check if PSR can be enabled and workaround has to be applied. > > Stan > > > > --- > > drivers/gpu/drm/i915/display/intel_psr.c | 40 ++++++++++++++++++++++-- > > drivers/gpu/drm/i915/i915_reg.h | 13 +++++--- > > 2 files changed, 46 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > > index 72bd8d3261e0c..2e0b092f4b6be 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -1063,7 +1063,23 @@ static void intel_psr_activate(struct intel_dp *intel_dp) > > intel_dp->psr.active = true; > > } > > > > -static void intel_psr_enable_source(struct intel_dp *intel_dp) > > +static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) > > +{ > > + switch (intel_dp->psr.pipe) { > > + case PIPE_A: > > + return LATENCY_REPORTING_REMOVED_PIPE_A; > > + case PIPE_B: > > + return LATENCY_REPORTING_REMOVED_PIPE_B; > > + case PIPE_C: > > + return LATENCY_REPORTING_REMOVED_PIPE_C; > > + default: > > + MISSING_CASE(intel_dp->psr.pipe); > > + return 0; > > + } > > +} > > + > > +static void intel_psr_enable_source(struct intel_dp *intel_dp, > > + const struct intel_crtc_state *crtc_state) > > { > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > > @@ -1133,6 +1149,20 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp) > > if (IS_ALDERLAKE_P(dev_priv)) > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > > CLKGATE_DIS_MISC_DMASC_GATING_DIS); > > + > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || > > + IS_DG1(dev_priv)) { > > + u16 vtotal, vblank; > > + > > + vtotal = crtc_state->uapi.adjusted_mode.crtc_vtotal - > > + crtc_state->uapi.adjusted_mode.crtc_vdisplay; > > + vblank = crtc_state->uapi.adjusted_mode.crtc_vblank_end - > > + crtc_state->uapi.adjusted_mode.crtc_vblank_start; > > + if (vblank > vtotal) > > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, > > + wa_16013835468_bit_get(intel_dp)); > > + } > > } > > } > > > > @@ -1198,7 +1228,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, > > intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc); > > intel_snps_phy_update_psr_power_state(dev_priv, phy, true); > > intel_psr_enable_sink(intel_dp); > > - intel_psr_enable_source(intel_dp); > > + intel_psr_enable_source(intel_dp, crtc_state); > > intel_dp->psr.enabled = true; > > intel_dp->psr.paused = false; > > > > @@ -1297,6 +1327,12 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) > > if (IS_ALDERLAKE_P(dev_priv)) > > intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > > CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0); > > + > > + /* Wa_16013835468:tgl[b0+], dg1 */ > > + if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER) || > > + IS_DG1(dev_priv)) > > + intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > > + wa_16013835468_bit_get(intel_dp), 0); > > } > > > > intel_snps_phy_update_psr_power_state(dev_priv, phy, false); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 87c92314ee269..1cd4056400b63 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6040,11 +6040,14 @@ > > #define HSW_NDE_RSTWRN_OPT _MMIO(0x46408) > > #define RESET_PCH_HANDSHAKE_ENABLE (1 << 4) > > > > -#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > -#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > -#define ICL_DELAY_PMRSP REG_BIT(22) > > -#define DISABLE_FLR_SRC REG_BIT(15) > > -#define MASK_WAKEMEM REG_BIT(13) > > +#define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > > +#define SKL_SELECT_ALTERNATE_DC_EXIT REG_BIT(30) > > +#define LATENCY_REPORTING_REMOVED_PIPE_C REG_BIT(25) > > +#define LATENCY_REPORTING_REMOVED_PIPE_B REG_BIT(24) > > +#define LATENCY_REPORTING_REMOVED_PIPE_A REG_BIT(23) > > +#define ICL_DELAY_PMRSP REG_BIT(22) > > +#define DISABLE_FLR_SRC REG_BIT(15) > > +#define MASK_WAKEMEM REG_BIT(13) > > > > #define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434) > > #define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27) > > -- > > 2.35.1 > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza 2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza @ 2022-02-10 19:37 ` Patchwork 2022-02-10 20:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 4 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2022-02-10 19:37 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds URL : https://patchwork.freedesktop.org/series/99989/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza 2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza 2022-02-10 19:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds Patchwork @ 2022-02-10 20:05 ` Patchwork 2022-02-11 0:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2022-02-18 13:12 ` [Intel-gfx] [PATCH 1/2] " Hogander, Jouni 4 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2022-02-10 20:05 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 7536 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds URL : https://patchwork.freedesktop.org/series/99989/ State : success == Summary == CI Bug Log - changes from CI_DRM_11214 -> Patchwork_22245 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/index.html Participating hosts (48 -> 43) ------------------------------ Additional (3): fi-kbl-soraka fi-adl-ddr4 fi-pnv-d510 Missing (8): shard-tglu fi-hsw-4200u fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 shard-rkl shard-dg1 fi-bdw-samus Known issues ------------ Here are the changes found in Patchwork_22245 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_basic@semaphore: - fi-hsw-4770: NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#109315]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-hsw-4770/igt@amdgpu/amd_basic@semaphore.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-skl-6600u: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-skl-6600u/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +8 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-pnv-d510: NOTRUN -> [SKIP][4] ([fdo#109271]) +57 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@gem_lmem_swapping@parallel-random-engines.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#2291]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@hangcheck: - bat-dg1-6: [PASS][8] -> [DMESG-FAIL][9] ([i915#4494] / [i915#4957]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/bat-dg1-6/igt@i915_selftest@live@hangcheck.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/bat-dg1-6/igt@i915_selftest@live@hangcheck.html * igt@kms_chamelium@dp-edid-read: - fi-kbl-soraka: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@kms_chamelium@dp-edid-read.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html #### Possible fixes #### * igt@i915_selftest@live@hangcheck: - fi-hsw-4770: [INCOMPLETE][12] ([i915#4785]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@live@sanitycheck: - fi-skl-6600u: [SKIP][14] ([fdo#109271]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/fi-skl-6600u/igt@i915_selftest@live@sanitycheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-skl-6600u/igt@i915_selftest@live@sanitycheck.html * igt@i915_selftest@live@workarounds: - {bat-adlp-6}: [DMESG-WARN][16] ([i915#5068]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/bat-adlp-6/igt@i915_selftest@live@workarounds.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/bat-adlp-6/igt@i915_selftest@live@workarounds.html * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [DMESG-WARN][18] ([i915#4269]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#3138]: https://gitlab.freedesktop.org/drm/intel/issues/3138 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391 [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785 [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897 [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957 [i915#5068]: https://gitlab.freedesktop.org/drm/intel/issues/5068 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 Build changes ------------- * Linux: CI_DRM_11214 -> Patchwork_22245 CI-20190529: 20190529 CI_DRM_11214: b9ddf3cdcb94017765655d8d31adc1bb70b11046 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6342: 1bd167a3af9e8f6168ac89c64c64b929694d9be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_22245: a058007a273326fbfa765f7ef5d82614bda4e6fc @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a058007a2733 drm/i915/display: Implement Wa_16013835468 36b034e7b1f7 drm/i915/display: Group PSR2 prog sequences and workarounds == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/index.html [-- Attachment #2: Type: text/html, Size: 7933 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza ` (2 preceding siblings ...) 2022-02-10 20:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2022-02-11 0:04 ` Patchwork 2022-02-18 15:07 ` Souza, Jose 2022-02-18 13:12 ` [Intel-gfx] [PATCH 1/2] " Hogander, Jouni 4 siblings, 1 reply; 12+ messages in thread From: Patchwork @ 2022-02-11 0:04 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30309 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds URL : https://patchwork.freedesktop.org/series/99989/ State : success == Summary == CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22245_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_22245_full that come from known issues: ### CI changes ### #### Issues hit #### * boot: - shard-skl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20]) -> ([PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [FAIL][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42]) ([i915#5032]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl7/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl7/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl3/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl3/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl1/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl1/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/boot.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl3/boot.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/boot.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/boot.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/boot.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/boot.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html ### IGT changes ### #### Issues hit #### * igt@gem_eio@kms: - shard-tglb: [PASS][43] -> [FAIL][44] ([i915#232]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb7/igt@gem_eio@kms.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb1/igt@gem_eio@kms.html * igt@gem_exec_capture@pi@vecs0: - shard-skl: NOTRUN -> [INCOMPLETE][45] ([i915#4547]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@gem_exec_capture@pi@vecs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][46] ([i915#2842]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-iclb: [PASS][47] -> [FAIL][48] ([i915#2842]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb8/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [PASS][49] -> [FAIL][50] ([i915#2842]) +1 similar issue [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html * igt@gem_exec_schedule@submit-early-slice@vcs0: - shard-skl: NOTRUN -> [INCOMPLETE][51] ([i915#3797]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@gem_exec_schedule@submit-early-slice@vcs0.html * igt@gem_exec_whisper@basic-queues-priority: - shard-iclb: [PASS][52] -> [INCOMPLETE][53] ([i915#1895]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb1/igt@gem_exec_whisper@basic-queues-priority.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb7/igt@gem_exec_whisper@basic-queues-priority.html * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#2190]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@gem_huc_copy@huc-copy.html - shard-kbl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#2190]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@heavy-multi: - shard-kbl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#4613]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_lmem_swapping@heavy-random: - shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#4613]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@gem_lmem_swapping@heavy-random.html * igt@gem_lmem_swapping@random-engines: - shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#4613]) +1 similar issue [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@gem_lmem_swapping@random-engines.html * igt@gem_pread@exhaustion: - shard-tglb: NOTRUN -> [WARN][59] ([i915#2658]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@gem_pread@exhaustion.html * igt@gem_userptr_blits@vma-merge: - shard-skl: NOTRUN -> [FAIL][60] ([i915#3318]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@gem_userptr_blits@vma-merge.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip: - shard-skl: NOTRUN -> [FAIL][61] ([i915#3743]) +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglb: NOTRUN -> [SKIP][62] ([fdo#111615]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-apl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#3777]) +2 similar issues [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-kbl: NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#3777]) +2 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-skl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#3777]) +4 similar issues [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-kbl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#3886]) +3 similar issues [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html - shard-apl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#3886]) +3 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc: - shard-skl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#3886]) +8 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][69] ([fdo#109271]) +81 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_chamelium@dp-hpd-enable-disable-mode: - shard-tglb: NOTRUN -> [SKIP][70] ([fdo#109284] / [fdo#111827]) +1 similar issue [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_chamelium@dp-hpd-enable-disable-mode.html * igt@kms_chamelium@hdmi-hpd-for-each-pipe: - shard-kbl: NOTRUN -> [SKIP][71] ([fdo#109271] / [fdo#111827]) +5 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html * igt@kms_chamelium@vga-hpd-after-suspend: - shard-skl: NOTRUN -> [SKIP][72] ([fdo#109271] / [fdo#111827]) +16 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_chamelium@vga-hpd-after-suspend.html * igt@kms_color_chamelium@pipe-a-ctm-0-5: - shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [fdo#111827]) +6 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_color_chamelium@pipe-a-ctm-0-5.html * igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement: - shard-iclb: NOTRUN -> [SKIP][74] ([fdo#109278]) +1 similar issue [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-skl: [PASS][75] -> [DMESG-WARN][76] ([i915#1982]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions: - shard-tglb: NOTRUN -> [SKIP][77] ([fdo#109274] / [fdo#111825]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [PASS][78] -> [FAIL][79] ([i915#2346]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1: - shard-glk: [PASS][80] -> [FAIL][81] ([i915#407]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk6/igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk9/igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-apl: [PASS][82] -> [DMESG-WARN][83] ([i915#180]) +4 similar issues [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl8/igt@kms_flip@flip-vs-suspend@a-dp1.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl6/igt@kms_flip@flip-vs-suspend@a-dp1.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-kbl: NOTRUN -> [INCOMPLETE][84] ([i915#636]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt: - shard-tglb: NOTRUN -> [SKIP][85] ([fdo#109280] / [fdo#111825]) +2 similar issues [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff: - shard-skl: NOTRUN -> [SKIP][86] ([fdo#109271]) +182 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html * igt@kms_hdr@static-toggle-suspend: - shard-tglb: NOTRUN -> [SKIP][87] ([i915#1187]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_hdr@static-toggle-suspend.html * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: - shard-apl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#533]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][89] -> [DMESG-WARN][90] ([i915#180]) +6 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d: - shard-skl: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533]) +2 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: - shard-apl: NOTRUN -> [FAIL][92] ([fdo#108145] / [i915#265]) [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: - shard-skl: NOTRUN -> [FAIL][93] ([fdo#108145] / [i915#265]) +3 similar issues [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb: - shard-skl: NOTRUN -> [FAIL][94] ([i915#265]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-kbl: NOTRUN -> [FAIL][95] ([fdo#108145] / [i915#265]) +2 similar issues [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping: - shard-apl: NOTRUN -> [SKIP][96] ([fdo#109271] / [i915#2733]) [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html - shard-kbl: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2733]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: - shard-apl: NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#658]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html * igt@kms_psr2_su@page_flip-nv12: - shard-skl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#658]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [PASS][100] -> [SKIP][101] ([fdo#109441]) +1 similar issue [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_sysfs_edid_timing: - shard-apl: NOTRUN -> [FAIL][102] ([IGT#2]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_sysfs_edid_timing.html - shard-kbl: NOTRUN -> [FAIL][103] ([IGT#2]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_sysfs_edid_timing.html * igt@kms_vblank@pipe-d-wait-forked-hang: - shard-apl: NOTRUN -> [SKIP][104] ([fdo#109271]) +71 similar issues [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_vblank@pipe-d-wait-forked-hang.html * igt@kms_writeback@writeback-invalid-parameters: - shard-kbl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2437]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_writeback@writeback-invalid-parameters.html * igt@kms_writeback@writeback-pixel-formats: - shard-skl: NOTRUN -> [SKIP][106] ([fdo#109271] / [i915#2437]) +1 similar issue [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@kms_writeback@writeback-pixel-formats.html * igt@nouveau_crc@ctx-flip-threshold-reset-after-capture: - shard-iclb: NOTRUN -> [SKIP][107] ([i915#2530]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@nouveau_crc@ctx-flip-threshold-reset-after-capture.html * igt@nouveau_crc@pipe-a-source-outp-inactive: - shard-tglb: NOTRUN -> [SKIP][108] ([i915#2530]) +1 similar issue [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@nouveau_crc@pipe-a-source-outp-inactive.html * igt@perf@gen8-unprivileged-single-ctx-counters: - shard-tglb: NOTRUN -> [SKIP][109] ([fdo#109289]) [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@perf@gen8-unprivileged-single-ctx-counters.html * igt@prime_nv_api@i915_nv_import_twice: - shard-tglb: NOTRUN -> [SKIP][110] ([fdo#109291]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb3/igt@prime_nv_api@i915_nv_import_twice.html * igt@sysfs_clients@create: - shard-apl: NOTRUN -> [SKIP][111] ([fdo#109271] / [i915#2994]) [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@sysfs_clients@create.html - shard-kbl: NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#2994]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@sysfs_clients@create.html * igt@sysfs_clients@fair-1: - shard-skl: NOTRUN -> [SKIP][113] ([fdo#109271] / [i915#2994]) +1 similar issue [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@sysfs_clients@fair-1.html #### Possible fixes #### * igt@feature_discovery@psr2: - shard-iclb: [SKIP][114] ([i915#658]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb5/igt@feature_discovery@psr2.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@feature_discovery@psr2.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [FAIL][116] ([i915#2842]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html - shard-tglb: [FAIL][118] ([i915#2842]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb5/igt@gem_exec_fair@basic-none-share@rcs0.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb5/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [FAIL][120] ([i915#2842]) -> [PASS][121] +1 similar issue [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: [FAIL][122] ([i915#2842]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - {shard-tglu}: [FAIL][124] ([i915#2842]) -> [PASS][125] [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglu-1/igt@gem_exec_fair@basic-pace-share@rcs0.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglu-4/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_whisper@basic-contexts-priority-all: - shard-glk: [DMESG-WARN][126] ([i915#118]) -> [PASS][127] [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk2/igt@gem_exec_whisper@basic-contexts-priority-all.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk5/igt@gem_exec_whisper@basic-contexts-priority-all.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][128] ([i915#2190]) -> [PASS][129] [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb6/igt@gem_huc_copy@huc-copy.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb8/igt@gem_huc_copy@huc-copy.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [DMESG-WARN][130] ([i915#180]) -> [PASS][131] +2 similar issues [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-kbl: [INCOMPLETE][132] ([i915#180] / [i915#636]) -> [PASS][133] [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@flip-vs-expired-vblank@b-edp1: - shard-skl: [FAIL][134] ([i915#79]) -> [PASS][135] [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1: - shard-glk: [FAIL][136] ([i915#79]) -> [PASS][137] [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk1/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [DMESG-WARN][138] ([i915#180]) -> [PASS][139] +2 similar issues [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][140] ([i915#1188]) -> [PASS][141] [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_psr@psr2_sprite_mmap_cpu: - shard-iclb: [SKIP][142] ([fdo#109441]) -> [PASS][143] [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html #### Warnings #### * igt@gem_exec_balancer@parallel-contexts: - shard-iclb: [SKIP][144] ([i915#4525]) -> [DMESG-WARN][145] ([i915#5076]) [144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb5/igt@gem_exec_balancer@parallel-contexts.html [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@gem_exec_balancer@parallel-contexts.html * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: [SKIP][146] ([i915#4525]) -> [DMESG-FAIL][147] ([i915#5076]) [146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-iclb: [WARN][148] ([i915#2684]) -> [WARN][149] ([i915#1804] / [i915#2684]) [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb3/igt@i915_pm_rc6_residency@rc6-fence.html * igt@kms_color@pipe-d-ctm-negative: - shard-glk: [SKIP][150] ([fdo#109271] / [i915#1888]) -> [SKIP][151] ([fdo#109271]) [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk4/igt@kms_color@pipe-d-ctm-negative.html [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk1/igt@kms_color@pipe-d-ctm-negative.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area: - shard-iclb: [SKIP][152] ([fdo#111068] / [i915#658]) -> [SKIP][153] ([i915#2920]) [152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html * igt@runner@aborted: - shard-kbl: ([FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161], [FAIL][162], [FAIL][163], [FAIL][164], [FAIL][165], [FAIL][166]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602] / [i915#92]) -> ([FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170], [FAIL][171], [FAIL][172], [FAIL][173], [FAIL][174], [FAIL][175], [FAIL][176], [FAIL][177], [FAIL][178], [FAIL][179]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@runner@aborted.html [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@runner@aborted.html [156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl3/igt@runner@aborted.html [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@runner@aborted.html [158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@runner@aborted.html [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html [160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl4/igt@runner@aborted.html [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html [162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/index.html [-- Attachment #2: Type: text/html, Size: 33562 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds 2022-02-11 0:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork @ 2022-02-18 15:07 ` Souza, Jose 0 siblings, 0 replies; 12+ messages in thread From: Souza, Jose @ 2022-02-18 15:07 UTC (permalink / raw) To: intel-gfx [-- Attachment #1: Type: text/plain, Size: 27777 bytes --] On Fri, 2022-02-11 at 00:04 +0000, Patchwork wrote: Patch Details Series: series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds URL: https://patchwork.freedesktop.org/series/99989/ State: success Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/index.html CI Bug Log - changes from CI_DRM_11214_full -> Patchwork_22245_full Summary SUCCESS No regressions found. pushed to drm-intel-next, thanks for the review Jouni. Participating hosts (11 -> 11) No changes in participating hosts Known issues Here are the changes found in Patchwork_22245_full that come from known issues: CI changes Issues hit * boot: * shard-skl: (PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl7/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl7/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl4/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl3/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl3/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl1/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl1/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/boot.html>) -> (PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl7/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl6/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl3/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/boot.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html>, PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl10/boot.html>) ([i915#5032]) IGT changes Issues hit * igt@gem_eio@kms: * shard-tglb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb7/igt@gem_eio@kms.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb1/igt@gem_eio@kms.html> ([i915#232]) * igt@gem_exec_capture@pi@vecs0: * shard-skl: NOTRUN -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@gem_exec_capture@pi@vecs0.html> ([i915#4547]) * igt@gem_exec_fair@basic-none@vcs1: * shard-iclb: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@gem_exec_fair@basic-none@vcs1.html> ([i915#2842]) * igt@gem_exec_fair@basic-pace@rcs0: * shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb8/igt@gem_exec_fair@basic-pace@rcs0.html> ([i915#2842]) * igt@gem_exec_fair@basic-pace@vcs1: * shard-kbl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html> ([i915#2842]) +1 similar issue * igt@gem_exec_schedule@submit-early-slice@vcs0: * shard-skl: NOTRUN -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@gem_exec_schedule@submit-early-slice@vcs0.html> ([i915#3797]) * igt@gem_exec_whisper@basic-queues-priority: * shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb1/igt@gem_exec_whisper@basic-queues-priority.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb7/igt@gem_exec_whisper@basic-queues-priority.html> ([i915#1895]) * igt@gem_huc_copy@huc-copy: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@gem_huc_copy@huc-copy.html> ([fdo#109271] / [i915#2190]) * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@gem_huc_copy@huc-copy.html> ([fdo#109271] / [i915#2190]) * igt@gem_lmem_swapping@heavy-multi: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@gem_lmem_swapping@heavy-multi.html> ([fdo#109271] / [i915#4613]) * igt@gem_lmem_swapping@heavy-random: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@gem_lmem_swapping@heavy-random.html> ([fdo#109271] / [i915#4613]) * igt@gem_lmem_swapping@random-engines: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@gem_lmem_swapping@random-engines.html> ([fdo#109271] / [i915#4613]) +1 similar issue * igt@gem_pread@exhaustion: * shard-tglb: NOTRUN -> WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@gem_pread@exhaustion.html> ([i915#2658]) * igt@gem_userptr_blits@vma-merge: * shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@gem_userptr_blits@vma-merge.html> ([i915#3318]) * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip: * shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html> ([i915#3743]) +1 similar issue * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html> ([fdo#111615]) * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html> ([fdo#109271] / [i915#3777]) +2 similar issues * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html> ([fdo#109271] / [i915#3777]) +2 similar issues * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html> ([fdo#109271] / [i915#3777]) +4 similar issues * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html> ([fdo#109271] / [i915#3886]) +3 similar issues * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html> ([fdo#109271] / [i915#3886]) +3 similar issues * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html> ([fdo#109271] / [i915#3886]) +8 similar issues * igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs.html> ([fdo#109271]) +81 similar issues * igt@kms_chamelium@dp-hpd-enable-disable-mode: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_chamelium@dp-hpd-enable-disable-mode.html> ([fdo#109284] / [fdo#111827]) +1 similar issue * igt@kms_chamelium@hdmi-hpd-for-each-pipe: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html> ([fdo#109271] / [fdo#111827]) +5 similar issues * igt@kms_chamelium@vga-hpd-after-suspend: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_chamelium@vga-hpd-after-suspend.html> ([fdo#109271] / [fdo#111827]) +16 similar issues * igt@kms_color_chamelium@pipe-a-ctm-0-5: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_color_chamelium@pipe-a-ctm-0-5.html> ([fdo#109271] / [fdo#111827]) +6 similar issues * igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement: * shard-iclb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement.html> ([fdo#109278]) +1 similar issue * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: * shard-skl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl8/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html> ([i915#1982]) * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html> ([fdo#109274] / [fdo#111825]) * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: * shard-skl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html> ([i915#2346]) * igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1: * shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk6/igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk9/igt@kms_flip@dpms-vs-vblank-race@b-hdmi-a1.html> ([i915#407]) * igt@kms_flip@flip-vs-suspend@a-dp1: * shard-apl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl8/igt@kms_flip@flip-vs-suspend@a-dp1.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl6/igt@kms_flip@flip-vs-suspend@a-dp1.html> ([i915#180]) +4 similar issues * igt@kms_flip@flip-vs-suspend@c-dp1: * shard-kbl: NOTRUN -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html> ([i915#636]) * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html> ([fdo#109280] / [fdo#111825]) +2 similar issues * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html> ([fdo#109271]) +182 similar issues * igt@kms_hdr@static-toggle-suspend: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@kms_hdr@static-toggle-suspend.html> ([i915#1187]) * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html> ([fdo#109271] / [i915#533]) * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: * shard-kbl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> ([i915#180]) +6 similar issues * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html> ([fdo#109271] / [i915#533]) +2 similar issues * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: * shard-apl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html> ([fdo#108145] / [i915#265]) * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: * shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html> ([fdo#108145] / [i915#265]) +3 similar issues * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb: * shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html> ([i915#265]) * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: * shard-kbl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html> ([fdo#108145] / [i915#265]) +2 similar issues * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html> ([fdo#109271] / [i915#2733]) * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html> ([fdo#109271] / [i915#2733]) * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html> ([fdo#109271] / [i915#658]) * igt@kms_psr2_su@page_flip-nv12: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@kms_psr2_su@page_flip-nv12.html> ([fdo#109271] / [i915#658]) * igt@kms_psr@psr2_primary_mmap_cpu: * shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html> -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html> ([fdo#109441]) +1 similar issue * igt@kms_sysfs_edid_timing: * shard-apl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_sysfs_edid_timing.html> ([IGT#2]) * shard-kbl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_sysfs_edid_timing.html> ([IGT#2]) * igt@kms_vblank@pipe-d-wait-forked-hang: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@kms_vblank@pipe-d-wait-forked-hang.html> ([fdo#109271]) +71 similar issues * igt@kms_writeback@writeback-invalid-parameters: * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl6/igt@kms_writeback@writeback-invalid-parameters.html> ([fdo#109271] / [i915#2437]) * igt@kms_writeback@writeback-pixel-formats: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl4/igt@kms_writeback@writeback-pixel-formats.html> ([fdo#109271] / [i915#2437]) +1 similar issue * igt@nouveau_crc@ctx-flip-threshold-reset-after-capture: * shard-iclb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@nouveau_crc@ctx-flip-threshold-reset-after-capture.html> ([i915#2530]) * igt@nouveau_crc@pipe-a-source-outp-inactive: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@nouveau_crc@pipe-a-source-outp-inactive.html> ([i915#2530]) +1 similar issue * igt@perf@gen8-unprivileged-single-ctx-counters: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb6/igt@perf@gen8-unprivileged-single-ctx-counters.html> ([fdo#109289]) * igt@prime_nv_api@i915_nv_import_twice: * shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb3/igt@prime_nv_api@i915_nv_import_twice.html> ([fdo#109291]) * igt@sysfs_clients@create: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl3/igt@sysfs_clients@create.html> ([fdo#109271] / [i915#2994]) * shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@sysfs_clients@create.html> ([fdo#109271] / [i915#2994]) * igt@sysfs_clients@fair-1: * shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl2/igt@sysfs_clients@fair-1.html> ([fdo#109271] / [i915#2994]) +1 similar issue Possible fixes * igt@feature_discovery@psr2: * shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb5/igt@feature_discovery@psr2.html> ([i915#658]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@feature_discovery@psr2.html> * igt@gem_exec_fair@basic-none-share@rcs0: * shard-iclb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html> * shard-tglb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb5/igt@gem_exec_fair@basic-none-share@rcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb5/igt@gem_exec_fair@basic-none-share@rcs0.html> * igt@gem_exec_fair@basic-none@vcs0: * shard-kbl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html> +1 similar issue * igt@gem_exec_fair@basic-none@vecs0: * shard-apl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html> * igt@gem_exec_fair@basic-pace-share@rcs0: * {shard-tglu}: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglu-1/igt@gem_exec_fair@basic-pace-share@rcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglu-4/igt@gem_exec_fair@basic-pace-share@rcs0.html> * igt@gem_exec_whisper@basic-contexts-priority-all: * shard-glk: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk2/igt@gem_exec_whisper@basic-contexts-priority-all.html> ([i915#118]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk5/igt@gem_exec_whisper@basic-contexts-priority-all.html> * igt@gem_huc_copy@huc-copy: * shard-tglb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-tglb6/igt@gem_huc_copy@huc-copy.html> ([i915#2190]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-tglb8/igt@gem_huc_copy@huc-copy.html> * igt@i915_suspend@fence-restore-tiled2untiled: * shard-apl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html> ([i915#180]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html> +2 similar issues * igt@kms_fbcon_fbt@fbc-suspend: * shard-kbl: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html> ([i915#180] / [i915#636]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html> * igt@kms_flip@flip-vs-expired-vblank@b-edp1: * shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html> ([i915#79]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html> * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1: * shard-glk: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk1/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html> ([i915#79]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html> * igt@kms_frontbuffer_tracking@fbc-suspend: * shard-kbl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html> ([i915#180]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html> +2 similar issues * igt@kms_hdr@bpc-switch-dpms: * shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html> ([i915#1188]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html> * igt@kms_psr@psr2_sprite_mmap_cpu: * shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_cpu.html> ([fdo#109441]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html> Warnings * igt@gem_exec_balancer@parallel-contexts: * shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb5/igt@gem_exec_balancer@parallel-contexts.html> ([i915#4525]) -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@gem_exec_balancer@parallel-contexts.html> ([i915#5076]) * igt@gem_exec_balancer@parallel-ordering: * shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html> ([i915#4525]) -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html> ([i915#5076]) * igt@i915_pm_rc6_residency@rc6-fence: * shard-iclb: WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html> ([i915#2684]) -> WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb3/igt@i915_pm_rc6_residency@rc6-fence.html> ([i915#1804] / [i915#2684]) * igt@kms_color@pipe-d-ctm-negative: * shard-glk: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-glk4/igt@kms_color@pipe-d-ctm-negative.html> ([fdo#109271] / [i915#1888]) -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-glk1/igt@kms_color@pipe-d-ctm-negative.html> ([fdo#109271]) * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area: * shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html> ([fdo#111068] / [i915#658]) -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22245/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html> ([i915#2920]) * igt@runner@aborted: * shard-kbl: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl4/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11214/shard-kbl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11>, [FAIL][164], [FAIL][165], [FAIL][166]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602] / [i915#92]) -> ([FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170], [FAIL][171], [FAIL][172], [FAIL][173], [FAIL][174], [FAIL][175], [FAIL][176], [FAIL][177], [FAIL][178], [FAIL][179]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312]) [-- Attachment #2: Type: text/html, Size: 33399 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza ` (3 preceding siblings ...) 2022-02-11 0:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork @ 2022-02-18 13:12 ` Hogander, Jouni 4 siblings, 0 replies; 12+ messages in thread From: Hogander, Jouni @ 2022-02-18 13:12 UTC (permalink / raw) To: intel-gfx, Souza, Jose Reviewed-by: Jouni Högander <jouni.hogander@intel.com> for both patches. On Thu, 2022-02-10 at 10:52 -0800, José Roberto de Souza wrote: > Grouping inside of the same if all the programing sequences and > workarounds of PSR2. > The order of programing changed in intel_psr_enable_source() but > it will not affect PSR2 as at this point PSR2_ENABLE is still > disabled. > > Cc: Jouni Högander <jouni.hogander@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 77 ++++++++++++-------- > ---- > 1 file changed, 37 insertions(+), 40 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index a1a663f362e7d..72bd8d3261e0c 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1069,25 +1069,6 @@ static void intel_psr_enable_source(struct > intel_dp *intel_dp) > enum transcoder cpu_transcoder = intel_dp->psr.transcoder; > u32 mask; > > - if (intel_dp->psr.psr2_enabled && DISPLAY_VER(dev_priv) == 9) { > - i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder); > - u32 chicken = intel_de_read(dev_priv, reg); > - > - chicken |= PSR2_VSC_ENABLE_PROG_HEADER | > - PSR2_ADD_VERTICAL_LINE_COUNT; > - intel_de_write(dev_priv, reg, chicken); > - } > - > - /* > - * Wa_16014451276:adlp > - * All supported adlp panels have 1-based X granularity, this > may > - * cause issues if non-supported panels are used. > - */ > - if (IS_ALDERLAKE_P(dev_priv) && > - intel_dp->psr.psr2_enabled) > - intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), > 0, > - ADLP_1_BASED_X_GRANULARITY); > - > /* > * Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD > also > * mask LPSP to avoid dependency on other drivers that might > block > @@ -1126,18 +1107,33 @@ static void intel_psr_enable_source(struct > intel_dp *intel_dp) > intel_dp->psr.psr2_sel_fetch_enabled ? > IGNORE_PSR2_HW_TRACKING : 0); > > - /* Wa_16011168373:adl-p */ > - if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) && > - intel_dp->psr.psr2_enabled) > - intel_de_rmw(dev_priv, > - TRANS_SET_CONTEXT_LATENCY(intel_dp- > >psr.transcoder), > - TRANS_SET_CONTEXT_LATENCY_MASK, > - TRANS_SET_CONTEXT_LATENCY_VALUE(1)); > + if (intel_dp->psr.psr2_enabled) { > + if (DISPLAY_VER(dev_priv) == 9) > + intel_de_rmw(dev_priv, > CHICKEN_TRANS(cpu_transcoder), 0, > + PSR2_VSC_ENABLE_PROG_HEADER | > + PSR2_ADD_VERTICAL_LINE_COUNT); > > - /* Wa_16012604467:adlp */ > - if (IS_ALDERLAKE_P(dev_priv) && intel_dp->psr.psr2_enabled) > - intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > - CLKGATE_DIS_MISC_DMASC_GATING_DIS); > + /* > + * Wa_16014451276:adlp > + * All supported adlp panels have 1-based X > granularity, this may > + * cause issues if non-supported panels are used. > + */ > + if (IS_ALDERLAKE_P(dev_priv)) > + intel_de_rmw(dev_priv, > CHICKEN_TRANS(cpu_transcoder), 0, > + ADLP_1_BASED_X_GRANULARITY); > + > + /* Wa_16011168373:adl-p */ > + if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) > + intel_de_rmw(dev_priv, > + TRANS_SET_CONTEXT_LATENCY(intel_dp > ->psr.transcoder), > + TRANS_SET_CONTEXT_LATENCY_MASK, > + TRANS_SET_CONTEXT_LATENCY_VALUE(1) > ); > + > + /* Wa_16012604467:adlp */ > + if (IS_ALDERLAKE_P(dev_priv)) > + intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, > + CLKGATE_DIS_MISC_DMASC_GATING_DIS) > ; > + } > } > > static bool psr_interrupt_error_check(struct intel_dp *intel_dp) > @@ -1290,17 +1286,18 @@ static void intel_psr_disable_locked(struct > intel_dp *intel_dp) > intel_de_rmw(dev_priv, CHICKEN_PAR1_1, > DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0); > > - /* Wa_16011168373:adl-p */ > - if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) && > - intel_dp->psr.psr2_enabled) > - intel_de_rmw(dev_priv, > - TRANS_SET_CONTEXT_LATENCY(intel_dp- > >psr.transcoder), > - TRANS_SET_CONTEXT_LATENCY_MASK, 0); > + if (intel_dp->psr.psr2_enabled) { > + /* Wa_16011168373:adl-p */ > + if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) > + intel_de_rmw(dev_priv, > + TRANS_SET_CONTEXT_LATENCY(intel_dp > ->psr.transcoder), > + TRANS_SET_CONTEXT_LATENCY_MASK, > 0); > > - /* Wa_16012604467:adlp */ > - if (IS_ALDERLAKE_P(dev_priv) && intel_dp->psr.psr2_enabled) > - intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > - CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0); > + /* Wa_16012604467:adlp */ > + if (IS_ALDERLAKE_P(dev_priv)) > + intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, > + CLKGATE_DIS_MISC_DMASC_GATING_DIS, > 0); > + } > > intel_snps_phy_update_psr_power_state(dev_priv, phy, false); > BR, Jouni Högander ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-02-18 15:07 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-02-10 18:52 [Intel-gfx] [PATCH 1/2] drm/i915/display: Group PSR2 prog sequences and workarounds José Roberto de Souza 2022-02-10 18:52 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Implement Wa_16013835468 José Roberto de Souza 2022-02-15 12:31 ` Hogander, Jouni 2022-02-16 13:48 ` Souza, Jose 2022-02-18 13:12 ` Hogander, Jouni 2022-02-15 13:47 ` Lisovskiy, Stanislav 2022-02-16 13:45 ` Souza, Jose 2022-02-10 19:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/display: Group PSR2 prog sequences and workarounds Patchwork 2022-02-10 20:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-02-11 0:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2022-02-18 15:07 ` Souza, Jose 2022-02-18 13:12 ` [Intel-gfx] [PATCH 1/2] " Hogander, Jouni
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