From: Like Xu <like.xu.linux@gmail.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: kan.liang@linux.intel.com, wei.w.wang@intel.com,
seanjc@google.com, pbonzini@redhat.com, jmattson@google.com,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL for guest Arch LBR
Date: Thu, 22 Dec 2022 19:09:45 +0800 [thread overview]
Message-ID: <8f0fec41-d302-b261-ce5a-83692f1238b6@gmail.com> (raw)
In-Reply-To: <20221125040604.5051-7-weijiang.yang@intel.com>
On 25/11/2022 12:05 pm, Yang Weijiang wrote:
> static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> {
> struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> @@ -377,6 +402,14 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_ARCH_LBR_DEPTH:
> msr_info->data = lbr_desc->records.nr;
> return 0;
> + case MSR_ARCH_LBR_CTL:
> + if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR)) {
> + WARN_ON_ONCE(!msr_info->host_initiated);
Why we need this warning even in the format of WARN_ON_ONCE() ?
And why not for MSR_ARCH_LBR_DEPTH msr ?
> + msr_info->data = 0;
> + } else {
> + msr_info->data = vmcs_read64(GUEST_IA32_LBR_CTL);
> + }
> + return 0;
next prev parent reply other threads:[~2022-12-22 11:10 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-25 4:05 [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2022-11-25 4:05 ` [PATCH v2 01/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-12-22 10:57 ` Like Xu
2022-12-22 13:29 ` Peter Zijlstra
2022-12-22 17:41 ` Sean Christopherson
2022-12-23 2:12 ` Like Xu
2022-12-27 11:58 ` [tip: perf/core] " tip-bot2 for Like Xu
2022-11-25 4:05 ` [PATCH v2 02/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-11-25 4:05 ` [PATCH v2 03/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2023-01-26 19:50 ` Sean Christopherson
2023-01-30 6:33 ` Yang, Weijiang
2022-11-25 4:05 ` [PATCH v2 04/15] KVM: PMU: disable LBR handling if architectural LBR is available Yang Weijiang
2023-01-27 20:10 ` Sean Christopherson
2023-01-30 8:10 ` Yang, Weijiang
2022-11-25 4:05 ` [PATCH v2 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-12-22 11:00 ` Like Xu
2022-12-25 4:30 ` Yang, Weijiang
2022-12-22 11:15 ` Like Xu
2023-01-27 20:25 ` Sean Christopherson
2023-01-30 11:46 ` Yang, Weijiang
2022-11-25 4:05 ` [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-12-22 11:09 ` Like Xu [this message]
2022-12-25 4:27 ` Yang, Weijiang
2022-12-22 11:19 ` Like Xu
2022-12-25 4:16 ` Yang, Weijiang
2022-12-22 11:24 ` Like Xu
2022-12-25 4:08 ` Yang, Weijiang
2023-01-27 21:42 ` Sean Christopherson
2022-11-25 4:05 ` [PATCH v2 07/15] KVM: VMX: Support passthrough of architectural LBRs Yang Weijiang
2022-11-25 4:05 ` [PATCH v2 08/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2023-01-27 21:43 ` Sean Christopherson
2023-01-30 12:27 ` Yang, Weijiang
2022-11-25 4:05 ` [PATCH v2 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2023-01-27 21:46 ` Sean Christopherson
2023-01-30 12:37 ` Yang, Weijiang
2022-11-25 4:05 ` [PATCH v2 10/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-12-22 11:06 ` Like Xu
2022-12-25 4:28 ` Yang, Weijiang
2023-01-27 22:04 ` Sean Christopherson
2022-11-25 4:06 ` [PATCH v2 11/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2023-01-27 22:07 ` Sean Christopherson
2023-01-30 13:13 ` Yang, Weijiang
2022-11-25 4:06 ` [PATCH v2 12/15] KVM: x86/vmx: Disable Arch LBREn bit in #DB and warm reset Yang Weijiang
2022-12-22 11:22 ` Like Xu
2022-12-25 4:12 ` Yang, Weijiang
2023-01-27 22:09 ` Sean Christopherson
2023-01-30 13:09 ` Yang, Weijiang
2022-11-25 4:06 ` [PATCH v2 13/15] KVM: x86/vmx: Save/Restore guest Arch LBR Ctrl msr at SMM entry/exit Yang Weijiang
2023-01-27 22:11 ` Sean Christopherson
2023-01-30 12:50 ` Yang, Weijiang
2022-11-25 4:06 ` [PATCH v2 14/15] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2023-01-27 22:13 ` Sean Christopherson
2023-01-30 12:46 ` Yang, Weijiang
2023-01-30 17:30 ` Sean Christopherson
2023-01-31 13:14 ` Yang, Weijiang
2023-01-31 16:05 ` Sean Christopherson
2022-11-25 4:06 ` [PATCH v2 15/15] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-12-22 11:03 ` Like Xu
2022-12-25 4:31 ` Yang, Weijiang
2023-01-27 22:15 ` Sean Christopherson
2023-01-12 1:57 ` [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang, Weijiang
2023-01-27 22:46 ` Sean Christopherson
2023-01-30 13:38 ` Yang, Weijiang
2023-06-05 9:50 ` Like Xu
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