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From: "Yang, Weijiang" <weijiang.yang@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: <pbonzini@redhat.com>, <jmattson@google.com>,
	<kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<like.xu.linux@gmail.com>, <kan.liang@linux.intel.com>,
	<wei.w.wang@intel.com>
Subject: Re: [PATCH v2 13/15] KVM: x86/vmx: Save/Restore guest Arch LBR Ctrl msr at SMM entry/exit
Date: Mon, 30 Jan 2023 20:50:48 +0800	[thread overview]
Message-ID: <a3cd4e64-aeb6-b0fb-36cb-ad16a6e8b1d7@intel.com> (raw)
In-Reply-To: <Y9RMASMnzc3tPqvO@google.com>


On 1/28/2023 6:11 AM, Sean Christopherson wrote:
> On Thu, Nov 24, 2022, Yang Weijiang wrote:
>> Per SDM 3B Chapter 18: "IA32_LBR_CTL.LBREn is saved and cleared on #SMI,
>> and restored on RSM", store guest IA32_LBR_CTL in SMRAM and clear LBREn
>> in VMCS at SMM entry, and do reverse things at SMM exit.

[...]


>> @@ -8006,11 +8006,21 @@ static int vmx_enter_smm(struct kvm_vcpu *vcpu, union kvm_smram *smram)
>>   	vmx->nested.smm.vmxon = vmx->nested.vmxon;
>>   	vmx->nested.vmxon = false;
>>   	vmx_clear_hlt(vcpu);
>> +
>> +	if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) &&
>> +	    guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
> Uh, so this arbitrary dependency on 64-bit vCPUs needs to be factored into the
> enabling.  And KVM should WARN if arch LBRs get enabled for a 32-bit vCPU.

OK, will add the check while creating event.

>
>> +		u64 ctl = vmcs_read64(GUEST_IA32_LBR_CTL);
>> +
>> +		smram->smram64.arch_lbr_ctl = ctl;
>> +		vmcs_write64(GUEST_IA32_LBR_CTL, ctl & ~ARCH_LBR_CTL_LBREN);
>> +	}
>> +
>>   	return 0;
>>   }
>>   
>>   static int vmx_leave_smm(struct kvm_vcpu *vcpu, const union kvm_smram *smram)
>>   {
>> +	struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
>>   	struct vcpu_vmx *vmx = to_vmx(vcpu);
>>   	int ret;
>>   
>> @@ -8027,6 +8037,18 @@ static int vmx_leave_smm(struct kvm_vcpu *vcpu, const union kvm_smram *smram)
>>   		vmx->nested.nested_run_pending = 1;
>>   		vmx->nested.smm.guest_mode = false;
>>   	}
>> +
>> +	if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) &&
>> +	    guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
>> +		u64 ctl = smram->smram64.arch_lbr_ctl;
>> +
>> +		vmcs_write64(GUEST_IA32_LBR_CTL, ctl & ARCH_LBR_CTL_LBREN);
> IIUC, this should set only LBREn and preserve all other bits, not clobber the
> entire MSR.

Oops, it's a typo, thanks!

>
>> +
>> +		if (intel_pmu_lbr_is_enabled(vcpu) &&
>> +		    (ctl & ARCH_LBR_CTL_LBREN) && !lbr_desc->event)
>> +			intel_pmu_create_guest_lbr_event(vcpu);
>> +	}
>> +
>>   	return 0;
>>   }
>>   
>> -- 
>> 2.27.0
>>

  reply	other threads:[~2023-01-30 12:51 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-25  4:05 [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 01/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-12-22 10:57   ` Like Xu
2022-12-22 13:29     ` Peter Zijlstra
2022-12-22 17:41     ` Sean Christopherson
2022-12-23  2:12       ` Like Xu
2022-12-27 11:58   ` [tip: perf/core] " tip-bot2 for Like Xu
2022-11-25  4:05 ` [PATCH v2 02/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 03/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2023-01-26 19:50   ` Sean Christopherson
2023-01-30  6:33     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 04/15] KVM: PMU: disable LBR handling if architectural LBR is available Yang Weijiang
2023-01-27 20:10   ` Sean Christopherson
2023-01-30  8:10     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-12-22 11:00   ` Like Xu
2022-12-25  4:30     ` Yang, Weijiang
2022-12-22 11:15   ` Like Xu
2023-01-27 20:25   ` Sean Christopherson
2023-01-30 11:46     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-12-22 11:09   ` Like Xu
2022-12-25  4:27     ` Yang, Weijiang
2022-12-22 11:19   ` Like Xu
2022-12-25  4:16     ` Yang, Weijiang
2022-12-22 11:24   ` Like Xu
2022-12-25  4:08     ` Yang, Weijiang
2023-01-27 21:42   ` Sean Christopherson
2022-11-25  4:05 ` [PATCH v2 07/15] KVM: VMX: Support passthrough of architectural LBRs Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 08/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2023-01-27 21:43   ` Sean Christopherson
2023-01-30 12:27     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2023-01-27 21:46   ` Sean Christopherson
2023-01-30 12:37     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 10/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-12-22 11:06   ` Like Xu
2022-12-25  4:28     ` Yang, Weijiang
2023-01-27 22:04   ` Sean Christopherson
2022-11-25  4:06 ` [PATCH v2 11/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2023-01-27 22:07   ` Sean Christopherson
2023-01-30 13:13     ` Yang, Weijiang
2022-11-25  4:06 ` [PATCH v2 12/15] KVM: x86/vmx: Disable Arch LBREn bit in #DB and warm reset Yang Weijiang
2022-12-22 11:22   ` Like Xu
2022-12-25  4:12     ` Yang, Weijiang
2023-01-27 22:09   ` Sean Christopherson
2023-01-30 13:09     ` Yang, Weijiang
2022-11-25  4:06 ` [PATCH v2 13/15] KVM: x86/vmx: Save/Restore guest Arch LBR Ctrl msr at SMM entry/exit Yang Weijiang
2023-01-27 22:11   ` Sean Christopherson
2023-01-30 12:50     ` Yang, Weijiang [this message]
2022-11-25  4:06 ` [PATCH v2 14/15] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2023-01-27 22:13   ` Sean Christopherson
2023-01-30 12:46     ` Yang, Weijiang
2023-01-30 17:30       ` Sean Christopherson
2023-01-31 13:14         ` Yang, Weijiang
2023-01-31 16:05           ` Sean Christopherson
2022-11-25  4:06 ` [PATCH v2 15/15] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-12-22 11:03   ` Like Xu
2022-12-25  4:31     ` Yang, Weijiang
2023-01-27 22:15   ` Sean Christopherson
2023-01-12  1:57 ` [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang, Weijiang
2023-01-27 22:46 ` Sean Christopherson
2023-01-30 13:38   ` Yang, Weijiang
2023-06-05  9:50   ` Like Xu

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