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* [PATCH] serial: ns16550: Enable clocks during probe
@ 2022-11-28  5:48 Samuel Holland
  2022-11-29  8:46 ` Stefan Roese
  2022-12-12 18:54 ` Tom Rini
  0 siblings, 2 replies; 6+ messages in thread
From: Samuel Holland @ 2022-11-28  5:48 UTC (permalink / raw)
  To: Stefan Roese, Simon Glass; +Cc: u-boot, Samuel Holland

If the UART bus or baud clock has a gate, it must be enabled before the
UART can be used.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 drivers/serial/ns16550.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 7592979cab5..785fb520062 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -506,6 +506,7 @@ int ns16550_serial_probe(struct udevice *dev)
 	struct ns16550_plat *plat = dev_get_plat(dev);
 	struct ns16550 *const com_port = dev_get_priv(dev);
 	struct reset_ctl_bulk reset_bulk;
+	struct clk_bulk clk_bulk;
 	fdt_addr_t addr;
 	int ret;
 
@@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice *dev)
 	if (!ret)
 		reset_deassert_bulk(&reset_bulk);
 
+	ret = clk_get_bulk(dev, &clk_bulk);
+	if (!ret)
+		clk_enable_bulk(&clk_bulk);
+
 	com_port->plat = dev_get_plat(dev);
 	ns16550_init(com_port, -1);
 
-- 
2.37.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] serial: ns16550: Enable clocks during probe
  2022-11-28  5:48 [PATCH] serial: ns16550: Enable clocks during probe Samuel Holland
@ 2022-11-29  8:46 ` Stefan Roese
  2022-12-12 18:54 ` Tom Rini
  1 sibling, 0 replies; 6+ messages in thread
From: Stefan Roese @ 2022-11-29  8:46 UTC (permalink / raw)
  To: Samuel Holland, Simon Glass; +Cc: u-boot

On 11/28/22 06:48, Samuel Holland wrote:
> If the UART bus or baud clock has a gate, it must be enabled before the
> UART can be used.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>   drivers/serial/ns16550.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 7592979cab5..785fb520062 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -506,6 +506,7 @@ int ns16550_serial_probe(struct udevice *dev)
>   	struct ns16550_plat *plat = dev_get_plat(dev);
>   	struct ns16550 *const com_port = dev_get_priv(dev);
>   	struct reset_ctl_bulk reset_bulk;
> +	struct clk_bulk clk_bulk;
>   	fdt_addr_t addr;
>   	int ret;
>   
> @@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice *dev)
>   	if (!ret)
>   		reset_deassert_bulk(&reset_bulk);
>   
> +	ret = clk_get_bulk(dev, &clk_bulk);
> +	if (!ret)
> +		clk_enable_bulk(&clk_bulk);
> +
>   	com_port->plat = dev_get_plat(dev);
>   	ns16550_init(com_port, -1);
>   

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] serial: ns16550: Enable clocks during probe
  2022-11-28  5:48 [PATCH] serial: ns16550: Enable clocks during probe Samuel Holland
  2022-11-29  8:46 ` Stefan Roese
@ 2022-12-12 18:54 ` Tom Rini
  2022-12-13  1:46   ` Samuel Holland
  1 sibling, 1 reply; 6+ messages in thread
From: Tom Rini @ 2022-12-12 18:54 UTC (permalink / raw)
  To: Samuel Holland; +Cc: Stefan Roese, Simon Glass, u-boot

[-- Attachment #1: Type: text/plain, Size: 318 bytes --]

On Sun, Nov 27, 2022 at 11:48:34PM -0600, Samuel Holland wrote:

> If the UART bus or baud clock has a gate, it must be enabled before the
> UART can be used.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> Reviewed-by: Stefan Roese <sr@denx.de>

This breaks building on phycore-rk3288

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] serial: ns16550: Enable clocks during probe
  2022-12-12 18:54 ` Tom Rini
@ 2022-12-13  1:46   ` Samuel Holland
  2022-12-13  6:14     ` Stefan Roese
  0 siblings, 1 reply; 6+ messages in thread
From: Samuel Holland @ 2022-12-13  1:46 UTC (permalink / raw)
  To: Tom Rini
  Cc: Stefan Roese, Simon Glass, u-boot, Wadim Egorov, Philipp Tomsich,
	Kever Yang

On 12/12/22 12:54, Tom Rini wrote:
> On Sun, Nov 27, 2022 at 11:48:34PM -0600, Samuel Holland wrote:
> 
>> If the UART bus or baud clock has a gate, it must be enabled before the
>> UART can be used.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> Reviewed-by: Stefan Roese <sr@denx.de>
> 
> This breaks building on phycore-rk3288

I get:

binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n
rk3288 -T rksd ./idbloader.img': Error: SPL image is too large (size
0x8800 than 0x8000)

Before applying this patch:

$ ls -l spl/u-boot-spl.bin
-rw-r--r-- 1 samuel samuel 32704 Dec 12 19:35 spl/u-boot-spl.bin

So the board was quite close to its SPL size limit already.

I was trying to be general with this patch, but I suppose for my
immediate purposes (Allwinner D1), I only care about the first clock. If
I use clk_get_by_index() instead of clk_get_bulk(), the phycore-rk3288
build passes with 4 bytes to spare:

$ ls -l spl/u-boot-spl.bin
-rw-r--r-- 1 samuel samuel 32760 Dec 12 19:36 spl/u-boot-spl.bin

I will send a v2, but I imagine some other unsuspecting patch will run
into this limit again before long.

Regards,
Samuel


^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] serial: ns16550: Enable clocks during probe
  2022-12-13  1:46   ` Samuel Holland
@ 2022-12-13  6:14     ` Stefan Roese
  2022-12-13 10:40       ` Wadim Egorov
  0 siblings, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2022-12-13  6:14 UTC (permalink / raw)
  To: Samuel Holland, Tom Rini
  Cc: Simon Glass, u-boot, Wadim Egorov, Philipp Tomsich, Kever Yang

Hi Samuel,

On 12/13/22 02:46, Samuel Holland wrote:
> On 12/12/22 12:54, Tom Rini wrote:
>> On Sun, Nov 27, 2022 at 11:48:34PM -0600, Samuel Holland wrote:
>>
>>> If the UART bus or baud clock has a gate, it must be enabled before the
>>> UART can be used.
>>>
>>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>>> Reviewed-by: Stefan Roese <sr@denx.de>
>>
>> This breaks building on phycore-rk3288
> 
> I get:
> 
> binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n
> rk3288 -T rksd ./idbloader.img': Error: SPL image is too large (size
> 0x8800 than 0x8000)
> 
> Before applying this patch:
> 
> $ ls -l spl/u-boot-spl.bin
> -rw-r--r-- 1 samuel samuel 32704 Dec 12 19:35 spl/u-boot-spl.bin
> 
> So the board was quite close to its SPL size limit already.
> 
> I was trying to be general with this patch, but I suppose for my
> immediate purposes (Allwinner D1), I only care about the first clock. If
> I use clk_get_by_index() instead of clk_get_bulk(), the phycore-rk3288
> build passes with 4 bytes to spare:
> 
> $ ls -l spl/u-boot-spl.bin
> -rw-r--r-- 1 samuel samuel 32760 Dec 12 19:36 spl/u-boot-spl.bin
> 
> I will send a v2, but I imagine some other unsuspecting patch will run
> into this limit again before long.

Why not enable LTO to save more space. I just checked this on this
platform:

w/o LTO:
spl/u-boot-spl.bin 32604

with LTO enabled:
spl/u-boot-spl.bin 30016

Not tested though.

Thanks,
Stefan

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] serial: ns16550: Enable clocks during probe
  2022-12-13  6:14     ` Stefan Roese
@ 2022-12-13 10:40       ` Wadim Egorov
  0 siblings, 0 replies; 6+ messages in thread
From: Wadim Egorov @ 2022-12-13 10:40 UTC (permalink / raw)
  To: Stefan Roese, Samuel Holland, Tom Rini
  Cc: Simon Glass, u-boot, Philipp Tomsich, Kever Yang

Hi Stefan,

Am 13.12.22 um 07:14 schrieb Stefan Roese:
> Hi Samuel,
>
> On 12/13/22 02:46, Samuel Holland wrote:
>> On 12/12/22 12:54, Tom Rini wrote:
>>> On Sun, Nov 27, 2022 at 11:48:34PM -0600, Samuel Holland wrote:
>>>
>>>> If the UART bus or baud clock has a gate, it must be enabled before the
>>>> UART can be used.
>>>>
>>>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>>>> Reviewed-by: Stefan Roese <sr@denx.de>
>>>
>>> This breaks building on phycore-rk3288
>>
>> I get:
>>
>> binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n
>> rk3288 -T rksd ./idbloader.img': Error: SPL image is too large (size
>> 0x8800 than 0x8000)
>>
>> Before applying this patch:
>>
>> $ ls -l spl/u-boot-spl.bin
>> -rw-r--r-- 1 samuel samuel 32704 Dec 12 19:35 spl/u-boot-spl.bin
>>
>> So the board was quite close to its SPL size limit already.
>>
>> I was trying to be general with this patch, but I suppose for my
>> immediate purposes (Allwinner D1), I only care about the first clock. If
>> I use clk_get_by_index() instead of clk_get_bulk(), the phycore-rk3288
>> build passes with 4 bytes to spare:
>>
>> $ ls -l spl/u-boot-spl.bin
>> -rw-r--r-- 1 samuel samuel 32760 Dec 12 19:36 spl/u-boot-spl.bin
>>
>> I will send a v2, but I imagine some other unsuspecting patch will run
>> into this limit again before long.
>
> Why not enable LTO to save more space. I just checked this on this
> platform:
>
> w/o LTO:
> spl/u-boot-spl.bin 32604
>
> with LTO enabled:
> spl/u-boot-spl.bin 30016
>
> Not tested though.

Thanks for the hint with the LTO. I just send out a patch to enable it for the 
phycore-rk3288

   https://lists.denx.de/pipermail/u-boot/2022-December/502125.html


Regards,
Wadim

>
> Thanks,
> Stefan



^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-12-13 10:40 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-28  5:48 [PATCH] serial: ns16550: Enable clocks during probe Samuel Holland
2022-11-29  8:46 ` Stefan Roese
2022-12-12 18:54 ` Tom Rini
2022-12-13  1:46   ` Samuel Holland
2022-12-13  6:14     ` Stefan Roese
2022-12-13 10:40       ` Wadim Egorov

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