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From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v1 01/24] fdtdec: Add API to read pci bus-range property
Date: Thu, 30 Jul 2020 17:09:18 +0200	[thread overview]
Message-ID: <9982a030-5de7-2d31-364d-c6247f9cacc3@denx.de> (raw)
In-Reply-To: <CAPnjgZ1jSotKkpm7c=NvK1mp2RHZUJZiFgm0xasRHerEDqfn-A@mail.gmail.com>

Hi Simon,

On 28.07.20 21:01, Simon Glass wrote:
> On Fri, 24 Jul 2020 at 04:09, Stefan Roese <sr@denx.de> wrote:
>>
>> From: Suneel Garapati <sgarapati@marvell.com>
>>
>> Add fdtdec_get_pci_bus_range to read bus-range property
>> values.
>>
>> Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
>> Cc: Simon Glass <sjg@chromium.org>
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> ---
>>
>> Changes in v1:
>> - Added return value description to function prototype in header
>> - Changed from using be32_to_cpup() to fdt32_to_cpu()
>>
>>   include/fdtdec.h | 13 +++++++++++++
>>   lib/fdtdec.c     | 16 ++++++++++++++++
>>   2 files changed, 29 insertions(+)
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
> Is the address always 32-bit?

Yes, I think so. Its done in a similar way in the Linux kernel.

Thanks,
Stefan

> 
>>
>> diff --git a/include/fdtdec.h b/include/fdtdec.h
>> index 760b392bdf..f6759c7f8e 100644
>> --- a/include/fdtdec.h
>> +++ b/include/fdtdec.h
>> @@ -444,6 +444,19 @@ int fdtdec_get_pci_vendev(const void *blob, int node,
>>   int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
>>                           u32 *bar);
>>
>> +/**
>> + * Look at the bus range property of a device node and return the pci bus
>> + * range for this node.
>> + * The property must hold one fdt_pci_addr with a length.
>> + * @param blob         FDT blob
>> + * @param node         node to examine
>> + * @param res          the resource structure to return the bus range
>> + * @return 0 if ok, negative on error
>> + */
>> +
>> +int fdtdec_get_pci_bus_range(const void *blob, int node,
>> +                            struct fdt_resource *res);
>> +
>>   /**
>>    * Look up a 32-bit integer property in a node and return it. The property
>>    * must have at least 4 bytes of data. The value of the first cell is
>> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
>> index 78576b530f..0b40fa374a 100644
>> --- a/lib/fdtdec.c
>> +++ b/lib/fdtdec.c
>> @@ -242,6 +242,22 @@ int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
>>
>>          return 0;
>>   }
>> +
>> +int fdtdec_get_pci_bus_range(const void *blob, int node,
>> +                            struct fdt_resource *res)
>> +{
>> +       const u32 *values;
>> +       int len;
>> +
>> +       values = fdt_getprop(blob, node, "bus-range", &len);
>> +       if (!values || len < sizeof(*values) * 2)
>> +               return -EINVAL;
>> +
>> +       res->start = fdt32_to_cpu(*values++);
>> +       res->end = fdt32_to_cpu(*values);
>> +
>> +       return 0;
>> +}
>>   #endif
>>
>>   uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
>> --
>> 2.27.0
>>


Viele Gr??e,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de

  reply	other threads:[~2020-07-30 15:09 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-24 10:08 [PATCH v1 00/24] arm: Introduce Marvell/Cavium OcteonTX/TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 01/24] fdtdec: Add API to read pci bus-range property Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:09     ` Stefan Roese [this message]
2020-07-24 10:08 ` [PATCH v1 02/24] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 03/24] pci: pci-uclass: Dynamically allocate the PCI regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:16     ` Stefan Roese
2020-08-05  9:12       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 04/24] pci: pci-uclass: Fix incorrect argument in map_sysmem Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 05/24] pci: pci-uclass: Make DT subnode parse optional Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:35     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-04 14:03         ` Stefan Roese
2020-08-04 15:05           ` Simon Glass
2020-08-14 11:40             ` Stefan Roese
2020-08-22 15:09               ` Simon Glass
2020-08-23  9:41                 ` Stefan Roese
2020-08-23 14:03                   ` Tom Rini
2020-08-24  7:36                     ` Stefan Roese
2020-08-24 13:09                       ` Tom Rini
2020-08-25 15:04                         ` Simon Glass
2020-08-25 15:09                           ` Tom Rini
2020-07-24 10:08 ` [PATCH v1 07/24] pci: pci-uclass: Add support for Enhanced Allocation in Bridges Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 08/24] pci: pci-uclass: Add support for Single-Root I/O Virtualization Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 09/24] pci: pci-uclass: Add VF BAR map support for Enhanced Allocation Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 10/24] pci: pci-uclass: Add support for Alternate-RoutingID capability Stefan Roese
2020-07-24 10:08 ` [PATCH v1 11/24] pci: pci-uclass: Check validity of ofnode Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 12/24] arm: include/asm/io.h: Add 64bit clrbits and setbits helpers Stefan Roese
2020-07-24 10:08 ` [PATCH v1 13/24] arm: octeontx: Add headers for OcteonTX Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:21     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 14/24] arm: octeontx2: Add headers for OcteonTX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:23     ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:41     ` Stefan Roese
2020-07-31 18:35       ` Simon Glass
2020-08-04 13:37         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 16/24] pci: Add PCI controller driver for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 16:25     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-05 13:25         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 17/24] mmc: Remove static qualifier on mmc_power_init Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 18/24] mmc: Add MMC controller driver for OcteonTX / TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 19/24] mtd: nand: Add NAND controller driver for OcteonTX Stefan Roese
2020-07-24 10:08 ` [PATCH v1 20/24] net: Add NIC " Stefan Roese
2020-07-24 10:08 ` [PATCH v1 21/24] net: Add NIC controller driver for OcteonTX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 22/24] watchdog: Add reset support for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:25     ` Stefan Roese
2020-08-05 13:47       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 23/24] arm: octeontx: Add support for OcteonTX SoC platforms Stefan Roese
2020-07-24 10:08 ` [PATCH v1 24/24] arm: octeontx2: Add support for OcteonTX2 " Stefan Roese

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