All of lore.kernel.org
 help / color / mirror / Atom feed
From: Simon Glass <sjg@chromium.org>
To: u-boot@lists.denx.de
Subject: [PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device
Date: Tue, 28 Jul 2020 13:01:40 -0600	[thread overview]
Message-ID: <CAPnjgZ0eZAvGQkz58TowHWaQCvL7HwGsj3SJnDD1D_k_fyczTw@mail.gmail.com> (raw)
In-Reply-To: <20200724100856.1482324-16-sr@denx.de>

Hi Stefan,

On Fri, 24 Jul 2020 at 04:09, Stefan Roese <sr@denx.de> wrote:
>
> From: Suneel Garapati <sgarapati@marvell.com>
>
> For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
> instead of BAR5.
>
> Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
> Cc: Simon Glass <sjg@chromium.org>
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> ---
>
> Changes in v1:
> - Change patch subject
> - Use constants from pci_ids.h instead of hardcoded values
>
>  drivers/ata/ahci.c | 8 ++++++++
>  1 file changed, 8 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

>
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index 47cdea1f58..28161b5e62 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -1198,10 +1198,18 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong base)
>  int ahci_probe_scsi_pci(struct udevice *ahci_dev)
>  {
>         ulong base;
> +       u16 vendor, device;
>
>         base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5,
>                                      PCI_REGION_MEM);
>
> +       dm_pci_read_config16(ahci_dev, PCI_VENDOR_ID, &vendor);
> +       dm_pci_read_config16(ahci_dev, PCI_DEVICE_ID, &device);
> +
> +       if (vendor == PCI_VENDOR_ID_CAVIUM &&
> +           device == PCI_DEVICE_ID_CAVIUM_SATA)
> +               base = (uintptr_t)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_0,
> +                                                PCI_REGION_MEM);

How should we handle this in general? Should we have a Kconfig to
enable quirks in ahci?

>         return ahci_probe_scsi(ahci_dev, base);
>  }
>  #endif
> --
> 2.27.0
>

Regards,
Simon

  reply	other threads:[~2020-07-28 19:01 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-24 10:08 [PATCH v1 00/24] arm: Introduce Marvell/Cavium OcteonTX/TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 01/24] fdtdec: Add API to read pci bus-range property Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:09     ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 02/24] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 03/24] pci: pci-uclass: Dynamically allocate the PCI regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:16     ` Stefan Roese
2020-08-05  9:12       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 04/24] pci: pci-uclass: Fix incorrect argument in map_sysmem Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 05/24] pci: pci-uclass: Make DT subnode parse optional Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 15:35     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-04 14:03         ` Stefan Roese
2020-08-04 15:05           ` Simon Glass
2020-08-14 11:40             ` Stefan Roese
2020-08-22 15:09               ` Simon Glass
2020-08-23  9:41                 ` Stefan Roese
2020-08-23 14:03                   ` Tom Rini
2020-08-24  7:36                     ` Stefan Roese
2020-08-24 13:09                       ` Tom Rini
2020-08-25 15:04                         ` Simon Glass
2020-08-25 15:09                           ` Tom Rini
2020-07-24 10:08 ` [PATCH v1 07/24] pci: pci-uclass: Add support for Enhanced Allocation in Bridges Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 08/24] pci: pci-uclass: Add support for Single-Root I/O Virtualization Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 09/24] pci: pci-uclass: Add VF BAR map support for Enhanced Allocation Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 10/24] pci: pci-uclass: Add support for Alternate-RoutingID capability Stefan Roese
2020-07-24 10:08 ` [PATCH v1 11/24] pci: pci-uclass: Check validity of ofnode Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 12/24] arm: include/asm/io.h: Add 64bit clrbits and setbits helpers Stefan Roese
2020-07-24 10:08 ` [PATCH v1 13/24] arm: octeontx: Add headers for OcteonTX Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:21     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 14/24] arm: octeontx2: Add headers for OcteonTX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:23     ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device Stefan Roese
2020-07-28 19:01   ` Simon Glass [this message]
2020-07-30 15:41     ` Stefan Roese
2020-07-31 18:35       ` Simon Glass
2020-08-04 13:37         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 16/24] pci: Add PCI controller driver for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-30 16:25     ` Stefan Roese
2020-07-31 18:44       ` Simon Glass
2020-08-05 13:25         ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 17/24] mmc: Remove static qualifier on mmc_power_init Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-24 10:08 ` [PATCH v1 18/24] mmc: Add MMC controller driver for OcteonTX / TX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 19/24] mtd: nand: Add NAND controller driver for OcteonTX Stefan Roese
2020-07-24 10:08 ` [PATCH v1 20/24] net: Add NIC " Stefan Roese
2020-07-24 10:08 ` [PATCH v1 21/24] net: Add NIC controller driver for OcteonTX2 Stefan Roese
2020-07-24 10:08 ` [PATCH v1 22/24] watchdog: Add reset support for OcteonTX / TX2 Stefan Roese
2020-07-28 19:01   ` Simon Glass
2020-07-31 14:25     ` Stefan Roese
2020-08-05 13:47       ` Stefan Roese
2020-07-24 10:08 ` [PATCH v1 23/24] arm: octeontx: Add support for OcteonTX SoC platforms Stefan Roese
2020-07-24 10:08 ` [PATCH v1 24/24] arm: octeontx2: Add support for OcteonTX2 " Stefan Roese

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAPnjgZ0eZAvGQkz58TowHWaQCvL7HwGsj3SJnDD1D_k_fyczTw@mail.gmail.com \
    --to=sjg@chromium.org \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.